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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Bryan O'Donoghue <pure.logic@nexus-software.ie>,
	Peter Hurley <peter@hurleysoftware.com>,
	linux-serial@vger.kernel.org, Vinod Koul <vinod.koul@intel.com>,
	linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	ismo.puustinen@intel.com,
	Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v5 04/11] dmaengine: dw: override LLP support if asked in platform data
Date: Fri,  6 May 2016 18:17:13 +0300	[thread overview]
Message-ID: <1462547840-14091-5-git-send-email-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <1462547840-14091-1-git-send-email-andriy.shevchenko@linux.intel.com>

There is at least one known device, i.e. UART on Intel Galileo, that works
unreliably in case of use of multi block transfer support in DMA mode.

Override autodetection by user provided data.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/dma/dw/core.c                | 10 +++++++---
 include/linux/platform_data/dma-dw.h |  2 ++
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 59f571c..d2d1d51 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1573,9 +1573,13 @@ int dw_dma_probe(struct dw_dma_chip *chip)
 			dwc->block_size = pdata->block_size;
 
 			/* Check if channel supports multi block transfer */
-			channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff));
-			dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0;
-			channel_writel(dwc, LLP, 0);
+			if (pdata->is_nollp) {
+				dwc->nollp = pdata->is_nollp;
+			} else {
+				channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff));
+				dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0;
+				channel_writel(dwc, LLP, 0);
+			}
 		}
 	}
 
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 4636c93..5f0e11e 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -40,6 +40,7 @@ struct dw_dma_slave {
  * @is_private: The device channels should be marked as private and not for
  *	by the general purpose DMA channel allocator.
  * @is_memcpy: The device channels do support memory-to-memory transfers.
+ * @is_nollp: The device channels does not support multi block transfers.
  * @chan_allocation_order: Allocate channels starting from 0 or 7
  * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
  * @block_size: Maximum block size supported by the controller
@@ -51,6 +52,7 @@ struct dw_dma_platform_data {
 	unsigned int	nr_channels;
 	bool		is_private;
 	bool		is_memcpy;
+	bool		is_nollp;
 #define CHAN_ALLOCATION_ASCENDING	0	/* zero to seven */
 #define CHAN_ALLOCATION_DESCENDING	1	/* seven to zero */
 	unsigned char	chan_allocation_order;
-- 
2.8.1

  parent reply	other threads:[~2016-05-06 15:17 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-06 15:17 [PATCH v5 00/11] serial: 8250: split LPSS to 8250_lpss, enable DMA on Quark Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 01/11] dmaengine: dw: keep copy of custom slave config in dwc Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 02/11] dmaengine: dw: provide probe(), remove() stubs for users Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 03/11] dmaengine: dw: set polarity of handshake interface Andy Shevchenko
2016-05-06 15:17 ` Andy Shevchenko [this message]
2016-05-06 15:17 ` [PATCH v5 05/11] serial: 8250_dma: switch to new dmaengine_terminate_* API Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 06/11] serial: 8250_dma: adjust DMA address of the UART Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 07/11] serial: 8250: enable AFE on ports where FIFO is 16 bytes Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 08/11] serial: 8250_lpss: split LPSS driver to separate module Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 09/11] serial: 8250_lpss: move Quark code from PCI driver Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 10/11] serial: 8250_lpss: enable MSI for Intel Quark Andy Shevchenko
2016-05-06 15:17 ` [PATCH v5 11/11] serial: 8250_lpss: enable DMA on Intel Quark UART Andy Shevchenko
2016-05-12 15:06 ` [PATCH v5 00/11] serial: 8250: split LPSS to 8250_lpss, enable DMA on Quark Andy Shevchenko
2016-05-12 15:59   ` Vinod Koul
2016-05-19  1:18   ` Bryan O'Donoghue
2016-05-24 17:37     ` Andy Shevchenko
2016-05-24 18:08       ` Andy Shevchenko
2016-05-26 16:36         ` Bryan O'Donoghue
2016-06-07 10:04           ` Andy Shevchenko
2016-06-12 17:13             ` Bryan O'Donoghue
2016-06-13 11:16               ` Andy Shevchenko
2016-05-26 16:11       ` Bryan O'Donoghue

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