From: Alexandre TORGUE <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
To: Maxime Coquelin
<mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
gerald.baeza-qxv4g6HH51o@public.gmane.org,
Greg Kroah-Hartman
<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
Jiri Slaby <jslaby-IBi9RG/b67k@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 10/11] serial: stm32: fix uart enable management
Date: Thu, 15 Sep 2016 18:42:42 +0200 [thread overview]
Message-ID: <1473957763-30629-11-git-send-email-alexandre.torgue@st.com> (raw)
In-Reply-To: <1473957763-30629-1-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
Signed-off-by: Gerald Baeza <gerald.baeza-qxv4g6HH51o@public.gmane.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 3b99d79..4d3001b 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -461,9 +461,11 @@ static void stm32_shutdown(struct uart_port *port)
{
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
+ struct stm32_usart_config *cfg = &stm32_port->info->cfg;
u32 val;
val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+ val |= BIT(cfg->uart_enable_bit);
stm32_clr_bits(port, ofs->cr1, val);
free_irq(port->irq, port);
@@ -923,6 +925,7 @@ static void stm32_console_write(struct console *co, const char *s, unsigned cnt)
struct uart_port *port = &stm32_ports[co->index].port;
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
+ struct stm32_usart_config *cfg = &stm32_port->info->cfg;
unsigned long flags;
u32 old_cr1, new_cr1;
int locked = 1;
@@ -935,9 +938,10 @@ static void stm32_console_write(struct console *co, const char *s, unsigned cnt)
else
spin_lock(&port->lock);
- /* Save and disable interrupts */
+ /* Save and disable interrupts, enable the transmitter */
old_cr1 = readl_relaxed(port->membase + ofs->cr1);
new_cr1 = old_cr1 & ~USART_CR1_IE_MASK;
+ new_cr1 |= USART_CR1_TE | BIT(cfg->uart_enable_bit);
writel_relaxed(new_cr1, port->membase + ofs->cr1);
uart_console_write(port, s, cnt, stm32_console_putchar);
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2016-09-15 16:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-15 16:42 [PATCH 00/11] STM32 USART: fixes and new MCU support Alexandre TORGUE
[not found] ` <1473957763-30629-1-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
2016-09-15 16:42 ` [PATCH 01/11] serial: stm32: adding support for stm32f7 Alexandre TORGUE
2016-09-15 16:42 ` [PATCH 02/11] DOCUMENTATION: dt-bindings: Document the STM32 USART bindings Alexandre TORGUE
[not found] ` <1473957763-30629-3-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
2016-09-23 15:29 ` Rob Herring
2016-10-05 14:09 ` Gerald Baeza
[not found] ` <dd28f224-3e3b-0a00-f978-16861b946fd1-qxv4g6HH51o@public.gmane.org>
2016-10-05 15:13 ` Rob Herring
[not found] ` <CAL_JsqK=VCHcPbupnwLVEWehqJbXfGD1CSZT++A4+N6DD6VqxA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-10-06 8:00 ` Alexandre Torgue
2016-09-15 16:42 ` [PATCH 03/11] serial: stm32: header file creation Alexandre TORGUE
2016-09-15 16:42 ` [PATCH 04/11] serial: stm32: disable tx and rx during shutdown Alexandre TORGUE
2016-09-15 16:42 ` [PATCH 05/11] serial: stm32: correct flow control property spelling Alexandre TORGUE
2016-09-15 16:42 ` [PATCH 06/11] serial: stm32: clock disabling management Alexandre TORGUE
2016-09-15 16:42 ` [PATCH 07/11] dt-bindings: Add DMA bindings for STM32 USART Alexandre TORGUE
[not found] ` <1473957763-30629-8-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
2016-09-23 15:30 ` Rob Herring
2016-09-15 16:42 ` [PATCH 08/11] serial: stm32: adding dma support Alexandre TORGUE
2016-09-15 16:42 ` [PATCH 09/11] serial: stm32: fix spin_lock management Alexandre TORGUE
2016-09-15 16:42 ` Alexandre TORGUE [this message]
2016-09-15 16:42 ` [PATCH 11/11] ARM: DT: STM32: add dma for usart1 on F429 Alexandre TORGUE
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1473957763-30629-11-git-send-email-alexandre.torgue@st.com \
--to=alexandre.torgue-qxv4g6hh51o@public.gmane.org \
--cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=gerald.baeza-qxv4g6HH51o@public.gmane.org \
--cc=gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org \
--cc=jslaby-IBi9RG/b67k@public.gmane.org \
--cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
--cc=linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
--cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox