From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6482813B280; Sun, 26 Oct 2025 21:40:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761514844; cv=none; b=XlWJe50QO9Vs/8aVk8gyePMD+UjVGj/ELpRtINZCMeGpUSzIoPg25rijzc7aHIQt9NhCSg3XAcMaUmx9Xgw+2Gsf6QMa3VajGY+ZwAPyAq6W+fr3Mi59323bZYsfJ17YhSOtRguxb7YkiW6tAzUoa8TMEagYuLYmH04a2jhh5mQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761514844; c=relaxed/simple; bh=hrAhullTtGBpi18RJq12aBGKxmGAG7DcyxLeBCASy5Y=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=iQPXJTdNrbO48TkNWj6n/lKO/mVYt6C1kOJAgKP0SGx+2uJbszG7LBpt5gP8FaQi/BvvCVZ8eqmL+aYgx1H6tDXzJsGcQlddOOgY2xDhttGu2YrdEjQcnyPU0y7ssGv7aENjFMuiWgm/OB2tBZVxAKVc5IYUUKhxAOhMK0mP8KU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vKhKB+tm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vKhKB+tm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A8121C4CEE7; Sun, 26 Oct 2025 21:40:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761514844; bh=hrAhullTtGBpi18RJq12aBGKxmGAG7DcyxLeBCASy5Y=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=vKhKB+tmed0VAijfGV0sE1GPY3vki2cliuedET4rXwig8irwIsvwx06T94zIDy+AB 99Bpc+ZX1inw/DryDrXsTytAKX9pSt1NuiKMk0C85vE1Y6hMxst1qqYDUzoXku+5lT C+fFwZHFBiLNiVKZ6nE/SlKsxtWcLiSkgh0F+dOwzYyajJ4oD0/0MOXes5Eku0nQ6E FMsJw7QkawE1jPodpNFrNH6dK+3nuEzaoqSCEyL/+rIvlYDtL62OSng7y74RdVfAMd ceKitmwv4I7jDlB4v6BobDDC2+7yBwoAcBOqRpaYTRWab21S3svt98aLYwYOzXtsVs ggeZpJZJQE0Ow== Date: Sun, 26 Oct 2025 16:40:41 -0500 From: "Rob Herring (Arm)" To: Junhui Liu Cc: Daniel Lezcano , Paul Walmsley , linux-serial@vger.kernel.org, Thomas Gleixner , Krzysztof Kozlowski , Greg Kroah-Hartman , linux-riscv@lists.infradead.org, Albert Ou , Jiri Slaby , Chen Wang , devicetree@vger.kernel.org, Inochi Amaoto , linux-kernel@vger.kernel.org, Inochi Amaoto , Samuel Holland , sophgo@lists.linux.dev, Paul Walmsley , Conor Dooley , Alexandre Ghiti , Palmer Dabbelt , Palmer Dabbelt , Conor Dooley Subject: Re: [PATCH v3 05/13] dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT MSWI Message-ID: <176151483790.2985487.5387793525895332800.robh@kernel.org> References: <20251021-dr1v90-basic-dt-v3-0-5478db4f664a@pigmoral.tech> <20251021-dr1v90-basic-dt-v3-5-5478db4f664a@pigmoral.tech> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251021-dr1v90-basic-dt-v3-5-5478db4f664a@pigmoral.tech> On Tue, 21 Oct 2025 17:41:40 +0800, Junhui Liu wrote: > Add MSWI support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with a > TIMER unit compliant with the ACLINT specification. > > Signed-off-by: Junhui Liu > --- > .../interrupt-controller/thead,c900-aclint-mswi.yaml | 17 +++++++++++------ > 1 file changed, 11 insertions(+), 6 deletions(-) > Acked-by: Rob Herring (Arm)