Linux Serial subsystem development
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From: "Rob Herring (Arm)" <robh@kernel.org>
To: Biju <biju.das.au@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	linux-kernel@vger.kernel.org,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	linux-renesas-soc@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	linux-serial@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	devicetree@vger.kernel.org,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 1/2] dt-bindings: serial: renesas,rsci: Document RZ/G3L SoC
Date: Fri, 13 Mar 2026 19:22:40 -0500	[thread overview]
Message-ID: <177344776029.3722290.9591899535804850157.robh@kernel.org> (raw)
In-Reply-To: <20260312082708.98835-2-biju.das.jz@bp.renesas.com>


On Thu, 12 Mar 2026 08:26:58 +0000, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> Document the serial communication interface (RSCI) used on the Renesas
> RZ/G3L (R9A08G046) SoC. This SoC integrates the same RSCI IP block as
> the RZ/G3E (R9A09G047), but it has 3 clocks compared to 6 clocks on
> the RZ/G3E SoC. The RZ/G3L has a single TCLK with internal dividers,
> whereas the RZ/G3E has explicit clocks for TCLK and its dividers.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  .../bindings/serial/renesas,rsci.yaml         | 26 +++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>


  reply	other threads:[~2026-03-14  0:22 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-12  8:26 [PATCH 0/2] Add support for RZ/G3L RSCI Biju
2026-03-12  8:26 ` [PATCH 1/2] dt-bindings: serial: renesas,rsci: Document RZ/G3L SoC Biju
2026-03-14  0:22   ` Rob Herring (Arm) [this message]
2026-03-26 14:47   ` Geert Uytterhoeven
2026-03-12  8:26 ` [PATCH 2/2] serial: sh-sci: Add support for RZ/G3L RSCI Biju
2026-03-26 14:49   ` Geert Uytterhoeven

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