From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jason Uy Subject: RE: [PATCH] serial: 8250_dw: Fix breakage when HAVE_CLK=n Date: Mon, 6 Mar 2017 15:38:47 -0800 Message-ID: <18720dd546d32a1455fb17ad46ee73e4@mail.gmail.com> References: <20170304130958.23655-1-james.hogan@imgtec.com> <20170306101603.GW996@jhogan-linux.le.imgtec.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: <20170306101603.GW996@jhogan-linux.le.imgtec.org> Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: James Hogan , Andy Shevchenko Cc: linux-kernel@vger.kernel.org, Greg Kroah-Hartman , Andy Shevchenko , Kefeng Wang , Heiko Stuebner , David Daney , Russell King , linux-serial@vger.kernel.org, linux-clk@vger.kernel.org, linux-mips@linux-mips.org, bcm-kernel-feedback-list List-Id: linux-serial@vger.kernel.org Looks good Reviewed-by: Jason Uy -----Original Message----- From: James Hogan [mailto:james.hogan@imgtec.com] Sent: March-06-17 2:16 AM To: Andy Shevchenko Cc: linux-kernel@vger.kernel.org; Greg Kroah-Hartman ; Andy Shevchenko ; Jason Uy ; Kefeng Wang ; Heiko Stuebner ; David Daney ; Russell King ; linux-serial@vger.kernel.org; linux-clk@vger.kernel.org; linux-mips@linux-mips.org; bcm-kernel-feedback-list Subject: Re: [PATCH] serial: 8250_dw: Fix breakage when HAVE_CLK=n On Sat, Mar 04, 2017 at 04:37:17PM +0200, Andy Shevchenko wrote: > On Sat, Mar 4, 2017 at 3:09 PM, James Hogan > wrote: > > Commit 6a171b299379 ("serial: 8250_dw: Allow hardware flow control > > to be > > used") recently broke the 8250_dw driver on platforms which don't > > select HAVE_CLK, as dw8250_set_termios() gets confused by the > > behaviour of the fallback HAVE_CLK=n clock API in linux/clk.h which > > pretends everything is fine but returns (valid) NULL clocks and 0 HZ > > clock rates. > > > > That 0 rate is written into the uartclk resulting in a crash at > > boot, e.g. on Cavium Octeon III based UTM-8 we get something like this: > > > > 1180000000800.serial: ttyS0 at MMIO 0x1180000000800 (irq = 41, > > base_baud = 25000000) is a OCTEON ------------[ cut here > > ]------------ > > WARNING: CPU: 2 PID: 1 at drivers/tty/serial/serial_core.c:441 > > uart_get_baud_rate+0xfc/0x1f0 ... > > Call Trace: > > ... > > [] uart_get_baud_rate+0xfc/0x1f0 > > [] serial8250_do_set_termios+0xb0/0x440 > > [] uart_set_options+0xe8/0x190 > > [] serial8250_console_setup+0x84/0x158 > > [] univ8250_console_setup+0x54/0x70 > > [] register_console+0x1c8/0x418 > > [] uart_add_one_port+0x434/0x4b0 > > [] serial8250_register_8250_port+0x2d8/0x440 > > [] dw8250_probe+0x388/0x5e8 ... > > > > The clock API is defined such that NULL is a valid clock handle so > > it wouldn't be right to check explicitly for NULL. Instead treat a > > clk_round_rate() return value of 0 as an error which prevents > > uartclk being overwritten. > > > > You forgot to add that it is dependent to Heiko's patch > http://www.spinics.net/lists/linux-serial/msg25314.html Indeed I did. Sorry about that. > > Patch looks good to me and shouldn't bring any regression to Intel > hardware (x86 is using clock framework). > > Reviewed-by: Andy Shevchenko Thanks James