[PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[Shreshtha Kumar SAHU]

From: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>

This patch provides platform data for following
 - uart reset function to assist uart register lockup workaround

 - init/exit function to fix glitch in the tx pin in tty_open
	when tty port0 is opened a glitch is seen in the tx line
	of uart0. This happens in __pl011_startup() when tx fifo
	interrupt is provoked into asserting.
	Now uart0 pins are enabled (alt function) only when init
	is complete and turned back to gpio when closed.

Signed-off-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-pins.c |   16 +++++++--
 arch/arm/mach-ux500/board-mop500.c      |   53 +++++++++++++++++++++++++++++++
 2 files changed, 65 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index fd4cf1c..ceab640 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -110,10 +110,18 @@ static pin_cfg_t mop500_pins_common[] = {
 	GPIO168_KP_O0,
 
 	/* UART */
-	GPIO0_U0_CTSn	| PIN_INPUT_PULLUP,
-	GPIO1_U0_RTSn	| PIN_OUTPUT_HIGH,
-	GPIO2_U0_RXD	| PIN_INPUT_PULLUP,
-	GPIO3_U0_TXD	| PIN_OUTPUT_HIGH,
+	/* uart-0 pins gpio configuration should be
+	 * kept intact to prevent glitch in tx line
+	 * when tty dev is opened. Later these pins
+	 * are configured to uart mop500_pins_uart0
+	 *
+	 * It will be replaced with uart configuration
+	 * once the issue is solved.
+	 */
+	GPIO0_GPIO	| PIN_INPUT_PULLUP,
+	GPIO1_GPIO	| PIN_OUTPUT_HIGH,
+	GPIO2_GPIO	| PIN_INPUT_PULLUP,
+	GPIO3_GPIO	| PIN_OUTPUT_LOW,
 
 	GPIO29_U2_RXD	| PIN_INPUT_PULLUP,
 	GPIO30_U2_TXD	| PIN_OUTPUT_HIGH,
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 6e1907fa..e7bc61e 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -27,6 +27,7 @@
 #include <linux/leds-lp5521.h>
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
+#include <linux/delay.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -39,6 +40,7 @@
 #include <mach/devices.h>
 #include <mach/irqs.h>
 
+#include "pins-db8500.h"
 #include "ste-dma40-db8500.h"
 #include "devices-db8500.h"
 #include "board-mop500.h"
@@ -391,12 +393,63 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
 };
 #endif
 
+
+static pin_cfg_t mop500_pins_uart0[] = {
+	GPIO0_U0_CTSn   | PIN_INPUT_PULLUP,
+	GPIO1_U0_RTSn   | PIN_OUTPUT_HIGH,
+	GPIO2_U0_RXD    | PIN_INPUT_PULLUP,
+	GPIO3_U0_TXD    | PIN_OUTPUT_HIGH,
+};
+
+#define PRCC_K_SOFTRST_SET      0x18
+#define PRCC_K_SOFTRST_CLEAR    0x1C
+static void ux500_uart0_reset(void)
+{
+	void __iomem *prcc_rst_set, *prcc_rst_clr;
+	
+	prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
+			PRCC_K_SOFTRST_SET);
+	prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
+			PRCC_K_SOFTRST_CLEAR);
+	
+	/* Activate soft reset PRCC_K_SOFTRST_CLEAR */
+	writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
+	udelay(1);
+	
+	/* Release soft reset PRCC_K_SOFTRST_SET */
+	writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
+	udelay(1);
+}
+
+static void ux500_uart0_init(void)
+{
+	int ret;
+
+	ret = nmk_config_pins(mop500_pins_uart0,
+			ARRAY_SIZE(mop500_pins_uart0));
+	if (ret < 0)
+		pr_err("pl011: uart pins_enable failed\n");
+}
+
+static void ux500_uart0_exit(void)
+{
+	int ret;
+
+	ret = nmk_config_pins_sleep(mop500_pins_uart0,
+			ARRAY_SIZE(mop500_pins_uart0));
+	if (ret < 0)
+		pr_err("pl011: uart pins_disable failed\n");
+}
+
 static struct amba_pl011_data uart0_plat = {
 #ifdef CONFIG_STE_DMA40
 	.dma_filter = stedma40_filter,
 	.dma_rx_param = &uart0_dma_cfg_rx,
 	.dma_tx_param = &uart0_dma_cfg_tx,
 #endif
+	.init = ux500_uart0_init,
+	.exit = ux500_uart0_exit,
+	.reset = ux500_uart0_reset,
 };
 
 static struct amba_pl011_data uart1_plat = {
-- 
1.7.2.dirty

Re: [PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[Russell King]

On Mon, May 16, 2011 at 06:31:19PM +0530, Shreshtha Kumar SAHU wrote:
> From: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
> 
> This patch provides platform data for following
>  - uart reset function to assist uart register lockup workaround
> 
>  - init/exit function to fix glitch in the tx pin in tty_open
> 	when tty port0 is opened a glitch is seen in the tx line
> 	of uart0. This happens in __pl011_startup() when tx fifo
> 	interrupt is provoked into asserting.

I was trying to work out where that is, but i can't find this function.
Is your patch against a different version of the driver?

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:

Re: [PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[Shreshtha Kumar SAHU]

On Mon, May 16, 2011 at 15:09:05 +0200, Russell King wrote:
> On Mon, May 16, 2011 at 06:31:19PM +0530, Shreshtha Kumar SAHU wrote:
> > From: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
> >
> > This patch provides platform data for following
> >  - uart reset function to assist uart register lockup workaround
> >
> >  - init/exit function to fix glitch in the tx pin in tty_open
> >       when tty port0 is opened a glitch is seen in the tx line
> >       of uart0. This happens in __pl011_startup() when tx fifo
> >       interrupt is provoked into asserting.
> 
> I was trying to work out where that is, but i can't find this function.
> Is your patch against a different version of the driver?
sorry, the function names in commit message is wrong by mistake.
It should be - "This happens in pl011_startup() when tx 
fifo interrupt is provoked into asserting."
I will send out a new patch with corrected commit mesaage.

> 
> --
> Russell King
>  Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
>  maintainer of:

BR,
Shreshtha

Re: [PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[Russell King]

On Mon, May 16, 2011 at 07:30:46PM +0530, Shreshtha Kumar SAHU wrote:
> On Mon, May 16, 2011 at 15:09:05 +0200, Russell King wrote:
> > On Mon, May 16, 2011 at 06:31:19PM +0530, Shreshtha Kumar SAHU wrote:
> > > From: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
> > >
> > > This patch provides platform data for following
> > >  - uart reset function to assist uart register lockup workaround
> > >
> > >  - init/exit function to fix glitch in the tx pin in tty_open
> > >       when tty port0 is opened a glitch is seen in the tx line
> > >       of uart0. This happens in __pl011_startup() when tx fifo
> > >       interrupt is provoked into asserting.
> > 
> > I was trying to work out where that is, but i can't find this function.
> > Is your patch against a different version of the driver?
> sorry, the function names in commit message is wrong by mistake.
> It should be - "This happens in pl011_startup() when tx 
> fifo interrupt is provoked into asserting."
> I will send out a new patch with corrected commit mesaage.

Have you tracked down why this happens?

Is it the switching into and out of loopback mode, or does loopback mode
not prevent the transmit pin toggling?

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:

Re: [PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[Shreshtha Kumar SAHU]

On Mon, May 16, 2011 at 16:05:41 +0200, Russell King wrote:
> On Mon, May 16, 2011 at 07:30:46PM +0530, Shreshtha Kumar SAHU wrote:
> > On Mon, May 16, 2011 at 15:09:05 +0200, Russell King wrote:
> > > On Mon, May 16, 2011 at 06:31:19PM +0530, Shreshtha Kumar SAHU wrote:
> > > > From: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
> > > >
> > > > This patch provides platform data for following
> > > >  - uart reset function to assist uart register lockup workaround
> > > >
> > > >  - init/exit function to fix glitch in the tx pin in tty_open
> > > >       when tty port0 is opened a glitch is seen in the tx line
> > > >       of uart0. This happens in __pl011_startup() when tx fifo
> > > >       interrupt is provoked into asserting.
> > > 
> > > I was trying to work out where that is, but i can't find this function.
> > > Is your patch against a different version of the driver?
> > sorry, the function names in commit message is wrong by mistake.
> > It should be - "This happens in pl011_startup() when tx 
> > fifo interrupt is provoked into asserting."
> > I will send out a new patch with corrected commit mesaage.
> 
> Have you tracked down why this happens?
> 
> Is it the switching into and out of loopback mode, or does loopback mode
> not prevent the transmit pin toggling?
As I tried to get the cause for it, I found it is not due to switching in
and out of loopback mode. It was found to be default behaviour of the hardware.
Even in loopback mode data is transmitted out to pins.
> 
> -- 
> Russell King
>  Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
>  maintainer of:

[PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[Linus Walleij]

From: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>

This patch provides platform data for following
 - uart reset function to assist uart register lockup workaround

 - init/exit function to fix glitch in the tx pin in tty_open
	when tty port0 is opened a glitch is seen in the tx line
	of uart0. This happens in pl011_startup() when tx fifo
	interrupt is provoked into asserting.
	Now uart0 pins are enabled (alt function) only when init
	is complete and turned back to gpio when closed.

Signed-off-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/mach-ux500/board-mop500-pins.c |   16 +++++++--
 arch/arm/mach-ux500/board-mop500.c      |   54 +++++++++++++++++++++++++++++++
 2 files changed, 66 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index fd4cf1c..ceab640 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -110,10 +110,18 @@ static pin_cfg_t mop500_pins_common[] = {
 	GPIO168_KP_O0,
 
 	/* UART */
-	GPIO0_U0_CTSn	| PIN_INPUT_PULLUP,
-	GPIO1_U0_RTSn	| PIN_OUTPUT_HIGH,
-	GPIO2_U0_RXD	| PIN_INPUT_PULLUP,
-	GPIO3_U0_TXD	| PIN_OUTPUT_HIGH,
+	/* uart-0 pins gpio configuration should be
+	 * kept intact to prevent glitch in tx line
+	 * when tty dev is opened. Later these pins
+	 * are configured to uart mop500_pins_uart0
+	 *
+	 * It will be replaced with uart configuration
+	 * once the issue is solved.
+	 */
+	GPIO0_GPIO	| PIN_INPUT_PULLUP,
+	GPIO1_GPIO	| PIN_OUTPUT_HIGH,
+	GPIO2_GPIO	| PIN_INPUT_PULLUP,
+	GPIO3_GPIO	| PIN_OUTPUT_LOW,
 
 	GPIO29_U2_RXD	| PIN_INPUT_PULLUP,
 	GPIO30_U2_TXD	| PIN_OUTPUT_HIGH,
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bb26f40..2a08c07 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -27,18 +27,21 @@
 #include <linux/leds-lp5521.h>
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
+#include <linux/delay.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
 #include <plat/i2c.h>
 #include <plat/ste_dma40.h>
+#include <plat/pincfg.h>
 
 #include <mach/hardware.h>
 #include <mach/setup.h>
 #include <mach/devices.h>
 #include <mach/irqs.h>
 
+#include "pins-db8500.h"
 #include "ste-dma40-db8500.h"
 #include "devices-db8500.h"
 #include "board-mop500.h"
@@ -393,12 +396,63 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
 };
 #endif
 
+
+static pin_cfg_t mop500_pins_uart0[] = {
+	GPIO0_U0_CTSn   | PIN_INPUT_PULLUP,
+	GPIO1_U0_RTSn   | PIN_OUTPUT_HIGH,
+	GPIO2_U0_RXD    | PIN_INPUT_PULLUP,
+	GPIO3_U0_TXD    | PIN_OUTPUT_HIGH,
+};
+
+#define PRCC_K_SOFTRST_SET      0x18
+#define PRCC_K_SOFTRST_CLEAR    0x1C
+static void ux500_uart0_reset(void)
+{
+	void __iomem *prcc_rst_set, *prcc_rst_clr;
+
+	prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
+			PRCC_K_SOFTRST_SET);
+	prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
+			PRCC_K_SOFTRST_CLEAR);
+
+	/* Activate soft reset PRCC_K_SOFTRST_CLEAR */
+	writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
+	udelay(1);
+
+	/* Release soft reset PRCC_K_SOFTRST_SET */
+	writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
+	udelay(1);
+}
+
+static void ux500_uart0_init(void)
+{
+	int ret;
+
+	ret = nmk_config_pins(mop500_pins_uart0,
+			ARRAY_SIZE(mop500_pins_uart0));
+	if (ret < 0)
+		pr_err("pl011: uart pins_enable failed\n");
+}
+
+static void ux500_uart0_exit(void)
+{
+	int ret;
+
+	ret = nmk_config_pins_sleep(mop500_pins_uart0,
+			ARRAY_SIZE(mop500_pins_uart0));
+	if (ret < 0)
+		pr_err("pl011: uart pins_disable failed\n");
+}
+
 static struct amba_pl011_data uart0_plat = {
 #ifdef CONFIG_STE_DMA40
 	.dma_filter = stedma40_filter,
 	.dma_rx_param = &uart0_dma_cfg_rx,
 	.dma_tx_param = &uart0_dma_cfg_tx,
 #endif
+	.init = ux500_uart0_init,
+	.exit = ux500_uart0_exit,
+	.reset = ux500_uart0_reset,
 };
 
 static struct amba_pl011_data uart1_plat = {
-- 
1.7.3.2

Re: [PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[Russell King - ARM Linux]

On Thu, Jun 09, 2011 at 10:56:48PM +0200, Linus Walleij wrote:
> +	/* uart-0 pins gpio configuration should be
> +	 * kept intact to prevent glitch in tx line
> +	 * when tty dev is opened. Later these pins
> +	 * are configured to uart mop500_pins_uart0
> +	 *
> +	 * It will be replaced with uart configuration
> +	 * once the issue is solved.
> +	 */
> +	GPIO0_GPIO	| PIN_INPUT_PULLUP,
> +	GPIO1_GPIO	| PIN_OUTPUT_HIGH,
> +	GPIO2_GPIO	| PIN_INPUT_PULLUP,
> +	GPIO3_GPIO	| PIN_OUTPUT_LOW,

Why do you want the TXD line (GPIO3) to be indicating a break condition?

Re: [PATCH 2/2] amba pl011: platform data for reg lockup and glitch

[Shreshtha Kumar SAHU]

On Thu, Jun 09, 2011 at 23:02:18 +0200, Russell King - ARM Linux wrote:
> On Thu, Jun 09, 2011 at 10:56:48PM +0200, Linus Walleij wrote:
> > +	/* uart-0 pins gpio configuration should be
> > +	 * kept intact to prevent glitch in tx line
> > +	 * when tty dev is opened. Later these pins
> > +	 * are configured to uart mop500_pins_uart0
> > +	 *
> > +	 * It will be replaced with uart configuration
> > +	 * once the issue is solved.
> > +	 */
> > +	GPIO0_GPIO	| PIN_INPUT_PULLUP,
> > +	GPIO1_GPIO	| PIN_OUTPUT_HIGH,
> > +	GPIO2_GPIO	| PIN_INPUT_PULLUP,
> > +	GPIO3_GPIO	| PIN_OUTPUT_LOW,
> 
> Why do you want the TXD line (GPIO3) to be indicating a break condition?

Yes it should be PIN_OUTPUT_HIGH, as it is configured in mop500_pins_uart0.

Thanks,
Shreshtha