From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alan Cox Subject: Re: [PATCH 0/4] pch_uart: Cleanups, board quirks, and user uartclk parameter Date: Wed, 22 Feb 2012 08:58:30 +0000 Message-ID: <20120222085830.1ed8c25e@pyramind.ukuu.org.uk> References: Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Tomoya MORINAGA Cc: Darren Hart , Linux Kernel Mailing List , Feng Tang , Greg Kroah-Hartman , Alan Cox , linux-serial@vger.kernel.org List-Id: linux-serial@vger.kernel.org > > assume a 192 MHz clock on all boards. The problem with this approac= h is > > that the CLKCFG register may have been set to something other than = the > > 192MHz configuration by the firmware. So you can use the early PCI hooks or even bash the register directly i= n your early bootup code. You won't be the only early boot console that does this sort of thing. There are even people bitbanging PCI I=B2C interfaces at boot time for such purpose. > So, I think default uart_clock 192MHz setting is better than Darren's= opinion. It's certainly easier to maintain, but it would be good to know if the setting can be written or retrieved directly in the early console setup using the early PCI ops or similar. Alan Alan