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* [PATCH] sc16is7xx: fix incorrect register bits macro
@ 2015-12-19 11:20 Wills Wang
  2015-12-20  0:43 ` Greg KH
  0 siblings, 1 reply; 2+ messages in thread
From: Wills Wang @ 2015-12-19 11:20 UTC (permalink / raw)
  To: jringle, gregkh, linux-kernel, linux-serial; +Cc: Wills Wang

In datasheet, Modem Status Register MSR[4-5] reflect the modem pins
CTS/DSR/RI/CD signal state.

Signed-off-by: Wills Wang <wills.wang@live.com>
---
 drivers/tty/serial/sc16is7xx.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index edb5305..9d18c24 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -196,14 +196,14 @@
 						  * or (IO6)
 						  * - only on 75x/76x
 						  */
-#define SC16IS7XX_MSR_CTS_BIT		(1 << 0) /* CTS */
-#define SC16IS7XX_MSR_DSR_BIT		(1 << 1) /* DSR (IO4)
+#define SC16IS7XX_MSR_CTS_BIT		(1 << 4) /* CTS */
+#define SC16IS7XX_MSR_DSR_BIT		(1 << 5) /* DSR (IO4)
 						  * - only on 75x/76x
 						  */
-#define SC16IS7XX_MSR_RI_BIT		(1 << 2) /* RI (IO7)
+#define SC16IS7XX_MSR_RI_BIT		(1 << 6) /* RI (IO7)
 						  * - only on 75x/76x
 						  */
-#define SC16IS7XX_MSR_CD_BIT		(1 << 3) /* CD (IO6)
+#define SC16IS7XX_MSR_CD_BIT		(1 << 7) /* CD (IO6)
 						  * - only on 75x/76x
 						  */
 #define SC16IS7XX_MSR_DELTA_MASK	0x0F     /* Any of the delta bits! */
@@ -240,7 +240,7 @@
 
 /* IOControl register bits (Only 750/760) */
 #define SC16IS7XX_IOCONTROL_LATCH_BIT	(1 << 0) /* Enable input latching */
-#define SC16IS7XX_IOCONTROL_GPIO_BIT	(1 << 1) /* Enable GPIO[7:4] */
+#define SC16IS7XX_IOCONTROL_MODEM_BIT	(1 << 1) /* Enable GPIO[7:4] as modem pins */
 #define SC16IS7XX_IOCONTROL_SRESET_BIT	(1 << 3) /* Software Reset */
 
 /* EFCR register bits */
@@ -674,7 +674,7 @@ static void sc16is7xx_port_irq(struct sc16is7xx_port *s, int portno)
 		case SC16IS7XX_IIR_CTSRTS_SRC:
 			msr = sc16is7xx_port_read(port, SC16IS7XX_MSR_REG);
 			uart_handle_cts_change(port,
-					       !!(msr & SC16IS7XX_MSR_CTS_BIT));
+					       !!(msr & SC16IS7XX_MSR_DCTS_BIT));
 			break;
 		case SC16IS7XX_IIR_THRI_SRC:
 			sc16is7xx_handle_tx(port);
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] sc16is7xx: fix incorrect register bits macro
  2015-12-19 11:20 [PATCH] sc16is7xx: fix incorrect register bits macro Wills Wang
@ 2015-12-20  0:43 ` Greg KH
  0 siblings, 0 replies; 2+ messages in thread
From: Greg KH @ 2015-12-20  0:43 UTC (permalink / raw)
  To: Wills Wang; +Cc: jringle, linux-kernel, linux-serial

On Sat, Dec 19, 2015 at 07:20:06PM +0800, Wills Wang wrote:
> In datasheet, Modem Status Register MSR[4-5] reflect the modem pins
> CTS/DSR/RI/CD signal state.
> 
> Signed-off-by: Wills Wang <wills.wang@live.com>
> ---
>  drivers/tty/serial/sc16is7xx.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
> index edb5305..9d18c24 100644
> --- a/drivers/tty/serial/sc16is7xx.c
> +++ b/drivers/tty/serial/sc16is7xx.c
> @@ -196,14 +196,14 @@
>  						  * or (IO6)
>  						  * - only on 75x/76x
>  						  */
> -#define SC16IS7XX_MSR_CTS_BIT		(1 << 0) /* CTS */
> -#define SC16IS7XX_MSR_DSR_BIT		(1 << 1) /* DSR (IO4)
> +#define SC16IS7XX_MSR_CTS_BIT		(1 << 4) /* CTS */
> +#define SC16IS7XX_MSR_DSR_BIT		(1 << 5) /* DSR (IO4)

BIT(4)  BIT(5)?

Please do that at the same time...

thanks,

greg k-h

^ permalink raw reply	[flat|nested] 2+ messages in thread

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