From mboxrd@z Thu Jan 1 00:00:00 1970 From: Krzysztof Kozlowski Subject: [PATCH 3/3] dt-bindings: serial: Convert Samsung UART bindings to json-schema Date: Fri, 4 Oct 2019 17:14:14 +0200 Message-ID: <20191004151414.8458-3-krzk@kernel.org> References: <20191004151414.8458-1-krzk@kernel.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20191004151414.8458-1-krzk@kernel.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Kukjin Kim , Krzysztof Kozlowski , Rob Herring , Mark Rutland , David Airlie , Daniel Vetter , Lee Jones , Greg Kroah-Hartman , Maciej Falkowski , Marek Szyprowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-serial@vger.kernel.org List-Id: linux-serial@vger.kernel.org Q29udmVydCBTYW1zdW5nIFMzQy9TNVAvRXh5bm9zIFNlcmlhbC9VQVJUIGJpbmRpbmdzIHRvIERU IHNjaGVtYSBmb3JtYXQKdXNpbmcganNvbi1zY2hlbWEuCgpTaWduZWQtb2ZmLWJ5OiBLcnp5c3p0 b2YgS296bG93c2tpIDxrcnprQGtlcm5lbC5vcmc+Ci0tLQogLi4uL2JpbmRpbmdzL21mZC9zYW1z dW5nLGV4eW5vczU0MzMtbHBhc3MudHh0IHwgICAyICstCiAuLi4vYmluZGluZ3Mvc2VyaWFsL3Nh bXN1bmdfdWFydC50eHQgICAgICAgICAgfCAgNTggLS0tLS0tLQogLi4uL2JpbmRpbmdzL3Nlcmlh bC9zYW1zdW5nX3VhcnQueWFtbCAgICAgICAgIHwgMTQ4ICsrKysrKysrKysrKysrKysrKwogMyBm aWxlcyBjaGFuZ2VkLCAxNDkgaW5zZXJ0aW9ucygrKSwgNTkgZGVsZXRpb25zKC0pCiBkZWxldGUg bW9kZSAxMDA2NDQgRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3NlcmlhbC9zYW1z dW5nX3VhcnQudHh0CiBjcmVhdGUgbW9kZSAxMDA2NDQgRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVl L2JpbmRpbmdzL3NlcmlhbC9zYW1zdW5nX3VhcnQueWFtbAoKZGlmZiAtLWdpdCBhL0RvY3VtZW50 YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9tZmQvc2Ftc3VuZyxleHlub3M1NDMzLWxwYXNzLnR4 dCBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9tZmQvc2Ftc3VuZyxleHlub3M1 NDMzLWxwYXNzLnR4dAppbmRleCBkNzU5ZGE2MDZmNzUuLjMwZWEyN2MzOTM2ZCAxMDA2NDQKLS0t IGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL21mZC9zYW1zdW5nLGV4eW5vczU0 MzMtbHBhc3MudHh0CisrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9tZmQv c2Ftc3VuZyxleHlub3M1NDMzLWxwYXNzLnR4dApAQCAtMTgsNyArMTgsNyBAQCBhbiBvcHRpb25h bCBzdWItbm9kZS4gRm9yICJzYW1zdW5nLGV4eW5vczU0MzMtbHBhc3MiIGNvbXBhdGlibGUgdGhp cyBpbmNsdWRlczoKIFVBUlQsIFNMSU1CVVMsIFBDTSwgSTJTLCBETUFDLCBUaW1lcnMgMC4uLjQs IFZJQywgV0RUIDAuLi4xIGRldmljZXMuCiAKIEJpbmRpbmdzIG9mIHRoZSBzdWItbm9kZXMgYXJl IGRlc2NyaWJlZCBpbjoKLSAgLi4vc2VyaWFsL3NhbXN1bmdfdWFydC50eHQKKyAgLi4vc2VyaWFs L3NhbXN1bmdfdWFydC55YW1sCiAgIC4uL3NvdW5kL3NhbXN1bmctaTJzLnR4dAogICAuLi9kbWEv YXJtLXBsMzMwLnR4dAogCmRpZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmlu ZGluZ3Mvc2VyaWFsL3NhbXN1bmdfdWFydC50eHQgYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUv YmluZGluZ3Mvc2VyaWFsL3NhbXN1bmdfdWFydC50eHQKZGVsZXRlZCBmaWxlIG1vZGUgMTAwNjQ0 CmluZGV4IGU4NWYzN2VjMzNmMC4uMDAwMDAwMDAwMDAwCi0tLSBhL0RvY3VtZW50YXRpb24vZGV2 aWNldHJlZS9iaW5kaW5ncy9zZXJpYWwvc2Ftc3VuZ191YXJ0LnR4dAorKysgL2Rldi9udWxsCkBA IC0xLDU4ICswLDAgQEAKLSogU2Ftc3VuZydzIFVBUlQgQ29udHJvbGxlcgotCi1UaGUgU2Ftc3Vu ZydzIFVBUlQgY29udHJvbGxlciBpcyB1c2VkIGZvciBpbnRlcmZhY2luZyBTb0Mgd2l0aCBzZXJp YWwKLWNvbW11bmljYWlvbiBkZXZpY2VzLgotCi1SZXF1aXJlZCBwcm9wZXJ0aWVzOgotLSBjb21w YXRpYmxlOiBzaG91bGQgYmUgb25lIG9mIGZvbGxvd2luZzoKLSAgLSAic2Ftc3VuZyxleHlub3M0 MjEwLXVhcnQiIC0gIEV4eW5vczQyMTAgU29DLAotICAtICJzYW1zdW5nLHMzYzI0MTAtdWFydCIg LSBjb21wYXRpYmxlIHdpdGggcG9ydHMgcHJlc2VudCBvbiBTM0MyNDEwIFNvQywKLSAgLSAic2Ft c3VuZyxzM2MyNDEyLXVhcnQiIC0gY29tcGF0aWJsZSB3aXRoIHBvcnRzIHByZXNlbnQgb24gUzND MjQxMiBTb0MsCi0gIC0gInNhbXN1bmcsczNjMjQ0MC11YXJ0IiAtIGNvbXBhdGlibGUgd2l0aCBw b3J0cyBwcmVzZW50IG9uIFMzQzI0NDAgU29DLAotICAtICJzYW1zdW5nLHMzYzY0MDAtdWFydCIg LSBjb21wYXRpYmxlIHdpdGggcG9ydHMgcHJlc2VudCBvbiBTM0M2NDAwIFNvQywKLSAgLSAic2Ft c3VuZyxzNXB2MjEwLXVhcnQiIC0gY29tcGF0aWJsZSB3aXRoIHBvcnRzIHByZXNlbnQgb24gUzVQ VjIxMCBTb0MuCi0KLS0gcmVnOiBiYXNlIHBoeXNpY2FsIGFkZHJlc3Mgb2YgdGhlIGNvbnRyb2xs ZXIgYW5kIGxlbmd0aCBvZiBtZW1vcnkgbWFwcGVkCi0gIHJlZ2lvbi4KLQotLSBpbnRlcnJ1cHRz OiBhIHNpbmdsZSBpbnRlcnJ1cHQgc2lnbmFsIHRvIFNvQyBpbnRlcnJ1cHQgY29udHJvbGxlciwK LSAgYWNjb3JkaW5nIHRvIGludGVycnVwdCBiaW5kaW5ncyBkb2N1bWVudGF0aW9uIFsxXS4KLQot LSBjbG9jay1uYW1lczogaW5wdXQgbmFtZXMgb2YgY2xvY2tzIHVzZWQgYnkgdGhlIGNvbnRyb2xs ZXI6Ci0gIC0gInVhcnQiIC0gY29udHJvbGxlciBidXMgY2xvY2ssCi0gIC0gImNsa191YXJ0X2Jh dWROIiAtIE50aCBiYXVkIGJhc2UgY2xvY2sgaW5wdXQgKE4gPSAwLCAxLCAuLi4pLAotICAgIGFj Y29yZGluZyB0byBTb0MgVXNlcidzIE1hbnVhbCAob25seSBOID0gMCBpcyBhbGxvd2VkZm9yIFNv Q3Mgd2l0aG91dAotICAgIGludGVybmFsIGJhdWQgY2xvY2sgbXV4KS4KLS0gY2xvY2tzOiBwaGFu ZGxlcyBhbmQgc3BlY2lmaWVycyBmb3IgYWxsIGNsb2NrcyBzcGVjaWZpZWQgaW4gImNsb2NrLW5h bWVzIgotICBwcm9wZXJ0eSwgaW4gdGhlIHNhbWUgb3JkZXIsIGFjY29yZGluZyB0byBjbG9jayBi aW5kaW5ncyBkb2N1bWVudGF0aW9uIFsyXS4KLQotWzFdIERvY3VtZW50YXRpb24vZGV2aWNldHJl ZS9iaW5kaW5ncy9pbnRlcnJ1cHQtY29udHJvbGxlci9pbnRlcnJ1cHRzLnR4dAotWzJdIERvY3Vt ZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9jbG9jay9jbG9jay1iaW5kaW5ncy50eHQKLQot T3B0aW9uYWwgcHJvcGVydGllczoKLS0gc2Ftc3VuZyx1YXJ0LWZpZm9zaXplOiBUaGUgZmlmbyBz aXplIHN1cHBvcnRlZCBieSB0aGUgVUFSVCBjaGFubmVsCi0KLU5vdGU6IEVhY2ggU2Ftc3VuZyBV QVJUIHNob3VsZCBoYXZlIGFuIGFsaWFzIGNvcnJlY3RseSBudW1iZXJlZCBpbiB0aGUKLSJhbGlh c2VzIiBub2RlLCBhY2NvcmRpbmcgdG8gc2VyaWFsTiBmb3JtYXQsIHdoZXJlIE4gaXMgdGhlIHBv cnQgbnVtYmVyCi0obm9uLW5lZ2F0aXZlIGRlY2ltYWwgaW50ZWdlcikgYXMgc3BlY2lmaWVkIGJ5 IFVzZXIncyBNYW51YWwgb2YgcmVzcGVjdGl2ZQotU29DLgotCi1FeGFtcGxlOgotCWFsaWFzZXMg ewotCQlzZXJpYWwwID0gJnVhcnQwOwotCQlzZXJpYWwxID0gJnVhcnQxOwotCQlzZXJpYWwyID0g JnVhcnQyOwotCX07Ci0KLUV4YW1wbGU6Ci0JdWFydDE6IHNlcmlhbEA3ZjAwNTQwMCB7Ci0JCWNv bXBhdGlibGUgPSAic2Ftc3VuZyxzM2M2NDAwLXVhcnQiOwotCQlyZWcgPSA8MHg3ZjAwNTQwMCAw eDEwMD47Ci0JCWludGVycnVwdC1wYXJlbnQgPSA8JnZpYzE+OwotCQlpbnRlcnJ1cHRzID0gPDY+ OwotCQljbG9jay1uYW1lcyA9ICJ1YXJ0IiwgImNsa191YXJ0X2JhdWQyIiwKLQkJCQkiY2xrX3Vh cnRfYmF1ZDMiOwotCQljbG9ja3MgPSA8JmNsb2NrcyBQQ0xLX1VBUlQxPiwgPCZjbG9ja3MgUENM S19VQVJUMT4sCi0JCQkJPCZjbG9ja3MgU0NMS19VQVJUPjsKLQkJc2Ftc3VuZyx1YXJ0LWZpZm9z aXplID0gPDE2PjsKLQl9OwpkaWZmIC0tZ2l0IGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2Jp bmRpbmdzL3NlcmlhbC9zYW1zdW5nX3VhcnQueWFtbCBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJl ZS9iaW5kaW5ncy9zZXJpYWwvc2Ftc3VuZ191YXJ0LnlhbWwKbmV3IGZpbGUgbW9kZSAxMDA2NDQK aW5kZXggMDAwMDAwMDAwMDAwLi4yNzZiZWExYzIzMWEKLS0tIC9kZXYvbnVsbAorKysgYi9Eb2N1 bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mvc2VyaWFsL3NhbXN1bmdfdWFydC55YW1sCkBA IC0wLDAgKzEsMTQ4IEBACisjIFNQRFgtTGljZW5zZS1JZGVudGlmaWVyOiBHUEwtMi4wCislWUFN TCAxLjIKKy0tLQorJGlkOiBodHRwOi8vZGV2aWNldHJlZS5vcmcvc2NoZW1hcy9zZXJpYWwvc2Ft c3VuZ191YXJ0LnlhbWwjCiskc2NoZW1hOiBodHRwOi8vZGV2aWNldHJlZS5vcmcvbWV0YS1zY2hl bWFzL2NvcmUueWFtbCMKKwordGl0bGU6IFNhbXN1bmcgUzNDLCBTNVAgYW5kIEV4eW5vcyBTb0Mg VUFSVCBDb250cm9sbGVyCisKK21haW50YWluZXJzOgorICAtIEtyenlzenRvZiBLb3psb3dza2kg PGtyemtAa2VybmVsLm9yZz4KKyAgLSBHcmVnIEtyb2FoLUhhcnRtYW4gPGdyZWdraEBsaW51eGZv dW5kYXRpb24ub3JnPgorCitkZXNjcmlwdGlvbjogfCsKKyAgRWFjaCBTYW1zdW5nIFVBUlQgc2hv dWxkIGhhdmUgYW4gYWxpYXMgY29ycmVjdGx5IG51bWJlcmVkIGluIHRoZSAiYWxpYXNlcyIKKyAg bm9kZSwgYWNjb3JkaW5nIHRvIHNlcmlhbE4gZm9ybWF0LCB3aGVyZSBOIGlzIHRoZSBwb3J0IG51 bWJlciAobm9uLW5lZ2F0aXZlCisgIGRlY2ltYWwgaW50ZWdlcikgYXMgc3BlY2lmaWVkIGJ5IFVz ZXIncyBNYW51YWwgb2YgcmVzcGVjdGl2ZSBTb0MuCisKK3Byb3BlcnRpZXM6CisgIGNvbXBhdGli bGU6CisgICAgaXRlbXM6CisgICAgICAtIGVudW06CisgICAgICAgICAgLSBzYW1zdW5nLHMzYzI0 MTAtdWFydAorICAgICAgICAgIC0gc2Ftc3VuZyxzM2MyNDEyLXVhcnQKKyAgICAgICAgICAtIHNh bXN1bmcsczNjMjQ0MC11YXJ0CisgICAgICAgICAgLSBzYW1zdW5nLHMzYzY0MDAtdWFydAorICAg ICAgICAgIC0gc2Ftc3VuZyxzNXB2MjEwLXVhcnQKKyAgICAgICAgICAtIHNhbXN1bmcsZXh5bm9z NDIxMC11YXJ0CisKKyAgcmVnOgorICAgIG1heEl0ZW1zOiAxCisKKyAgY2xvY2tzOgorICAgIG1p bkl0ZW1zOiAyCisgICAgbWF4SXRlbXM6IDUKKworICBjbG9jay1uYW1lczoKKyAgICBkZXNjcmlw dGlvbjogfAorICAgICAgTGlzdCBvZiBjbG9jayBuYW1lczoKKyAgICAgICAgLSAidWFydCIgLSBj b250cm9sbGVyIGJ1cyBjbG9jaywKKyAgICAgICAgLSAiY2xrX3VhcnRfYmF1ZE4iIC0gTnRoIGJh dWQgYmFzZSBjbG9jayBpbnB1dCAoTiA9IDAsIDEsIC4uLikuCisgICAgICBOID0gMCBpcyBhbGxv d2VkIGZvciBTb0NzIHdpdGhvdXQgaW50ZXJuYWwgYmF1ZCBjbG9jayBtdXguCisgICAgbWluSXRl bXM6IDIKKyAgICBtYXhJdGVtczogNQorICAgIGFsbE9mOgorICAgICAgLSB1bmlxdWVJdGVtczog dHJ1ZQorICAgICAgLSBvbmVPZjoKKyAgICAgICAgICAtIGl0ZW1zOgorICAgICAgICAgICAgICAt IGNvbnN0OiB1YXJ0CisgICAgICAgICAgICAgIC0gcGF0dGVybjogJ15jbGtfdWFydF9iYXVkWzAt M10kJworICAgICAgICAgIC0gaXRlbXM6CisgICAgICAgICAgICAgIC0gY29uc3Q6IHVhcnQKKyAg ICAgICAgICAgICAgLSBwYXR0ZXJuOiAnXmNsa191YXJ0X2JhdWRbMC0zXSQnCisgICAgICAgICAg ICAgIC0gcGF0dGVybjogJ15jbGtfdWFydF9iYXVkWzAtM10kJworICAgICAgICAgIC0gaXRlbXM6 CisgICAgICAgICAgICAgIC0gY29uc3Q6IHVhcnQKKyAgICAgICAgICAgICAgLSBwYXR0ZXJuOiAn XmNsa191YXJ0X2JhdWRbMC0zXSQnCisgICAgICAgICAgICAgIC0gcGF0dGVybjogJ15jbGtfdWFy dF9iYXVkWzAtM10kJworICAgICAgICAgICAgICAtIHBhdHRlcm46ICdeY2xrX3VhcnRfYmF1ZFsw LTNdJCcKKyAgICAgICAgICAtIGl0ZW1zOgorICAgICAgICAgICAgICAtIGNvbnN0OiB1YXJ0Cisg ICAgICAgICAgICAgIC0gcGF0dGVybjogJ15jbGtfdWFydF9iYXVkWzAtM10kJworICAgICAgICAg ICAgICAtIHBhdHRlcm46ICdeY2xrX3VhcnRfYmF1ZFswLTNdJCcKKyAgICAgICAgICAgICAgLSBw YXR0ZXJuOiAnXmNsa191YXJ0X2JhdWRbMC0zXSQnCisgICAgICAgICAgICAgIC0gcGF0dGVybjog J15jbGtfdWFydF9iYXVkWzAtM10kJworCisgIGludGVycnVwdHM6CisgICAgbWluSXRlbXM6IDEK KyAgICBtYXhJdGVtczogMgorCisgIHNhbXN1bmcsdWFydC1maWZvc2l6ZToKKyAgICBkZXNjcmlw dGlvbjogVGhlIGZpZm8gc2l6ZSBzdXBwb3J0ZWQgYnkgdGhlIFVBUlQgY2hhbm5lbAorICAgIGFs bE9mOgorICAgICAgLSAkcmVmOiAvc2NoZW1hcy90eXBlcy55YW1sIy9kZWZpbml0aW9ucy91aW50 MzIKKyAgICAgIC0gZW51bTogWzE2LCA2NCwgMjU2XQorCityZXF1aXJlZDoKKyAgLSBjb21wYXRp YmxlCisgIC0gY2xvY2tzCisgIC0gY2xvY2stbmFtZXMKKyAgLSBpbnRlcnJ1cHRzCisgIC0gcmVn CisKK2FsbE9mOgorICAtIGlmOgorICAgICAgcHJvcGVydGllczoKKyAgICAgICAgY29tcGF0aWJs ZToKKyAgICAgICAgICBjb250YWluczoKKyAgICAgICAgICAgIGVudW06CisgICAgICAgICAgICAg IC0gc2Ftc3VuZyxzM2MyNDEwLXVhcnQKKyAgICAgICAgICAgICAgLSBzYW1zdW5nLHM1cHYyMTAt dWFydAorICAgIHRoZW46CisgICAgICBwcm9wZXJ0aWVzOgorICAgICAgICBjbG9ja3M6CisgICAg ICAgICAgbWluSXRlbXM6IDIKKyAgICAgICAgICBtYXhJdGVtczogMworICAgICAgICBjbG9jay1u YW1lczoKKyAgICAgICAgICBtaW5JdGVtczogMgorICAgICAgICAgIG1heEl0ZW1zOiAzCisgICAg ICAgICAgYWxsT2Y6CisgICAgICAgICAgICAtIHVuaXF1ZUl0ZW1zOiB0cnVlCisgICAgICAgICAg ICAtIG9uZU9mOgorICAgICAgICAgICAgICAgIC0gaXRlbXM6CisgICAgICAgICAgICAgICAgICAg IC0gY29uc3Q6IHVhcnQKKyAgICAgICAgICAgICAgICAgICAgLSBwYXR0ZXJuOiAnXmNsa191YXJ0 X2JhdWRbMC0xXSQnCisgICAgICAgICAgICAgICAgLSBpdGVtczoKKyAgICAgICAgICAgICAgICAg ICAgLSBjb25zdDogdWFydAorICAgICAgICAgICAgICAgICAgICAtIHBhdHRlcm46ICdeY2xrX3Vh cnRfYmF1ZFswLTFdJCcKKyAgICAgICAgICAgICAgICAgICAgLSBwYXR0ZXJuOiAnXmNsa191YXJ0 X2JhdWRbMC0xXSQnCisKKyAgLSBpZjoKKyAgICAgIHByb3BlcnRpZXM6CisgICAgICAgIGNvbXBh dGlibGU6CisgICAgICAgICAgY29udGFpbnM6CisgICAgICAgICAgICBlbnVtOgorICAgICAgICAg ICAgICAtIHNhbXN1bmcsZXh5bm9zNDIxMC11YXJ0CisgICAgdGhlbjoKKyAgICAgIHByb3BlcnRp ZXM6CisgICAgICAgIGNsb2NrczoKKyAgICAgICAgICBtaW5JdGVtczogMgorICAgICAgICAgIG1h eEl0ZW1zOiAyCisgICAgICAgIGNsb2NrLW5hbWVzOgorICAgICAgICAgIG1pbkl0ZW1zOiAyCisg ICAgICAgICAgbWF4SXRlbXM6IDIKKyAgICAgICAgICBhbGxPZjoKKyAgICAgICAgICAgIC0gdW5p cXVlSXRlbXM6IHRydWUKKyAgICAgICAgICAgIC0gaXRlbXM6CisgICAgICAgICAgICAgICAgLSBj b25zdDogdWFydAorICAgICAgICAgICAgICAgIC0gY29uc3Q6IGNsa191YXJ0X2JhdWQwCisKK2V4 YW1wbGVzOgorICAtIHwKKyAgICAjaW5jbHVkZSA8ZHQtYmluZGluZ3MvY2xvY2svc2Ftc3VuZyxz M2M2NHh4LWNsb2NrLmg+CisKKyAgICBhbGlhc2VzIHsKKyAgICAgICAgc2VyaWFsMCA9ICZ1YXJ0 MDsKKyAgICB9OworCisgICAgdWFydDA6IHNlcmlhbEA3ZjAwNTAwMCB7CisgICAgICAgIGNvbXBh dGlibGUgPSAic2Ftc3VuZyxzM2M2NDAwLXVhcnQiOworICAgICAgICByZWcgPSA8MHg3ZjAwNTAw MCAweDEwMD47CisgICAgICAgIGludGVycnVwdC1wYXJlbnQgPSA8JnZpYzE+OworICAgICAgICBp bnRlcnJ1cHRzID0gPDU+OworICAgICAgICBjbG9jay1uYW1lcyA9ICJ1YXJ0IiwgImNsa191YXJ0 X2JhdWQyIiwKKyAgICAgICAgICAgICAgICAgICAgICAiY2xrX3VhcnRfYmF1ZDMiOworICAgICAg ICBjbG9ja3MgPSA8JmNsb2NrcyBQQ0xLX1VBUlQwPiwgPCZjbG9ja3MgUENMS19VQVJUMD4sCisg ICAgICAgICAgICAgICAgIDwmY2xvY2tzIFNDTEtfVUFSVD47CisgICAgICAgIHNhbXN1bmcsdWFy dC1maWZvc2l6ZSA9IDwxNj47CisgICAgfTsKLS0gCjIuMTcuMQoKX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmkt ZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3Jn L21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVs From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5259C47404 for ; Fri, 4 Oct 2019 15:14:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A3249207FF for ; Fri, 4 Oct 2019 15:14:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570202080; bh=jGn2GriHknRcM7VEKcN/Vhe/Y3uO7QORd6PlkeTX3q4=; h=From:To:Subject:Date:In-Reply-To:References:List-ID:From; b=vG443qSW9ePXp6+rq4Xr/RfsKsssfyCfFzqh7oVrpBmAjMgGIQr4xaZj6zJflQ5OJ fTKl5Aq9GqUJY4rbUsUT6sYZOYH0I54XP+3hfNJtsHM2sD2IIA9hlfzyJFgIIETmcF TPAbiOTHeprqSEl+mDOsllLW7XHj2GIkhwgWz2aA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389165AbfJDPOg (ORCPT ); Fri, 4 Oct 2019 11:14:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:52402 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388802AbfJDPOf (ORCPT ); Fri, 4 Oct 2019 11:14:35 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A4B08207FF; Fri, 4 Oct 2019 15:14:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570202074; bh=jGn2GriHknRcM7VEKcN/Vhe/Y3uO7QORd6PlkeTX3q4=; h=From:To:Subject:Date:In-Reply-To:References:From; b=biAfqQM7ksmdl6mE9+E6iqLHtsiTP7ck7fq/ivIpyTTedBKFP9Se204xAqgDrwbNI jc/1GqGw5vGRFIzak0OnN/rnzhz6AFddTd+72tYCbnN6dVR/AbLTFaWYf8vf09giWG l5YRnMkEZuVKfYWfVWLpMBAoiP24ZYbX7xMUR79c= From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Rob Herring , Mark Rutland , David Airlie , Daniel Vetter , Lee Jones , Greg Kroah-Hartman , Maciej Falkowski , Marek Szyprowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-serial@vger.kernel.org Subject: [PATCH 3/3] dt-bindings: serial: Convert Samsung UART bindings to json-schema Date: Fri, 4 Oct 2019 17:14:14 +0200 Message-Id: <20191004151414.8458-3-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191004151414.8458-1-krzk@kernel.org> References: <20191004151414.8458-1-krzk@kernel.org> Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Message-ID: <20191004151414.gOUheH7Mfhit-FNzekoVsFcKGCD36UH4GCpaKZt0HGw@z> Convert Samsung S3C/S5P/Exynos Serial/UART bindings to DT schema format using json-schema. Signed-off-by: Krzysztof Kozlowski --- .../bindings/mfd/samsung,exynos5433-lpass.txt | 2 +- .../bindings/serial/samsung_uart.txt | 58 ------- .../bindings/serial/samsung_uart.yaml | 148 ++++++++++++++++++ 3 files changed, 149 insertions(+), 59 deletions(-) delete mode 100644 Documentation/devicetree/bindings/serial/samsung_uart.txt create mode 100644 Documentation/devicetree/bindings/serial/samsung_uart.yaml diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt index d759da606f75..30ea27c3936d 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt +++ b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt @@ -18,7 +18,7 @@ an optional sub-node. For "samsung,exynos5433-lpass" compatible this includes: UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices. Bindings of the sub-nodes are described in: - ../serial/samsung_uart.txt + ../serial/samsung_uart.yaml ../sound/samsung-i2s.txt ../dma/arm-pl330.txt diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.txt b/Documentation/devicetree/bindings/serial/samsung_uart.txt deleted file mode 100644 index e85f37ec33f0..000000000000 --- a/Documentation/devicetree/bindings/serial/samsung_uart.txt +++ /dev/null @@ -1,58 +0,0 @@ -* Samsung's UART Controller - -The Samsung's UART controller is used for interfacing SoC with serial -communicaion devices. - -Required properties: -- compatible: should be one of following: - - "samsung,exynos4210-uart" - Exynos4210 SoC, - - "samsung,s3c2410-uart" - compatible with ports present on S3C2410 SoC, - - "samsung,s3c2412-uart" - compatible with ports present on S3C2412 SoC, - - "samsung,s3c2440-uart" - compatible with ports present on S3C2440 SoC, - - "samsung,s3c6400-uart" - compatible with ports present on S3C6400 SoC, - - "samsung,s5pv210-uart" - compatible with ports present on S5PV210 SoC. - -- reg: base physical address of the controller and length of memory mapped - region. - -- interrupts: a single interrupt signal to SoC interrupt controller, - according to interrupt bindings documentation [1]. - -- clock-names: input names of clocks used by the controller: - - "uart" - controller bus clock, - - "clk_uart_baudN" - Nth baud base clock input (N = 0, 1, ...), - according to SoC User's Manual (only N = 0 is allowedfor SoCs without - internal baud clock mux). -- clocks: phandles and specifiers for all clocks specified in "clock-names" - property, in the same order, according to clock bindings documentation [2]. - -[1] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt -[2] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Optional properties: -- samsung,uart-fifosize: The fifo size supported by the UART channel - -Note: Each Samsung UART should have an alias correctly numbered in the -"aliases" node, according to serialN format, where N is the port number -(non-negative decimal integer) as specified by User's Manual of respective -SoC. - -Example: - aliases { - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - }; - -Example: - uart1: serial@7f005400 { - compatible = "samsung,s3c6400-uart"; - reg = <0x7f005400 0x100>; - interrupt-parent = <&vic1>; - interrupts = <6>; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>, - <&clocks SCLK_UART>; - samsung,uart-fifosize = <16>; - }; diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml new file mode 100644 index 000000000000..276bea1c231a --- /dev/null +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/samsung_uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S3C, S5P and Exynos SoC UART Controller + +maintainers: + - Krzysztof Kozlowski + - Greg Kroah-Hartman + +description: |+ + Each Samsung UART should have an alias correctly numbered in the "aliases" + node, according to serialN format, where N is the port number (non-negative + decimal integer) as specified by User's Manual of respective SoC. + +properties: + compatible: + items: + - enum: + - samsung,s3c2410-uart + - samsung,s3c2412-uart + - samsung,s3c2440-uart + - samsung,s3c6400-uart + - samsung,s5pv210-uart + - samsung,exynos4210-uart + + reg: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 5 + + clock-names: + description: | + List of clock names: + - "uart" - controller bus clock, + - "clk_uart_baudN" - Nth baud base clock input (N = 0, 1, ...). + N = 0 is allowed for SoCs without internal baud clock mux. + minItems: 2 + maxItems: 5 + allOf: + - uniqueItems: true + - oneOf: + - items: + - const: uart + - pattern: '^clk_uart_baud[0-3]$' + - items: + - const: uart + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + - items: + - const: uart + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + - items: + - const: uart + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + + interrupts: + minItems: 1 + maxItems: 2 + + samsung,uart-fifosize: + description: The fifo size supported by the UART channel + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [16, 64, 256] + +required: + - compatible + - clocks + - clock-names + - interrupts + - reg + +allOf: + - if: + properties: + compatible: + contains: + enum: + - samsung,s3c2410-uart + - samsung,s5pv210-uart + then: + properties: + clocks: + minItems: 2 + maxItems: 3 + clock-names: + minItems: 2 + maxItems: 3 + allOf: + - uniqueItems: true + - oneOf: + - items: + - const: uart + - pattern: '^clk_uart_baud[0-1]$' + - items: + - const: uart + - pattern: '^clk_uart_baud[0-1]$' + - pattern: '^clk_uart_baud[0-1]$' + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos4210-uart + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + minItems: 2 + maxItems: 2 + allOf: + - uniqueItems: true + - items: + - const: uart + - const: clk_uart_baud0 + +examples: + - | + #include + + aliases { + serial0 = &uart0; + }; + + uart0: serial@7f005000 { + compatible = "samsung,s3c6400-uart"; + reg = <0x7f005000 0x100>; + interrupt-parent = <&vic1>; + interrupts = <5>; + clock-names = "uart", "clk_uart_baud2", + "clk_uart_baud3"; + clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, + <&clocks SCLK_UART>; + samsung,uart-fifosize = <16>; + }; -- 2.17.1