From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2918AC433FE for ; Tue, 29 Mar 2022 08:30:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231276AbiC2Ibk (ORCPT ); Tue, 29 Mar 2022 04:31:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230520AbiC2Ibk (ORCPT ); Tue, 29 Mar 2022 04:31:40 -0400 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3F915FB7; Tue, 29 Mar 2022 01:29:56 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 5424820009; Tue, 29 Mar 2022 08:29:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1648542595; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=j5GWTy6NIAfg/vAYQJzWg3+aSkvKpg08FMN6BwsyIdY=; b=AXg2gqxny4w87SQK9erjxAFYkh/RFuLDxipTe3+6EWjGUN+dyIKGbe/G83jcbB4rS0ZSvO zpXP28oG6Ubd83cjuEMuDKvL3dCepdpPTX/1r3xymgqK04Tfu/1XTXnwO/WvCJQoP/hcI6 Q8tYJrIPhJwfkj6cUWnYvktLV6esnnDsNDGZPA1i95RikWpG0aBrnzdQTyjeN2Y1Nwpb8X n2axH402dw66BCE5FVZdX+tuGoFJqH3v9pRxoXGBW59uThnbwOTBh5AyG7rVLjGdIs6aFi 25XamlamV0adGl9NejIt+woMglIyTi10OTsMieXj628eDdkDTU2jqOmv3PQbSg== Date: Tue, 29 Mar 2022 10:29:51 +0200 From: Miquel Raynal To: Andy Shevchenko Cc: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Greg Kroah-Hartman , Jiri Slaby , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org Subject: Re: [PATCH v2 08/10] serial: 8250: dw: Add support for DMA flow controlling devices Message-ID: <20220329102951.579e154d@xps13> In-Reply-To: References: <20220317174627.360815-1-miquel.raynal@bootlin.com> <20220317174627.360815-9-miquel.raynal@bootlin.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Hi Andy, andriy.shevchenko@linux.intel.com wrote on Fri, 18 Mar 2022 16:24:51 +0200: > On Thu, Mar 17, 2022 at 06:46:25PM +0100, Miquel Raynal wrote: > > From: Phil Edworthy > >=20 > > DW based controllers like the one on Renesas RZ/N1 must be programmed as > > flow controllers when using DMA. > >=20 > > * Table 11.45 of the system manual, "Flow Control Combinations", states > > that using UART with DMA requires setting the DMA in the peripheral > > flow controller mode regardless of the direction. > >=20 > > * Chapter 11.6.1.3 of the system manual, "Basic Interface Definitions", > > explains that the burst size in the above case must be configured in > > the peripheral's register DEST/SRC_BURST_SIZE. > >=20 > > Experiments shown that upon Rx timeout, the DMA transaction needed to be > > manually cleared as well. =20 >=20 > ... >=20 > > +#define DW_UART_TDMACR 0x10c /* DMA Control Register Transmit Mode */ > > +#define DW_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */ = =20 >=20 > These are not Synposys ones. Ok > ... >=20 > > +static u32 dw8250_rzn1_get_dmacr_burst(int max_burst) > > +{ > > + if (max_burst >=3D 8) > > + return DW_UART_xDMACR_8_WORD_BURST; > > + else if (max_burst >=3D 4) > > + return DW_UART_xDMACR_4_WORD_BURST; > > + else > > + return DW_UART_xDMACR_1_WORD_BURST; > > +} =20 >=20 > Redundant 'else' in all cases. I'm sorry but dropping the else statement here does not make any sense. I find it much easier to the eyes the current way. Thanks, Miqu=C3=A8l