Re: [PATCH v1 4/5] fpga: dfl: add generic support for MSIX interrupts

Andy Shevchenko
2022-09-08T11:04:29Z

On Wed, Sep 07, 2022 at 02:37:32PM -0700, matthew.gerlach@linux.intel.com wrote:
> On Tue, 6 Sep 2022, Andy Shevchenko wrote:
> > On Tue, Sep 06, 2022 at 12:04:25PM -0700, matthew.gerlach@linux.intel.com wrote:

...

> > > + if (fid != FEATURE_ID_AFU && fid != PORT_FEATURE_ID_ERROR &&
> > > + fid != PORT_FEATURE_ID_UINT && fid != FME_FEATURE_ID_GLOBAL_ERR) {
> > > + v = readq(base);
> > > + v = FIELD_GET(DFH_VERSION, v);
> > > +
> > > + if (v == 1) {
> > > + v = readq(base + DFHv1_CSR_SIZE_GRP);
> >
> > I am already lost what v keeps...
> >
> > Perhaps
> >
> > v = readq(base);
> > switch (FIELD_GET(DFH_VERSION, v)) {
> > case 1:
> > ...
> > break;
> > }
>
> How about?
> if (FIELD_GET(DFH_VERSION, readq(base)) == 1) {
> ...
> }

This one tends to be expanded in the future, so I would keep it switch case.

--
With Best Regards,
Andy Shevchenko