* [PATCH 1/4] PCI: Add device IDs for Brainboxes/Intashield PX/UC/UP cards
@ 2023-09-21 21:09 Cameron Williams
2023-09-21 21:58 ` Bjorn Helgaas
0 siblings, 1 reply; 3+ messages in thread
From: Cameron Williams @ 2023-09-21 21:09 UTC (permalink / raw)
To: bhelgaas; +Cc: linux-pci, linux-kernel, linux-serial, sudipm.mukherjee, gregkh
Add device IDs for PCI/PCIe serial cards manufactured by
Brainboxes (IS/IX/UC/UP/PX).
Apologies if this file isn't strictly for your tree. All trees
I am sending this patch series to use these PCI IDs, I was unsure
if this was the correct way to go about it, and better safe than
sorry. Thank you for understanding and please disregard if
its not required.
Signed-off-by: Cameron Williams <cang1@live.co.uk>
---
include/linux/pci_ids.h | 95 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 95 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 5fb3d4c393a9..82a64459c20e 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1920,9 +1920,104 @@
#define PCI_VENDOR_ID_DOMEX 0x134a
#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
+/* Intashield or Brainboxes */
#define PCI_VENDOR_ID_INTASHIELD 0x135a
+#define PCI_DEVICE_ID_INTASHIELD_UC268 0x0841
+#define PCI_DEVICE_ID_INTASHIELD_UC257 0x0861 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UC257R3 0x0862 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UC257R4 0x0863 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UC279 0x0881
+#define PCI_DEVICE_ID_INTASHIELD_UC313 0x08a1 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UC313R3 0x08a2 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UC313R4 0x08a3 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UC310 0x08c1
+#define PCI_DEVICE_ID_INTASHIELD_UC302 0x08e1 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UC302R3 0x08e2 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UC302R4 0x08e3 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UC431 0x0901
+#define PCI_DEVICE_ID_INTASHIELD_UC420 0x0921
+#define PCI_DEVICE_ID_INTASHIELD_UP400 0x0941
+#define PCI_DEVICE_ID_INTASHIELD_UP376 0x0961
+#define PCI_DEVICE_ID_INTASHIELD_UC475 0x0981 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UC475R3 0x0982 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UC607 0x09a1 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UC607R3 0x09a2 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UC607R4 0x09a3 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UC324 0x0a61
+#define PCI_DEVICE_ID_INTASHIELD_UC357 0x0a81 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UC357R3 0x0a82 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UC357R4 0x0a83 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UC246 0x0aa1 /* Revision 2*/
+#define PCI_DEVICE_ID_INTASHIELD_UC246R3 0x0aa2 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UP189 0x0ac1 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UP189R3 0x0ac2 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UP189R4 0x0ac3 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UC346 0x0b01 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UC346R3 0x0b02 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UP200 0x0b21 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UP200R3 0x0b22 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UP200R4 0x0b23 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UC101 0x0ba1
+#define PCI_DEVICE_ID_INTASHIELD_UC203 0x0bc1 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UC203R3 0x0bc2 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UC146 0x0be1 /* Revision 2*/
+#define PCI_DEVICE_ID_INTASHIELD_UC146R3 0x0be2 /* Revision 3*/
+#define PCI_DEVICE_ID_INTASHIELD_UP869 0x0c01 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UP869R3 0x0c02 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UP869R4 0x0c03 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UP880 0x0c21 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_UP880R3 0x0c22 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_UP880R4 0x0c23 /* Revision 4 */
+#define PCI_DEVICE_ID_INTASHIELD_UC368 0x0c41
+#define PCI_DEVICE_ID_INTASHIELD_UC253 0x0ca1
+#define PCI_DEVICE_ID_INTASHIELD_UC260 0x0d21
+#define PCI_DEVICE_ID_INTASHIELD_UC836 0x0d41
+#define PCI_DEVICE_ID_INTASHIELD_IS100 0x0d60
#define PCI_DEVICE_ID_INTASHIELD_IS200 0x0d80
+#define PCI_DEVICE_ID_INTASHIELD_IS300 0x0da0
#define PCI_DEVICE_ID_INTASHIELD_IS400 0x0dc0
+#define PCI_DEVICE_ID_INTASHIELD_IS500 0x0de0
+#define PCI_DEVICE_ID_INTASHIELD_PX279 0x0e41
+#define PCI_DEVICE_ID_INTASHIELD_UC414 0x0e61
+#define PCI_DEVICE_ID_INTASHIELD_PX420 0x4000 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX431 0x4001 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX820 0x4002 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX831 0x4003 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX235 0x4004 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX101 0x4005 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX257 0x4006 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX257LPT 0x4007 /* Revision 2 LPT port */
+#define PCI_DEVICE_ID_INTASHIELD_PX835 0x4008 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX857 0x4009 /* Revision 2 */
+#define PCI_DEVICE_ID_INTASHIELD_PX260 0x400a
+#define PCI_DEVICE_ID_INTASHIELD_PX320 0x400b
+#define PCI_DEVICE_ID_INTASHIELD_PX313 0x400c
+#define PCI_DEVICE_ID_INTASHIELD_PX310 0x400e
+#define PCI_DEVICE_ID_INTASHIELD_PX346 0x400f
+#define PCI_DEVICE_ID_INTASHIELD_PX368 0x4010
+#define PCI_DEVICE_ID_INTASHIELD_PX420R3 0x4011 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX431R3 0x4012 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX820R3 0x4013 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX257R3 0x4015 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX831R3 0x4014 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX235R3 0x4016 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX835R3 0x4017 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX857R3 0x4018 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX101R3 0x4019 /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX146 0x401c
+#define PCI_DEVICE_ID_INTASHIELD_PX475 0x401d
+#define PCI_DEVICE_ID_INTASHIELD_PX803R3 0x401e /* Revision 3 */
+#define PCI_DEVICE_ID_INTASHIELD_PX475LPT 0x401f /* LPT port */
+#define PCI_DEVICE_ID_INTASHIELD_XC157 0x4020
+#define PCI_DEVICE_ID_INTASHIELD_XC475 0x4021
+#define PCI_DEVICE_ID_INTASHIELD_XC475LPT 0x4022 /* LPT port */
+#define PCI_DEVICE_ID_INTASHIELD_XC235 0x4026
+#define PCI_DEVICE_ID_INTASHIELD_IX100 0x4027
+#define PCI_DEVICE_ID_INTASHIELD_IX200 0x4028
+#define PCI_DEVICE_ID_INTASHIELD_IX400 0x4029
+#define PCI_DEVICE_ID_INTASHIELD_IX500 0x402a
+#define PCI_DEVICE_ID_INTASHIELD_PX263 0x402c
+#define PCI_DEVICE_ID_INTASHIELD_PX272 0x4100
#define PCI_VENDOR_ID_QUATECH 0x135C
#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010
--
2.42.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/4] PCI: Add device IDs for Brainboxes/Intashield PX/UC/UP cards
2023-09-21 21:09 [PATCH 1/4] PCI: Add device IDs for Brainboxes/Intashield PX/UC/UP cards Cameron Williams
@ 2023-09-21 21:58 ` Bjorn Helgaas
2023-09-22 5:53 ` Cameron Williams
0 siblings, 1 reply; 3+ messages in thread
From: Bjorn Helgaas @ 2023-09-21 21:58 UTC (permalink / raw)
To: Cameron Williams
Cc: bhelgaas, linux-pci, linux-kernel, linux-serial, sudipm.mukherjee,
gregkh
On Thu, Sep 21, 2023 at 10:09:16PM +0100, Cameron Williams wrote:
> Add device IDs for PCI/PCIe serial cards manufactured by
> Brainboxes (IS/IX/UC/UP/PX).
> Apologies if this file isn't strictly for your tree. All trees
> I am sending this patch series to use these PCI IDs, I was unsure
> if this was the correct way to go about it, and better safe than
> sorry. Thank you for understanding and please disregard if
> its not required.
From the top of the file:
* Do not add new entries to this file unless the definitions
* are shared between multiple drivers.
I can't tell whether that applies here since I haven't seen the other
patches. If they're only used in one file, you can add the #define to
that file or use the bare hex values. This reduces merge conflicts in
pci_ids.h when backporting things.
Also it looks like there's a mix of tab vs space indentation below.
They should all be tabs before the device ID and it looks like a
single space before the comment.
> +#define PCI_DEVICE_ID_INTASHIELD_UC246 0x0aa1 /* Revision 2*/
> +#define PCI_DEVICE_ID_INTASHIELD_UC246R3 0x0aa2 /* Revision 3 */
Comment indentation error.
> +#define PCI_DEVICE_ID_INTASHIELD_PX803R3 0x401e /* Revision 3 */
> +#define PCI_DEVICE_ID_INTASHIELD_PX475LPT 0x401f /* LPT port */
Indentation error.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 1/4] PCI: Add device IDs for Brainboxes/Intashield PX/UC/UP cards
2023-09-21 21:58 ` Bjorn Helgaas
@ 2023-09-22 5:53 ` Cameron Williams
0 siblings, 0 replies; 3+ messages in thread
From: Cameron Williams @ 2023-09-22 5:53 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: bhelgaas, linux-pci, linux-kernel, linux-serial, sudipm.mukherjee,
gregkh
On Thu, Sep 21, 2023 at 04:58:22PM -0500, Bjorn Helgaas wrote:
> On Thu, Sep 21, 2023 at 10:09:16PM +0100, Cameron Williams wrote:
> > Add device IDs for PCI/PCIe serial cards manufactured by
> > Brainboxes (IS/IX/UC/UP/PX).
> > Apologies if this file isn't strictly for your tree. All trees
> > I am sending this patch series to use these PCI IDs, I was unsure
> > if this was the correct way to go about it, and better safe than
> > sorry. Thank you for understanding and please disregard if
> > its not required.
>
> From the top of the file:
>
> * Do not add new entries to this file unless the definitions
> * are shared between multiple drivers.
>
> I can't tell whether that applies here since I haven't seen the other
> patches. If they're only used in one file, you can add the #define to
> that file or use the bare hex values. This reduces merge conflicts in
> pci_ids.h when backporting things.
>
In that case, please disregard this patch series. The IDs are used in
different drivers but exclusively, not shared. I will resubmit this patch
with raw IDs.
> Also it looks like there's a mix of tab vs space indentation below.
> They should all be tabs before the device ID and it looks like a
> single space before the comment.
>
> > +#define PCI_DEVICE_ID_INTASHIELD_UC246 0x0aa1 /* Revision 2*/
> > +#define PCI_DEVICE_ID_INTASHIELD_UC246R3 0x0aa2 /* Revision 3 */
>
> Comment indentation error.
>
> > +#define PCI_DEVICE_ID_INTASHIELD_PX803R3 0x401e /* Revision 3 */
> > +#define PCI_DEVICE_ID_INTASHIELD_PX475LPT 0x401f /* LPT port */
>
> Indentation error.
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-09-22 5:53 UTC | newest]
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2023-09-21 21:09 [PATCH 1/4] PCI: Add device IDs for Brainboxes/Intashield PX/UC/UP cards Cameron Williams
2023-09-21 21:58 ` Bjorn Helgaas
2023-09-22 5:53 ` Cameron Williams
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