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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id x8-20020adfec08000000b0032dbf6bf7a2sm3994451wrn.97.2023.10.19.02.17.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Oct 2023 02:17:27 -0700 (PDT) Date: Thu, 19 Oct 2023 11:17:26 +0200 From: Andrew Jones To: Anup Patel Cc: Paolo Bonzini , Atish Patra , Palmer Dabbelt , Paul Walmsley , Greg Kroah-Hartman , Jiri Slaby , Conor Dooley , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 4/8] RISC-V: KVM: Forward SBI DBCN extension to user-space Message-ID: <20231019-7471d3927d94ab7158d61c6b@orel> References: <20231012051509.738750-1-apatel@ventanamicro.com> <20231012051509.738750-5-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231012051509.738750-5-apatel@ventanamicro.com> Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org On Thu, Oct 12, 2023 at 10:45:05AM +0530, Anup Patel wrote: > The frozen SBI v2.0 specification defines the SBI debug console > (DBCN) extension which replaces the legacy SBI v0.1 console > functions namely sbi_console_getchar() and sbi_console_putchar(). > > The SBI DBCN extension needs to be emulated in the KVM user-space > (i.e. QEMU-KVM or KVMTOOL) so we forward SBI DBCN calls from KVM > guest to the KVM user-space which can then redirect the console > input/output to wherever it wants (e.g. telnet, file, stdio, etc). > > The SBI debug console is simply a early console available to KVM > guest for early prints and it does not intend to replace the proper > console devices such as 8250, VirtIO console, etc. > > Signed-off-by: Anup Patel > --- > arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 + > arch/riscv/include/uapi/asm/kvm.h | 1 + > arch/riscv/kvm/vcpu_sbi.c | 4 ++++ > arch/riscv/kvm/vcpu_sbi_replace.c | 32 +++++++++++++++++++++++++++ > 4 files changed, 38 insertions(+) > > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h > index c02bda5559d7..6a453f7f8b56 100644 > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > @@ -73,6 +73,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_ipi; > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence; > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst; > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm; > +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn; > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental; > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor; > > diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h > index 917d8cc2489e..60d3b21dead7 100644 > --- a/arch/riscv/include/uapi/asm/kvm.h > +++ b/arch/riscv/include/uapi/asm/kvm.h > @@ -156,6 +156,7 @@ enum KVM_RISCV_SBI_EXT_ID { > KVM_RISCV_SBI_EXT_PMU, > KVM_RISCV_SBI_EXT_EXPERIMENTAL, > KVM_RISCV_SBI_EXT_VENDOR, > + KVM_RISCV_SBI_EXT_DBCN, We should add this new register to the get-reg-list kselftest, i.e. diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c index 234006d035c9..4a0f8a8cfbf8 100644 --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c @@ -565,6 +565,7 @@ static __u64 base_regs[] = { KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_SRST, KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_HSM, KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_PMU, + KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_DBCN, KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_EXPERIMENTAL, KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_VENDOR, KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_MULTI_EN | 0, Thanks, drew