From: Greg KH <gregkh@linuxfoundation.org>
To: Claudiu <claudiu.beznea@tuxon.dev>
Cc: geert+renesas@glider.be, magnus.damm@gmail.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com,
sboyd@kernel.org, jirislaby@kernel.org, p.zabel@pengutronix.de,
lethal@linux-sh.org, g.liakhovetski@gmx.de,
ysato@users.sourceforge.jp, ulrich.hecht+renesas@gmail.com,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-serial@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH 4/9] serial: sh-sci: Update the suspend/resume support
Date: Thu, 7 Nov 2024 09:49:05 +0100 [thread overview]
Message-ID: <2024110752-establish-subduing-225c@gregkh> (raw)
In-Reply-To: <20241106120118.1719888-5-claudiu.beznea.uj@bp.renesas.com>
On Wed, Nov 06, 2024 at 02:01:13PM +0200, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> The Renesas RZ/G3S supports a power saving mode where power to most of the
> SoC components is turned off. When returning from this power saving mode,
> SoC components need to be re-configured.
>
> The SCIFs on the Renesas RZ/G3S need to be re-configured as well when
> returning from this power saving mode. The sh-sci code already configures
> the SCIF clocks, power domain and registers by calling uart_resume_port()
> in sci_resume(). On suspend path the SCIF UART ports are suspended
> accordingly (by calling uart_suspend_port() in sci_suspend()). The only
> missing setting is the reset signal. For this assert/de-assert the reset
> signal on driver suspend/resume.
>
> In case the no_console_suspend is specified by the user, the registers need
> to be saved on suspend path and restore on resume path. To do this the
> sci_console_setup() function was added. There is no need to cache/restore
> the status or FIFO registers. Only the control registers. To differentiate
> b/w these, the struct sci_port_params::regs was updated with a new member
> that specifies if the register needs to be chached on suspend. Only the
> RZ_SCIFA instances were updated with this new support as the hardware for
> the rest of variants was missing for testing.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
> drivers/tty/serial/sh-sci.c | 53 ++++++++++++++++++++++++++++++-------
> 1 file changed, 44 insertions(+), 9 deletions(-)
Does not apply as I didn't take the atomic_t patch :(
thanks,
greg k-h
next prev parent reply other threads:[~2024-11-07 8:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-06 12:01 [PATCH 0/9] Add support for the rest of Renesas RZ/G3S serial interfaces Claudiu
2024-11-06 12:01 ` [PATCH 1/9] clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs Claudiu
2024-11-06 12:01 ` [PATCH 2/9] serial: sh-sci: Check if TX data was written to device in .tx_empty() Claudiu
2024-11-07 8:47 ` Greg KH
2024-11-07 10:08 ` Claudiu Beznea
2024-11-06 12:01 ` [PATCH 3/9] serial: sh-sci: Clean sci_ports[0] after at earlycon exit Claudiu
2024-11-27 16:28 ` Geert Uytterhoeven
2024-11-27 17:33 ` Claudiu Beznea
2024-11-06 12:01 ` [PATCH 4/9] serial: sh-sci: Update the suspend/resume support Claudiu
2024-11-07 8:49 ` Greg KH [this message]
2024-11-06 12:01 ` [PATCH 5/9] arm64: dts: renesas: r9a08g045: Add the remaining SCIF interfaces Claudiu
2024-11-06 12:01 ` [PATCH 6/9] arm64: dts: renesas: rzg3s-smarc: Fix the debug serial alias Claudiu
2024-11-06 12:01 ` [PATCH 7/9] arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches Claudiu
2024-11-06 12:01 ` [PATCH 8/9] arm64: dts: renesas: rzg3s-smarc: Enable SCIF3 Claudiu
2024-11-06 12:01 ` [PATCH 9/9] arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1 Claudiu
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