From: Conor Dooley <conor@kernel.org>
To: Biju <biju.das.au@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v2 01/13] dt-bindings: serial: renesas,rsci: Document RZ/G3E support
Date: Thu, 30 Oct 2025 19:20:56 +0000 [thread overview]
Message-ID: <20251030-regroup-garter-c70c7fc6a71a@spud> (raw)
In-Reply-To: <20251030175811.607137-2-biju.das.jz@bp.renesas.com>
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On Thu, Oct 30, 2025 at 05:57:49PM +0000, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> Add documentation for the serial communication interface (RSCI) found on
> the Renesas RZ/G3E (R9A09G047) SoC. The RSCI IP on this SoC is identical
> to that on the RZ/T2H (R9A09G077) SoC, but it has a 32-stage FIFO compared
> to 16 on RZ/T2H. It supports both FIFO and non-FIFO mode operation. RZ/G3E
> has 6 clocks(5 module clocks + 1 external clock) compared to 3 clocks
> (2 module clocks + 1 external clock) on RZ/T2H, and it has multiple resets.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v1->v2:
> * Updated commit message
> * Added resets:false for non RZ/G3E SoCs.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
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next prev parent reply other threads:[~2025-10-30 19:21 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-30 17:57 [PATCH v2 00/13] Add RZ/G3E RSCI support Biju
2025-10-30 17:57 ` [PATCH v2 01/13] dt-bindings: serial: renesas,rsci: Document RZ/G3E support Biju
2025-10-30 19:20 ` Conor Dooley [this message]
2025-10-30 17:57 ` [PATCH v2 02/13] serial: rsci: Drop rsci_clear_CFC() Biju
2025-10-30 17:57 ` [PATCH v2 03/13] serial: sh-sci: Drop extra lines Biju
2025-10-30 20:21 ` Hugo Villeneuve
2025-10-31 7:06 ` Biju Das
2025-10-31 7:08 ` Biju Das
2025-10-31 14:34 ` Hugo Villeneuve
2025-10-30 17:57 ` [PATCH v2 04/13] serial: rsci: Drop unused macro DCR Biju
2025-10-30 17:57 ` [PATCH v2 05/13] serial: rsci: Drop unused TDR register Biju
2025-10-30 17:57 ` [PATCH v2 06/13] serial: sh-sci: Use devm_reset_control_array_get_exclusive() Biju
2025-10-30 17:57 ` [PATCH v2 07/13] serial: sh-sci: Add RSCI_PORT_{SCI,SCIF} port IDs Biju
2025-10-30 17:57 ` [PATCH v2 08/13] serial: sh-sci: Add sci_is_rsci_type() Biju
2025-10-30 17:57 ` [PATCH v2 09/13] serial: sh-sci: Add support for RZ/G3E RSCI clks Biju
2025-10-30 17:57 ` [PATCH v2 10/13] serial: sh-sci: Make sci_scbrr_calc() public Biju
2025-10-30 17:57 ` [PATCH v2 11/13] serial: sh-sci: Add finish_console_write() callback Biju
2025-10-30 17:58 ` [PATCH v2 12/13] serial: sh-sci: Add support for RZ/G3E RSCI SCIF Biju
2025-10-31 4:50 ` Jiri Slaby
2025-10-31 7:16 ` Biju Das
2025-10-30 17:58 ` [PATCH v2 13/13] serial: sh-sci: Add support for RZ/G3E RSCI SCI Biju
-- strict thread matches above, loose matches on Subject: below --
2025-10-30 17:55 [PATCH v2 00/13] Add RZ/G3E RSCI support Biju
2025-10-30 17:55 ` [PATCH v2 01/13] dt-bindings: serial: renesas,rsci: Document RZ/G3E support Biju
2025-10-31 0:00 ` Rob Herring
2025-11-13 15:26 ` Biju Das
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