* [PATCH] serial: 8250_fintek: Add support for F81214E
@ 2026-02-23 20:40 Ravindra Rama
2026-03-12 14:11 ` Greg KH
2026-03-13 19:47 ` Ravi Rama
0 siblings, 2 replies; 3+ messages in thread
From: Ravindra Rama @ 2026-02-23 20:40 UTC (permalink / raw)
To: gregkh, jirislaby; +Cc: linux-serial, linux-kernel
The F81214E is a LPC/eSPI to 2 UART Super I/O chip.
Functionally, it is the same as the F81216E. The only difference
is that the F81216E has 4 UART ports, whereas the F81214E has 2
UART ports.
Signed-off-by: Ravi Rama <ravi.rama@nexthop.ai>
---
drivers/tty/serial/8250/8250_fintek.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b/drivers/tty/serial/8250/8250_fintek.c
index b4461a89b8d0..976c5748905c 100644
--- a/drivers/tty/serial/8250/8250_fintek.c
+++ b/drivers/tty/serial/8250/8250_fintek.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Probe for F81216A LPC to 4 UART
+ * Probe for F81216A LPC to 4 UART and F81214E LPC/eSPI to 2 UART
*
* Copyright (C) 2014-2016 Ricardo Ribalda, Qtechnology A/S
*/
@@ -23,6 +23,7 @@
#define CHIP_ID_F81216AD 0x1602
#define CHIP_ID_F81216E 0x1617
#define CHIP_ID_F81216H 0x0501
+#define CHIP_ID_F81214E 0x1417
#define CHIP_ID_F81216 0x0802
#define VENDOR_ID1 0x23
#define VENDOR_ID1_VAL 0x19
@@ -161,6 +162,7 @@ static int fintek_8250_check_id(struct fintek_8250 *pdata)
case CHIP_ID_F81216AD:
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81216:
break;
default:
@@ -185,6 +187,7 @@ static int fintek_8250_get_ldn_range(struct
fintek_8250 *pdata, int *min,
case CHIP_ID_F81216AD:
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81216:
*min = F81216_LDN_LOW;
*max = F81216_LDN_HIGH;
@@ -255,6 +258,7 @@ static void fintek_8250_set_irq_mode(struct
fintek_8250 *pdata, bool is_level)
case CHIP_ID_F81216AD:
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81216:
sio_write_mask_reg(pdata, FINTEK_IRQ_MODE, IRQ_SHARE,
IRQ_SHARE);
@@ -269,6 +273,7 @@ static void fintek_8250_set_max_fifo(struct
fintek_8250 *pdata)
switch (pdata->pid) {
case CHIP_ID_F81216E: /* 128Bytes FIFO */
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81966:
case CHIP_ID_F81866:
sio_write_mask_reg(pdata, FIFO_CTRL,
@@ -304,6 +309,7 @@ static void fintek_8250_set_termios(struct uart_port *port,
switch (pdata->pid) {
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
reg = RS485;
break;
case CHIP_ID_F81966:
@@ -354,6 +360,7 @@ static void fintek_8250_set_termios_handler(struct
uart_8250_port *uart)
switch (pdata->pid) {
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81966:
case CHIP_ID_F81866:
uart->port.set_termios = fintek_8250_set_termios;
@@ -446,6 +453,7 @@ static void fintek_8250_set_rs485_handler(struct
uart_8250_port *uart)
break;
case CHIP_ID_F81216E: /* F81216E does not support RS485 delays */
+ case CHIP_ID_F81214E: /* F81214E does not support RS485 delays */
uart->port.rs485_config = fintek_8250_rs485_config;
uart->port.rs485_supported = fintek_8250_rs485_supported;
break;
--
2.50.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] serial: 8250_fintek: Add support for F81214E
2026-02-23 20:40 [PATCH] serial: 8250_fintek: Add support for F81214E Ravindra Rama
@ 2026-03-12 14:11 ` Greg KH
2026-03-13 19:47 ` Ravi Rama
1 sibling, 0 replies; 3+ messages in thread
From: Greg KH @ 2026-03-12 14:11 UTC (permalink / raw)
To: Ravindra Rama; +Cc: jirislaby, linux-serial, linux-kernel
On Mon, Feb 23, 2026 at 02:40:24PM -0600, Ravindra Rama wrote:
> The F81214E is a LPC/eSPI to 2 UART Super I/O chip.
>
> Functionally, it is the same as the F81216E. The only difference
> is that the F81216E has 4 UART ports, whereas the F81214E has 2
> UART ports.
>
> Signed-off-by: Ravi Rama <ravi.rama@nexthop.ai>
> ---
> drivers/tty/serial/8250/8250_fintek.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/8250/8250_fintek.c
> b/drivers/tty/serial/8250/8250_fintek.c
> index b4461a89b8d0..976c5748905c 100644
> --- a/drivers/tty/serial/8250/8250_fintek.c
> +++ b/drivers/tty/serial/8250/8250_fintek.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0
> /*
> - * Probe for F81216A LPC to 4 UART
> + * Probe for F81216A LPC to 4 UART and F81214E LPC/eSPI to 2 UART
> *
> * Copyright (C) 2014-2016 Ricardo Ribalda, Qtechnology A/S
> */
> @@ -23,6 +23,7 @@
> #define CHIP_ID_F81216AD 0x1602
> #define CHIP_ID_F81216E 0x1617
> #define CHIP_ID_F81216H 0x0501
> +#define CHIP_ID_F81214E 0x1417
> #define CHIP_ID_F81216 0x0802
> #define VENDOR_ID1 0x23
> #define VENDOR_ID1_VAL 0x19
Hi,
This is the friendly patch-bot of Greg Kroah-Hartman. You have sent him
a patch that has triggered this response. He used to manually respond
to these common problems, but in order to save his sanity (he kept
writing the same thing over and over, yet to different people), I was
created. Hopefully you will not take offence and will fix the problem
in your patch and resubmit it so that it can be accepted into the Linux
kernel tree.
You are receiving this message because of the following common error(s)
as indicated below:
- Your patch is malformed (tabs converted to spaces, linewrapped, etc.)
and can not be applied. Please read the file,
Documentation/process/email-clients.rst in order to fix this.
If you wish to discuss this problem further, or you have questions about
how to resolve this issue, please feel free to respond to this email and
Greg will reply once he has dug out from the pending patches received
from other developers.
thanks,
greg k-h's patch email bot
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH] serial: 8250_fintek: Add support for F81214E
2026-02-23 20:40 [PATCH] serial: 8250_fintek: Add support for F81214E Ravindra Rama
2026-03-12 14:11 ` Greg KH
@ 2026-03-13 19:47 ` Ravi Rama
1 sibling, 0 replies; 3+ messages in thread
From: Ravi Rama @ 2026-03-13 19:47 UTC (permalink / raw)
To: linux-serial; +Cc: linux-kernel, jirislaby, gregkh, Ravi Rama
The F81214E is a LPC/eSPI to 2 UART Super I/O chip.
Functionally, it is the same as the F81216E. The only difference
is that the F81216E has 4 UART ports, whereas the F81214E has 2
UART ports.
Signed-off-by: Ravi Rama <ravi.rama@nexthop.ai>
---
drivers/tty/serial/8250/8250_fintek.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
index b4461a89b8d0..976c5748905c 100644
--- a/drivers/tty/serial/8250/8250_fintek.c
+++ b/drivers/tty/serial/8250/8250_fintek.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Probe for F81216A LPC to 4 UART
+ * Probe for F81216A LPC to 4 UART and F81214E LPC/eSPI to 2 UART
*
* Copyright (C) 2014-2016 Ricardo Ribalda, Qtechnology A/S
*/
@@ -23,6 +23,7 @@
#define CHIP_ID_F81216AD 0x1602
#define CHIP_ID_F81216E 0x1617
#define CHIP_ID_F81216H 0x0501
+#define CHIP_ID_F81214E 0x1417
#define CHIP_ID_F81216 0x0802
#define VENDOR_ID1 0x23
#define VENDOR_ID1_VAL 0x19
@@ -161,6 +162,7 @@ static int fintek_8250_check_id(struct fintek_8250 *pdata)
case CHIP_ID_F81216AD:
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81216:
break;
default:
@@ -185,6 +187,7 @@ static int fintek_8250_get_ldn_range(struct fintek_8250 *pdata, int *min,
case CHIP_ID_F81216AD:
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81216:
*min = F81216_LDN_LOW;
*max = F81216_LDN_HIGH;
@@ -255,6 +258,7 @@ static void fintek_8250_set_irq_mode(struct fintek_8250 *pdata, bool is_level)
case CHIP_ID_F81216AD:
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81216:
sio_write_mask_reg(pdata, FINTEK_IRQ_MODE, IRQ_SHARE,
IRQ_SHARE);
@@ -269,6 +273,7 @@ static void fintek_8250_set_max_fifo(struct fintek_8250 *pdata)
switch (pdata->pid) {
case CHIP_ID_F81216E: /* 128Bytes FIFO */
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81966:
case CHIP_ID_F81866:
sio_write_mask_reg(pdata, FIFO_CTRL,
@@ -304,6 +309,7 @@ static void fintek_8250_set_termios(struct uart_port *port,
switch (pdata->pid) {
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
reg = RS485;
break;
case CHIP_ID_F81966:
@@ -354,6 +360,7 @@ static void fintek_8250_set_termios_handler(struct uart_8250_port *uart)
switch (pdata->pid) {
case CHIP_ID_F81216E:
case CHIP_ID_F81216H:
+ case CHIP_ID_F81214E:
case CHIP_ID_F81966:
case CHIP_ID_F81866:
uart->port.set_termios = fintek_8250_set_termios;
@@ -446,6 +453,7 @@ static void fintek_8250_set_rs485_handler(struct uart_8250_port *uart)
break;
case CHIP_ID_F81216E: /* F81216E does not support RS485 delays */
+ case CHIP_ID_F81214E: /* F81214E does not support RS485 delays */
uart->port.rs485_config = fintek_8250_rs485_config;
uart->port.rs485_supported = fintek_8250_rs485_supported;
break;
--
2.50.1 (Apple Git-155)
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2026-03-13 19:48 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-02-23 20:40 [PATCH] serial: 8250_fintek: Add support for F81214E Ravindra Rama
2026-03-12 14:11 ` Greg KH
2026-03-13 19:47 ` Ravi Rama
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox