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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?kridqNSLuxdau3ZkTu+tz8wzVirucuP6ONa0wl0uf4DkIxgSCpx7htvx8b1X?= =?us-ascii?Q?FpuG6jiLpmQInmSYmwb/itdtuTe+ouTn9HpD5CJiSN5Sv+W5v3IM+4FAtvjA?= =?us-ascii?Q?9PY/miMQkHeGGWKeLdFW/mSYM23EY8TJxJy3R2pEfNKMPz7duk86F6khRa5t?= =?us-ascii?Q?XaOr8NluA2Or15HAIco45TL+CY0ZFj9hZ0u9+4WQsdaCBJDVUNjTPFazj6c0?= =?us-ascii?Q?7elMhuVJ+9xpmLwozNsj0qPw0DTH0mJqMWSN6A3aVwcQsWHPrLVq1WBu7EhH?= =?us-ascii?Q?mYymk6nwrXUYUe2K6kNI0mYwZTAM2eEFqHOkbzD1SvKQvY01+pc41P17petT?= =?us-ascii?Q?+I6Lq1JMoFBNfwqH1CdnFbozWnq1B22e/ES4vQ56eSInRzhEgWilwZa0ULNT?= =?us-ascii?Q?K5VfI+/c+y1nugWYHn05uiLqtZ9g90+g5CYmG0k/iFBqp+TM1Kcq5QDaLwDR?= =?us-ascii?Q?oxgrVigVlvvsxGku7xsG7UOGvF7QbruroPVMi4MTgMlqBdT73ibDag9pmGQA?= =?us-ascii?Q?AvS0InmlxqxvRzKq/I/Sak7YtCJ1U7WOwWw0No1NuEfR+eYVclLjXfj0fF7Y?= =?us-ascii?Q?KnZoR0e+qFUezBYUbjRI1OwQplrUcqZxm7D4avriLW5+K5exX8H3SeQwyuS6?= =?us-ascii?Q?LlZVzH4ETibAAdyqW3Z+LEHUcL7OEotM/hws12o2/8L1PBskV/h6eXg0fWl1?= =?us-ascii?Q?adBDhQ060uaKS+/mc6a0E29NcVknWg1WH1DUg1JuISHmf1s+xWDECsK7wtdH?= =?us-ascii?Q?hJY7UZQXI8V+VH5WKqnbdAtoIy3qIm0TYWo28wilztQb3nsqxG0rnaFTnq1C?= =?us-ascii?Q?Mx651GrQUBMgG+Ap30xYHO7kV+KCMZpAeg6ZpqiLOsU1ePVTg5bZ2X4uHsma?= =?us-ascii?Q?Qjj16bWBFtVj063Csv0GcCsBOv2j85GUweE0LdvOBLu4CtZ6BJWZpMZzkVck?= =?us-ascii?Q?XsYwqgmBuvJeRfZDl3Pq/03M7ZBAIIoq30t6CL7vw3JZYZ8mhG432CpvF5g0?= =?us-ascii?Q?0LeL9vXNpp/tbwDxbyft9m55dEw5U/I8fvotQ42OWPLwsHu8Qq+kUTYRA71o?= =?us-ascii?Q?1zxXFJkUcE0ae4BbhhYXmLpgFW4SpzmGtzFuA0NF+MXIcZMKnv8yHCBW3y5z?= =?us-ascii?Q?OQs4DteYLQCFyJBt/wCpeQJzIqNQKsw+snfSImFStXpqg8AH3ONtjEjWT4m8?= =?us-ascii?Q?8Nz1Fy9Aj0O8vt9HcH3pyf5cv0/JA8ploVB5cpKQBTM/AGbRiOm2nN0AuGw/?= =?us-ascii?Q?OcWpUv7MtCsfcnXUuSCO4g+QnENVcsCuOIBPLOv+fvhEa1UzLyAP3UT/9RAj?= =?us-ascii?Q?CD5FO7nrddKz2Lyyph5d7qyTL51WIk+ujHuGnc1C14WGqDCKm4ZOAndAEw2d?= =?us-ascii?Q?oMY6QSq7JDJ4NkOF4AIXvRQ/ofnpJaF9NUbz4jXYo/zmQuAo3/K4eIhdnVXr?= =?us-ascii?Q?rHlscqcfxQIdhBb/5kqG4a7S+hzipl/3IRoVNLc4Oz6EooAcwZ3nXT55DEK6?= =?us-ascii?Q?ugp7Dw9269hi3vm056jvZshQpxD+vVyjafUa3glK02zrpPPpuHBZ2UjvZuN1?= =?us-ascii?Q?c0ylEBR/ws4h4vYTzbM1NF181F/Q+12NasCHF4lIpKXisi9jDRv5WH7qoPz4?= =?us-ascii?Q?HDvA/GcCIkhc/W3bPez4yAoZdfMzN7oiAIKisaVylW/zHVQqw9Wy1A2z9huZ?= =?us-ascii?Q?nfWRhA+4IGpPn30BtcYTsHNokac+peqIRYaxidHOKTn12Rca1GR2JD5dqgIq?= =?us-ascii?Q?GrauWLT8H0c+VZAZsg6lkL59YeQoOC8=3D?= X-OriginatorOrg: moxa.com X-MS-Exchange-CrossTenant-Network-Message-Id: f45c85c3-74a4-4904-6445-08ded722e7db X-MS-Exchange-CrossTenant-AuthSource: PUZPR01MB5405.apcprd01.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2026 03:43:25.4411 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 5571c7d4-286b-47f6-9dd5-0aa688773c8e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: pn6xJLNikIVpBL2QONagsm2Mg6VHTqQXMuKZ/VQdZpqOScyAoeXBTtDrDkSmP1sPqMZlYqoxo8m0o6llTHFVBgFnVW2L9sa+4PquFG5HH6o= X-MS-Exchange-Transport-CrossTenantHeadersStamped: KUXPR01MB8048 This series consolidates Moxa PCIe multiport serial board support under a dedicated 8250_mxpcie driver and adds MUEx50 UART support needed by these boards. The first part splits the existing Moxa PCIe board handling out of 8250_pci into a separate driver while preserving the existing probe flow and device IDs. The series then introduces the MUEx50 UART port type and enables the board-specific UART setup, including enhanced mode and FIFO trigger programming. The driver adds hardware-assisted flow control support for MUEx50 UARTs, including automatic RTS/CTS handling and XON/XOFF offload. It also adds a custom IRQ path and uses the MUEx50 memory-mapped FIFO windows to improve RX and TX data movement. Later patches introduce per-port private state and defer uart_write_wakeup() out of the interrupt-driven TX path. The driver also supports switching the serial interface mode through the RS485 configuration path, covering RS232, RS422, and RS485 modes supported by the boards. The final part extends 8250 core callbacks where needed so low-level drivers can override break control and rx_trig_bytes handling. The 8250_mxpcie driver uses these hooks to implement RS485 break handling via MUEx50 features and to expose the MUEx50 programmable RX trigger level through the generic rx_trig_bytes sysfs interface. Changes in v2: - [PATCH v1 01/15] - Sort and trim 8250_mxpcie includes, add __counted_by(num_ports), tidy switch fallbacks and loop counters, use pci_set_drvdata() / pci_get_drvdata(), and add numbered review links. - [PATCH v1 03/15] - Document the repeated FIFO clear sequence and the TX FIFO read/write pointer clock-domain issue, and declare the FIFO clear loop counter inside the for loop. - [PATCH v1 05/15] - Replace open-coded uart port lock/unlock with guard(uart_port_lock_irqsave) in throttle() and unthrottle(), and remove the unused flags variable. - [PATCH v1 09/15] - Preserve __counted_by(num_ports) when converting the flexible array from line[] to per-port port[] storage. - [PATCH v1 10/15] - Add per-port workqueue state in pahole-friendly member order. - [PATCH v1 13/15] - Use guard(uart_port_lock_irqsave), use serial_dl_write(up, 0) instead of direct UART_DLL/UART_DLM writes, and avoid modifying sfr inside the serial_out() argument. - [PATCH v1 14/15] - Move get_rxtrig/set_rxtrig near existing getter/setter callbacks in struct uart_port and in the 8250_core.c callback copy path. - [PATCH v1 15/15] - Use named RX trigger constants, serial_port_in/out(), and aligned get_rxtrig/set_rxtrig ordering in both the implementation and probe callback assignment. v1: https://lore.kernel.org/all/20260504084900.22380-1-crescentcy.hsieh@moxa.com/ Crescent Hsieh (15): serial: 8250: split Moxa PCIe serial board support out of 8250_pci serial: 8250: add Moxa MUEx50 UART port type serial: 8250_mxpcie: enable enhanced mode and program FIFO trigger levels serial: 8250_mxpcie: enable automatic RTS/CTS flow control serial: 8250_mxpcie: offload XON/XOFF flow control to MUEx50 hardware serial: 8250_mxpcie: add custom handle_irq callback serial: 8250_mxpcie: speed up RX using memory-mapped FIFO window serial: 8250_mxpcie: speed up TX using memory-mapped FIFO window serial: 8250_mxpcie: introduce per-port private data structure serial: 8250_mxpcie: defer uart_write_wakeup() to workqueue serial: 8250_mxpcie: support serial interface mode switching serial: 8250: allow low-level drivers to override break control serial: 8250_mxpcie: add break support for RS485 using MUEx50 features serial: 8250: allow UART drivers to override rx_trig_bytes handling serial: 8250_mxpcie: implement rx_trig_bytes callbacks via MUEx50 RTL drivers/tty/serial/8250/8250_core.c | 6 + drivers/tty/serial/8250/8250_mxpcie.c | 686 ++++++++++++++++++++++++++ drivers/tty/serial/8250/8250_pci.c | 208 +------- drivers/tty/serial/8250/8250_port.c | 33 +- drivers/tty/serial/8250/Kconfig | 11 + drivers/tty/serial/8250/Makefile | 1 + include/linux/serial_8250.h | 1 + include/linux/serial_core.h | 3 + include/uapi/linux/serial_core.h | 3 + 9 files changed, 744 insertions(+), 208 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_mxpcie.c -- 2.45.2