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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?jb6rxLh5lmOmP6/RsQkCvD0avqgPDTLcugqj/phAe8ia12kupxlbJLKtvNCl?= =?us-ascii?Q?K0nM2XabrHCP/HtxpbhTC6ot3caJzKyiN6XALe/3w61BMdKeL/jfBoZ0NpJt?= =?us-ascii?Q?7gDi7rlxvPlfLBhGDx6MGnseAadYRSUaBY8hf5KiiextxxDexzgzctPnJnd1?= =?us-ascii?Q?34d1Bwd94D5WXT+FehQBCWa5QuMWIv1vXTKTOQa+iooiP4cazp0QuoNxVEvD?= =?us-ascii?Q?axqtlvnagOfIFJpmOXXRNkVdve8tVwp2mpWCmpfHeZX/ULPWCcE393LLko7j?= =?us-ascii?Q?RNGIpaPih/+hGoIdmqT/89GWq99ntYe0IOG7R/6jYd4kce7WHcO4K1UfKC/J?= =?us-ascii?Q?H8qc6H7kXpVCd/WOsWDxwmcRSxU9uFzdNTVtX3gqLzjesluBI2+moN1+w6vI?= =?us-ascii?Q?hMhHJiinYM9J25kAROA07QoUEu7S6Lsy0DJKHNHumwz5q6/Bq7duy/wlGX+k?= =?us-ascii?Q?/lVAefmONZuPv8bmw/bWzNzJsVKkdjyBRllffuvYZIlAsZtTNfJ2j1or77Ls?= =?us-ascii?Q?voZCmUefqH9eoqvqvtW3CK5xzp6ahV8UMp7PD8UNKDm8sasGAvBV6m2knBL6?= =?us-ascii?Q?tEm/lHGgmAq5cEx2laszRkwxrHNEw7fRQpV/hl63rGOaGn7BUR+B33jn3/Yn?= =?us-ascii?Q?T8OBKiyZlYGRYr2KU/9DU/GqAgFI37gfdpc5eCVbp8HDKxFJNNftjkxXpQGx?= =?us-ascii?Q?Ann97jJRoqh4t263phBXexmcxSLuyHqMKn0rVDdDyBbHEjXPAwYgT35kmhoI?= =?us-ascii?Q?BNJEShQCSa3d7KtJGqL38gDz+5Ys1sL6rRfjPgAn8vLnnlx41QLbItV23WvR?= =?us-ascii?Q?Q4l/ANZQ8WWr+nbt+ak6jygKNYZLfj0A3iE5eVrPo2M0NMerV9sHHbkEfKHE?= =?us-ascii?Q?4RhC9dC4a8HOnr+iWbKP9Cj3eFXQcpbLeDoOnZN4oU9Gvx0yf62LWShfwGxo?= =?us-ascii?Q?dRUKR3lnWssyoo7yiLz8mSEOLHQCOULYuqDc3TKDpMhttduh0ObQfy6rNJo/?= =?us-ascii?Q?vtizB9tpB/yRrd+da6TDOE5qZyLdvifhE6VWX0hQEPIi6d9Q5OhbftveS7b1?= =?us-ascii?Q?QksBLiyE8dTaEcz9teuXYqBqV3cMYnUAxEH9qn7/68uLxlDM3/NQsR0zCW8Z?= =?us-ascii?Q?Q9XGm7vRIJCBghF7IjeRxKjSuWRp3XSY2HhWNGCz/bNqZP1mBIH/RAd7mSkY?= =?us-ascii?Q?1cA4dkwCbAxGqDGIAESG8pqrAW4X3+vcdguYmQeGcou8FFVvH6c9GoLTM60V?= =?us-ascii?Q?D2dv5NOGBzSO6a3nIb10xF4MNmpeOaeT70YT115OcVOUFdWws4KWeYksDu51?= =?us-ascii?Q?D2WUViMuRXFHBLksUCK7WWoFXL19fJIf0j9FZ1Wh+IffWp1fUn/gQh09V5Ab?= =?us-ascii?Q?SxURbut3n3QtWYO/CYL7JPJyhuU0DtJyXjkEc3Sf3rpCKM1+j4JF866Z154W?= =?us-ascii?Q?1ICMTv4c5/tVwGJCWQMlcR4Bv/d+cOivwBBV4Nr8jFGk1HfrwKM0GcBMXJSP?= =?us-ascii?Q?4UeiOC+dM4ig1720h9TzWrlzh/4lggjmqAEHen3hH6EPfEJWvnqOkB9mlESk?= =?us-ascii?Q?TGWo+PqcMb8p5Py350jty9e0G45F8mVRAuWfX37dCrDoihMNoH/Mkleqdh8e?= =?us-ascii?Q?fHjgqIjew2fhkNo1bWd3cr/X5oS4IqD0i+KJInm7siornv7p2nrFMWqE5VJj?= =?us-ascii?Q?CKycRnPTKZIDzztUgujJhAB+CQS2ZI23BKw124HRCnGTRA98xv6AwzkKd5gh?= =?us-ascii?Q?U3rCaN+6TIAXFFDzmsRsIHGUquEkRkk=3D?= X-OriginatorOrg: moxa.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5a42e7a7-b632-4402-de51-08deeed82de5 X-MS-Exchange-CrossTenant-AuthSource: PUZPR01MB5405.apcprd01.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jul 2026 07:48:58.5450 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 5571c7d4-286b-47f6-9dd5-0aa688773c8e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nEsWZYbXLFow/9XJRxnUeQ4FVm+PzUKf5iaW4aJSv3QMpznUA6xdLh/qfALdmLKyqAp5/PEMX6/BjAkm6fBbsBCSSA9bnP5THoPDtwQ4JCc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEYPR01MB4488 This series consolidates Moxa PCIe multiport serial board support under a dedicated 8250_mxpcie driver and adds MUEx50 UART support needed by these boards. The first part splits the existing Moxa PCIe board handling out of 8250_pci into a separate driver while preserving the existing probe flow and device IDs. The series then introduces the MUEx50 UART port type and enables the board-specific UART setup, including enhanced mode and FIFO trigger programming. The driver adds hardware-assisted flow control support for MUEx50 UARTs, including automatic RTS/CTS handling and XON/XOFF offload. It also adds a custom IRQ path and uses the MUEx50 memory-mapped FIFO windows to improve RX and TX data movement. Later patches add serial interface mode switching, RS485 break handling, and per-port private state for MUEx50-specific configuration. The driver supports switching the serial interface mode through the RS485 configuration path, covering RS232, RS422, and RS485 modes supported by the boards. The final part extends 8250 core callbacks where needed so low-level drivers can override break control and rx_trig_bytes handling. The 8250_mxpcie driver uses these hooks to implement RS485 break handling via MUEx50 features and to expose the MUEx50 programmable RX trigger level through the generic rx_trig_bytes sysfs interface. --- Changes in v5: - [PATCH v5 01/14] - Call FIELD_MODIFY() without assigning its result back. - [PATCH v5 05/14] - Remove the redundant EFR flow-control mask clearing. - Call FIELD_MODIFY() without assigning its result back. - [PATCH v5 11/14] - Change tx_byte from unsigned char to u8. Changes in v4: - Drop [PATCH v3 10/15], the workqueue-based TX wakeup patch. - Reorder [PATCH v3 09/15] to [PATCH v4 13/14]. - [PATCH v4 01/14] - Remove the unused 8250_pcilib.h include, MODULE_IMPORT_NS("SERIAL_8250_PCI"), and select SERIAL_8250_PCILIB in Kconfig. - [PATCH v4 03/14] - Replace FIFO trigger level and flow-control threshold magic numbers with named default constants. - [PATCH v4 05/14] - Replace the EFR flow-control comment and magic values with named RX/TX field values, and use FIELD_MODIFY() to program the EFR flow fields. - [PATCH v4 06/14] - Split the RX decision logic into mxpcie8250_should_rx() and keep the IRQ path responsible for calling the generic RX handler. - [PATCH v4 07/14] - Switch the RX FIFO path to tty_prepare_flip_string() and remove the temporary stack buffer plus tty_insert_flip_string(). - [PATCH v4 08/14] - Rework TX FIFO handling to use uart_port_tx_limited() for common serial-core TX handling. - [PATCH v4 10/14] - Export serial8250_do_break_ctl() with EXPORT_SYMBOL_GPL() instead of the SERIAL_8250_PCI namespace. - [PATCH v4 14/14] - Reuse the RX trigger default constant and change the range check to use port->fifosize. Changes in v3: - [PATCH v3 01/15] - Add Andy's Reviewed-by tag. - [PATCH v3 06/15] - Use guard(uart_port_lock_check_sysrq_irqsave) in the IRQ handler, remove the now-unused flags variable, and join the LSR read with the mxpcie8250_rx_chars() call. - [PATCH v3 07/15] - Declare the RX FIFO copy loop iterator inside the for loop. - [PATCH v3 08/15] - Declare the TX FIFO fill loop iterator inside the for loop. Changes in v2: - [PATCH v1 01/15] - Sort and trim 8250_mxpcie includes, add __counted_by(num_ports), tidy switch fallbacks and loop counters, use pci_set_drvdata() / pci_get_drvdata(), and add numbered review links. - [PATCH v1 03/15] - Document the repeated FIFO clear sequence and the TX FIFO read/write pointer clock-domain issue, and declare the FIFO clear loop counter inside the for loop. - [PATCH v1 05/15] - Replace open-coded uart port lock/unlock with guard(uart_port_lock_irqsave) in throttle() and unthrottle(), and remove the unused flags variable. - [PATCH v1 09/15] - Preserve __counted_by(num_ports) when converting the flexible array from line[] to per-port port[] storage. - [PATCH v1 10/15] - Add per-port workqueue state in pahole-friendly member order. - [PATCH v1 13/15] - Use guard(uart_port_lock_irqsave), use serial_dl_write(up, 0) instead of direct UART_DLL/UART_DLM writes, and avoid modifying sfr inside the serial_out() argument. - [PATCH v1 14/15] - Move get_rxtrig/set_rxtrig near existing getter/setter callbacks in struct uart_port and in the 8250_core.c callback copy path. - [PATCH v1 15/15] - Use named RX trigger constants, serial_port_in/out(), and aligned get_rxtrig/set_rxtrig ordering in both the implementation and probe callback assignment. v4: https://lore.kernel.org/all/20260729060602.492430-1-crescentcy.hsieh@moxa.com/ v3: https://lore.kernel.org/all/20260709053314.435629-1-crescentcy.hsieh@moxa.com/ v2: https://lore.kernel.org/all/20260701034128.218569-1-crescentcy.hsieh@moxa.com/ v1: https://lore.kernel.org/all/20260504084900.22380-1-crescentcy.hsieh@moxa.com/ Crescent Hsieh (14): serial: 8250: split Moxa PCIe serial board support out of 8250_pci serial: 8250: add Moxa MUEx50 UART port type serial: 8250_mxpcie: enable enhanced mode and program FIFO trigger levels serial: 8250_mxpcie: enable automatic RTS/CTS flow control serial: 8250_mxpcie: offload XON/XOFF flow control to MUEx50 hardware serial: 8250_mxpcie: add custom handle_irq callback serial: 8250_mxpcie: speed up RX using memory-mapped FIFO window serial: 8250_mxpcie: speed up TX using memory-mapped FIFO window serial: 8250_mxpcie: support serial interface mode switching serial: 8250: allow low-level drivers to override break control serial: 8250_mxpcie: add break support for RS485 using MUEx50 features serial: 8250: allow UART drivers to override rx_trig_bytes handling serial: 8250_mxpcie: introduce per-port private data structure serial: 8250_mxpcie: implement rx_trig_bytes callbacks via MUEx50 RTL drivers/tty/serial/8250/8250_core.c | 6 + drivers/tty/serial/8250/8250_mxpcie.c | 627 ++++++++++++++++++++++++++ drivers/tty/serial/8250/8250_pci.c | 208 +-------- drivers/tty/serial/8250/8250_port.c | 33 +- drivers/tty/serial/8250/Kconfig | 10 + drivers/tty/serial/8250/Makefile | 1 + include/linux/serial_8250.h | 1 + include/linux/serial_core.h | 3 + include/uapi/linux/serial_core.h | 3 + 9 files changed, 684 insertions(+), 208 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_mxpcie.c -- 2.45.2