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Wed, 16 Sep 2026 02:55:44 -0700 (PDT) Received: from amd.ban-spse ([165.204.217.251]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33bf5e40494sm6617087eec.15.2026.09.16.02.55.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Sep 2026 02:55:43 -0700 (PDT) From: Malathi A To: Greg Kroah-Hartman , Jiri Slaby , Kunihiko Hayashi , Masami Hiramatsu , Andy Shevchenko , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Malathi A Subject: [PATCH] serial: 8250_uniphier: Disable clock on probe error path Date: Wed, 16 Sep 2026 09:54:36 +0000 Message-ID: <20260916095438.20837-1-malathi.a2000@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit uniphier_uart_probe() calls clk_prepare_enable() on priv->clk before it reads the port properties, but returns directly when uart_read_port_properties() fails, leaving the clock prepared and enabled. The intent is clear from the surrounding code: the next error path, when serial8250_register_8250_port() fails, calls clk_disable_unprepare(), as does uniphier_uart_remove(). Add the missing call so the early failure behaves the same way. Found by smatch: drivers/tty/serial/8250/8250_uniphier.c:232 uniphier_uart_probe() warn: 'priv->clk' from clk_prepare_enable() not released on lines: 205. Fixes: 26e8349c0d76 ("serial: 8250_uniphier: Switch to use uart_read_port_properties()") Signed-off-by: Malathi A --- drivers/tty/serial/8250/8250_uniphier.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_uniphier.c b/drivers/tty/serial/8250/8250_uniphier.c index e3db60bf50c9..52667c1891bb 100644 --- a/drivers/tty/serial/8250/8250_uniphier.c +++ b/drivers/tty/serial/8250/8250_uniphier.c @@ -201,8 +201,10 @@ static int uniphier_uart_probe(struct platform_device *pdev) up.port.membase = membase; ret = uart_read_port_properties(&up.port); - if (ret) + if (ret) { + clk_disable_unprepare(priv->clk); return ret; + } up.port.type = PORT_16550A; up.port.iotype = UPIO_MEM32; -- 2.43.0