Re: [PATCH v5 5/8] serial: max310x: support active-low RTS on the hardware path

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] tty: max310x: RS485 disable during active break leaks manual RTS assertion
- [High] tty: max310x: closing port during break leaves RTS permanently asserted
--

commit b82804e84b25e0e908ec331792a65b1ae30210a0
Author: Tapio Reijonen <tapio.reijonen@vaisala.com>

serial: max310x: support active-low RTS on the hardware path

The chip's auto-RTS engine asserts the RTS_ pin high while data is
shifting out, so a transceiver with an active-low driver-enable could
not use the hardware RS485 path at all: SER_RS485_RTS_AFTER_SEND is
not in the supported flags and the core normalizes it away with
"invalid RTS setting, using RTS_ON_SEND instead".

The output stage is invertible: program IRDA.RTSINVERT when the
requested polarity is active-low and advertise SER_RS485_RTS_AFTER_SEND
in rs485_supported. A break already drives break_state onto the RTS
bit unadjusted, which remains correct because RTSINVERT inverts the
output stage itself, not the register value.

> diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
> index cd3b1913aaadb..e07fb87f21f10 100644
> --- a/drivers/tty/serial/max310x.c
> +++ b/drivers/tty/serial/max310x.c
[ ... ]
> @@ -999,7 +1008,9 @@ static void max310x_break_ctl(struct uart_port *port, int break_state)
>  	 * The chip's auto-RTS asserts the transceiver only while FIFO data is
>  	 * shifting out, and a break is not FIFO data. Disable auto-RTS for the
>  	 * break duration and drive RTS manually so the break reaches the wire;
> -	 * restore auto-RTS when the break ends.
> +	 * restore auto-RTS when the break ends. For an active-low RTS,
> +	 * IRDA.RTSINVERT already inverts the RTS_ output stage, so break_state
> +	 * is driven as it is.
>  	 */
>  	if (break_state) {
>  		max310x_port_update(port, MAX310X_MODE1_REG,

[Severity: High]
Does this code leak the manual RTS assertion if RS-485 is disabled during an
active break?

If a user initiates a break (ioctl(TIOCSBRK)), max310x_break_ctl(1) executes,
setting one->tx_break = 1 and asserting the manual RTS bit. If the user then
disables RS-485 (ioctl(TIOCSRS485)), the configuration update is deferred.

When the user clears the break (ioctl(TIOCCBRK)), max310x_break_ctl() will
hit its early return:

drivers/tty/serial/max310x.c:max310x_break_ctl() {
...
	if (!(port->rs485.flags & SER_RS485_ENABLED))
		return;
...
}

Will max310x_break_ctl(0) skip releasing the manual RTS bit and fail to apply
the deferred RS-485 configurations, locking the RS-485 bus?

[Severity: High]
Can closing the port during a break leave the RTS permanently asserted in
subsequent sessions?

If an application starts a break with RS-485 enabled, max310x_break_ctl(1)
enables the manual RTS bit (MAX310X_LCR_RTS_BIT). If the application closes
the port without clearing the break, max310x_shutdown() powers down the chip
but does not clear its registers. 

When reopened, max310x_startup() handles the latched break:

drivers/tty/serial/max310x.c:max310x_startup() {
...
	one->tx_break = false;
	max310x_port_update(port, MAX310X_LCR_REG, MAX310X_LCR_TXBREAK_BIT, 0);
...
}

Since this clears the TXBREAK bit but neglects to clear the manual RTS bit
(MAX310X_LCR_RTS_BIT), and the hardware auto-RTS path in
max310x_set_rts_ctl_params() does not clear it either, will the transceiver
remain continuously asserted?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260929-max310x-rs485-sw-delay-v5-0-ae46afa583f2@vaisala.com?part=5