From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3163D242D92; Thu, 4 Sep 2025 07:53:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756972409; cv=none; b=Ukk3zbeOEloJthkR/apqn0XHMoA/Z3YwTRY9O8s+Irn7ha1sFZozHEJh+iOPfxCaJ9qKq7gP5Dd0sqB78lz1PRVX9qQb5GT6kVMHhr67XDnj9LMLZJ+jhYkPwWzII6NZlFbCQHU17HPQrM/miyONrpvPcLIF8olXIpXO8bRU6fA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756972409; c=relaxed/simple; bh=9s/42F0Gq7Ks2NERTbJK59XBbcqqqLVgnwg8Gtc4l0o=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=SKJ+wZUpSBy1fxuCDfC8NhatQobWAF+gPgZxyIzzC23LxJUCmZOaC4HUfh6y4fhCKYZW6xCNZE0PzKeZP+cax8PTkKnJFDmMsJ0VzQjny1qwU2YIcD+COZ6yeVNvlFRJo/7+vbnnmBTVsQkGgGQ9fvTazj5eOdUO38BFFiCgGsI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=IxwhBIOe; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IxwhBIOe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7DDCBC4CEF0; Thu, 4 Sep 2025 07:53:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1756972408; bh=9s/42F0Gq7Ks2NERTbJK59XBbcqqqLVgnwg8Gtc4l0o=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=IxwhBIOeDcl3TPSFhg6NrQPBDzjSsxaX4s4BNTedSM+tS93dkU0Jh6RdNi09DyKMI lh3eGi6FZ2Y05CoTGFW31udOEs95ffqkS3T1XQ8BzUr9+uhOb7mgwrBeXVgUD/YpxW 6b8ldhgXcnhbg0Z4aokfFb21JMI1ghjH5LqfKClA61raKRTh8xI/245t2/DcV0XFXI tuHt1jtvCPMbc/cDZVvFZAzoVAX920puzlM6miwtgmbbANyaLbl1SZRoDGMtt2z8RX LDfa09z5rfiF8Rc9AWFTs3CQsjxax8Pm8jkE5VHjyINOiWUtK+xJuYCHsyZacKcQ7+ 3mtpzRaDYc6ng== Message-ID: <214edb7a-2631-4f7f-9516-a38a3796cc0b@kernel.org> Date: Thu, 4 Sep 2025 09:53:25 +0200 Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] serial: max310x: improve interrupt handling To: Tapio Reijonen , Greg Kroah-Hartman , Alexander Shiyan , Hugo Villeneuve Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org References: <20250903-master-max310x-improve-interrupt-handling-v1-1-bfb44829e760@vaisala.com> Content-Language: en-US From: Jiri Slaby Autocrypt: addr=jirislaby@kernel.org; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 03. 09. 25, 11:23, Tapio Reijonen wrote: > When there is a heavy load of receiving characters to all > four UART's, the warning 'Hardware RX FIFO overrun' is > sometimes detected. > The current implementation always service first UART3 until > no more interrupt and then service another UARTs. > > This commit improve interrupt service routine to handle all > interrupt sources, e.g. UARTs when a global IRQ is detected. > > Signed-off-by: Tapio Reijonen > --- > drivers/tty/serial/max310x.c | 21 ++++++++++++++++----- > 1 file changed, 16 insertions(+), 5 deletions(-) > > diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c > index ce260e9949c3c268e706b2615d6fc01adc21e49b..3234ed7c688ff423d25a007ed8b938b249ae0b82 100644 > --- a/drivers/tty/serial/max310x.c > +++ b/drivers/tty/serial/max310x.c > @@ -824,15 +824,26 @@ static irqreturn_t max310x_ist(int irq, void *dev_id) > > if (s->devtype->nr > 1) { > do { > - unsigned int val = ~0; > + unsigned int val; > + unsigned int global_irq = ~0; > + int port; > > WARN_ON_ONCE(regmap_read(s->regmap, > - MAX310X_GLOBALIRQ_REG, &val)); > - val = ((1 << s->devtype->nr) - 1) & ~val; > + MAX310X_GLOBALIRQ_REG, &global_irq)); > + > + val = ((1 << s->devtype->nr) - 1) & ~global_irq; This is horrid. Use GENMASK() (or BIT() below) instead. Likely, you want a local var storing the mask (the first part before the &). > if (!val) > break; > - if (max310x_port_irq(s, fls(val) - 1) == IRQ_HANDLED) > - handled = true; > + > + do { > + port = fls(val) - 1; > + if (max310x_port_irq(s, port) == IRQ_HANDLED) > + handled = true; > + > + global_irq |= 1 << port; > + val = ((1 << s->devtype->nr) - 1) & ~global_irq; > + } while (val); Actually, does it have to be from the end? I am thinking of for_each_and_bit()... > } while (1); > } else { > if (max310x_port_irq(s, 0) == IRQ_HANDLED) thanks, -- js suse labs