Re: [PATCH] serial: uartps: do not deassert RS485 RTS GPIO prematurely

[Martin Kaistra <martin.kaistra@linutronix.de>]

Am 19.08.25 um 12:49 schrieb Greg Kroah-Hartman:
> On Mon, Aug 18, 2025 at 02:00:02PM +0200, Martin Kaistra wrote:
>> Am 18.08.25 um 12:02 schrieb Greg Kroah-Hartman:
>>> On Mon, Aug 18, 2025 at 11:52:16AM +0200, Martin Kaistra wrote:
>>>> After all bytes to be transmitted have been written to the FIFO
>>>> register, the hardware might still be busy actually sending them.
>>>>
>>>> Thus, wait for the TX FIFO to be empty before starting the timer for the
>>>> RTS after send delay.
>>>>
>>>> Fixes: fccc9d9233f9 ("tty: serial: uartps: Add rs485 support to uartps driver")
>>>> Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
>>>> ---
>>>> I tried using the TX empty interrupt instead of polling the register,
>>>> but it doesn't seem to be firing reliably, which is why I chose this
>>>> implementation instead.
>>>>
>>>>    drivers/tty/serial/xilinx_uartps.c | 4 ++++
>>>>    1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
>>>> index fe457bf1e15bb..38d2b33d0b6c8 100644
>>>> --- a/drivers/tty/serial/xilinx_uartps.c
>>>> +++ b/drivers/tty/serial/xilinx_uartps.c
>>>> @@ -454,6 +454,10 @@ static void cdns_uart_handle_tx(void *dev_id)
>>>>    	if (cdns_uart->port->rs485.flags & SER_RS485_ENABLED &&
>>>>    	    (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port))) {
>>>> +		/* Wait for the tx fifo to be actually empty */
>>>> +		while (cdns_uart_tx_empty(port) != TIOCSER_TEMT)
>>>> +			udelay(1);
>>>
>>> Having a while look that could potentially never exit?  What could go
>>> wrong...
>>>
>>> Seriously, what happens if the port never empties due to flow control
>>> stuff?
>>
>> I will add a timeout..
>>
>> Before sending a v2, however, can I ask: will a solution with udelay() even
>> be accepted?
> 
> Probably not, would you want that called when waiting like this?

It would look like this:
+               /* Wait for the TX FIFO to be empty */
+               for (tmout = 1000000; tmout; tmout--) {
+                       if (cdns_uart_tx_empty(port) == TIOCSER_TEMT)
+                               break;
+                       udelay(1);
+               }