From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Chia-Wei Wang <chiawei_wang@aspeedtech.com>,
gregkh@linuxfoundation.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, joel@jms.id.au,
andrew@aj.id.au, jirislaby@kernel.org,
linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
openbmc@lists.ozlabs.org
Subject: Re: [PATCH 1/4] dt-bindings: aspeed: Add UART controller
Date: Fri, 10 Feb 2023 10:12:31 +0100 [thread overview]
Message-ID: <2d0d1866-95f9-942d-57e0-06a5ed17d35d@linaro.org> (raw)
In-Reply-To: <20230210072643.2772-2-chiawei_wang@aspeedtech.com>
On 10/02/2023 08:26, Chia-Wei Wang wrote:
> Add dt-bindings for Aspeed UART controller.
Describe the hardware. What's the difference against existing Aspeed
UART used everywhere?
>
> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
> ---
> .../bindings/serial/aspeed,uart.yaml | 81 +++++++++++++++++++
> 1 file changed, 81 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/serial/aspeed,uart.yaml
Filename: aspeed,ast2600-uart.yaml
(unless you are adding here more compatibles, but your const suggests
that it's not going to happen)
>
> diff --git a/Documentation/devicetree/bindings/serial/aspeed,uart.yaml b/Documentation/devicetree/bindings/serial/aspeed,uart.yaml
> new file mode 100644
> index 000000000000..10c457d6a72e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/aspeed,uart.yaml
> @@ -0,0 +1,81 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/serial/aspeed,uart.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Aspeed Universal Asynchronous Receiver/Transmitter
This title matches other Aspeed UARTs, so aren't you duplicating bindings?
> +
> +maintainers:
> + - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
> +
> +allOf:
> + - $ref: serial.yaml#
> +
> +description: |
> + The Aspeed UART is based on the basic 8250 UART and compatible
> + with 16550A, with support for DMA
> +
> +properties:
> + compatible:
> + const: aspeed,ast2600-uart
> +
> + reg:
> + description: The base address of the UART register bank
Drop description
> + maxItems: 1
> +
> + clocks:
> + description: The clock the baudrate is derived from
> + maxItems: 1
> +
> + interrupts:
> + description: The IRQ number of the device
Drop description
> + maxItems: 1
> +
> + dma-mode:
> + type: boolean
> + description: Enable DMA
Drop property. DMA is enabled on presence of dmas.
> +
> + dma-channel:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: The channel number to be used in the DMA engine
That's not a correct DMA property. dmas and dma-names
git grep dma -- Documentation/devicetree/bindings/
> +
> + virtual:
> + type: boolean
> + description: Indicate virtual UART
Virtual means not existing in real world? We do not describe in DTS
non-existing devices. Drop entire property.
> +
> + sirq:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: The serial IRQ number on LPC bus interface
Drop entire property.
> +
> + sirq-polarity:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: The serial IRQ polarity on LPC bus interface
Drop entire property.
> +
> + pinctrl-0: true
> +
> + pinctrl_names:
> + const: default
Drop both, you do no not need them.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - interrupts
> +
> +unevaluatedProperties: false
> +
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-02-10 9:12 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-10 7:26 [PATCH 0/4] arm: aspeed: Add UART with DMA support Chia-Wei Wang
2023-02-10 7:26 ` [PATCH 1/4] dt-bindings: aspeed: Add UART controller Chia-Wei Wang
2023-02-10 9:12 ` Krzysztof Kozlowski [this message]
2023-02-13 1:57 ` ChiaWei Wang
2023-02-13 8:26 ` Krzysztof Kozlowski
2023-02-13 8:33 ` Krzysztof Kozlowski
2023-02-10 7:26 ` [PATCH 2/4] soc: aspeed: Add UART DMA support Chia-Wei Wang
2023-02-10 9:13 ` Krzysztof Kozlowski
2023-02-13 1:50 ` ChiaWei Wang
2023-02-13 8:31 ` Krzysztof Kozlowski
2023-02-10 10:00 ` kernel test robot
2023-02-10 7:26 ` [PATCH 3/4] serial: 8250: Add Aspeed UART driver Chia-Wei Wang
2023-02-10 10:35 ` Paul Menzel
2023-02-10 13:40 ` Ilpo Järvinen
2023-02-13 4:18 ` ChiaWei Wang
2023-02-10 13:52 ` Ilpo Järvinen
2023-02-13 1:45 ` ChiaWei Wang
2023-02-13 8:54 ` Ilpo Järvinen
2023-02-10 7:26 ` [PATCH 4/4] ARM: dts: aspeed-g6: Add UDMA node Chia-Wei Wang
2023-02-10 9:14 ` Krzysztof Kozlowski
2023-02-13 1:46 ` ChiaWei Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2d0d1866-95f9-942d-57e0-06a5ed17d35d@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=andrew@aj.id.au \
--cc=chiawei_wang@aspeedtech.com \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=jirislaby@kernel.org \
--cc=joel@jms.id.au \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=openbmc@lists.ozlabs.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).