Re: [RFC][PATCH] Xilinx uartlite serial driver

["David H. Lynch Jr." <dhlii@dlasys.net>]

Olof Johansson wrote:
> On Wed, 13 Sep 2006 15:39:09 +0200 Peter Korsgaard <jacmet@sunsite.dk> wrote:
>
>   
>>>>>>> "Peter" == Peter Korsgaard <jacmet@sunsite.dk> writes:
>>>>>>>               
>>  Olof> 2. There seems to be some timeout issues with tx_empty.
>>
>>  Peter> Huh, that's odd - I haven't noticed that. I'll test it again and get
>>  Peter> back to you.
>>
>> Ahh, found it - I didn't update the uart timeout in set_termios so it
>> used a very long timeout. Please give the updated patch a try.
>>     
>
> Looks good. Thanks.
>   

Peter;
	
	I have been working to move from my UartLite driver to yours.

	Aside from the missing early_serial_setup() routine which was fairly
easy to add, as well as adding a timer to poll IO to keep things working
if there was no UartLite interrupt, I have encounter a few other issues.

	Your ulite_console_write performance is pretty slow - almost an order
of magnitude slower than what I am seeing in my driver. I beleive it is
because you are waiting for the Tx FIFO to be empty before and after
sending each character rather than only waiting while the Tx FIFO is full.

	That may also be an issue in the rest of the driver but I have been
unable to get it to through registering the driver.
	I suspect that is because your driver is a platform driver, but you did
not provide patches to the arch/ppc/platforms/4xx/virtex.* or
xilinx_ml???.* to setup the platform device structure.
	If you could provide a copy I would appreciate it.
	
	



-- 
Dave Lynch 					  	    DLA Systems
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