From: Jiri Slaby <jslaby@suse.cz>
To: Vineet Gupta <Vineet.Gupta1@synopsys.com>
Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>,
gregkh@linuxfoundation.org, alan@linux.intel.com,
linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] tty/8250_early: Prevent rounding error in uartclk to baud ratio
Date: Sat, 29 Sep 2012 09:07:33 +0200 [thread overview]
Message-ID: <50669E35.20809@suse.cz> (raw)
In-Reply-To: <506697DC.50200@synopsys.com>
On 09/29/2012 08:40 AM, Vineet Gupta wrote:
> On Friday 28 September 2012 06:32 PM, Jiri Slaby wrote:
>> On 09/28/2012 02:19 PM, Alexey Brodkin wrote:
>>> Modify divisor to select the nearest baud rate divider rather than the
>>> lowest. It minimizes baud rate errors especially on low UART clock
>>> frequencies.
>>>
>>> For example, if uartclk is 33000000 and baud is 115200 the ratio is
>>> about 17.9 The current code selects 17 (5% error) but should select 18
>>> (0.5% error).
>>>
>>> On the same lines as following:
>>> http://www.kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.9-rc3/2.6.9-rc3-mm2/broken-out/serial-pick-nearest-baud-rate-divider.patch
>>>
>>> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
>>> ---
>>> drivers/tty/serial/8250_early.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/tty/serial/8250_early.c b/drivers/tty/serial/8250_early.c
>>> index eaafb98..cfc46b7 100644
>>> --- a/drivers/tty/serial/8250_early.c
>>> +++ b/drivers/tty/serial/8250_early.c
>>> @@ -140,7 +140,7 @@ static void __init init_port(struct early_serial8250_device *device)
>>> serial_out(port, UART_FCR, 0); /* no fifo */
>>> serial_out(port, UART_MCR, 0x3); /* DTR + RTS */
>>>
>>> - divisor = port->uartclk / (16 * device->baud);
>>> + divisor = (port->uartclk + (8 * device->baud)) / (16 * device->baud);
>> So this should be in fact DIV_ROUND_CLOSEST(), right?
>>
>> But anyway I'm missing any explanation of *why* this is needed? This
>> should be part of the commit log. Is there any bug you are fixing here?
>
> Actually the issue showed up when using the stock 8250 driver for
> Synopsys DW UART. This was on a FPGA with ~50MHz clk. When we enabled
> early serial, we saw garbage which Alexey narrowed down to the rounding
> error. So the bug had been latent and it only showed up with such low
> clk rates.
Yes, this is a perfect argument I was asking for and should have been a
part of the commit...
thanks,
--
js
suse labs
next prev parent reply other threads:[~2012-09-29 7:07 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-28 12:19 [PATCH] tty/8250_early: Prevent rounding error in uartclk to baud ratio Alexey Brodkin
2012-09-28 13:02 ` Jiri Slaby
2012-09-29 6:40 ` Vineet Gupta
2012-09-29 7:07 ` Jiri Slaby [this message]
2012-09-29 11:04 ` Vineet Gupta
2012-09-28 13:03 ` Alan Cox
-- strict thread matches above, loose matches on Subject: below --
2012-09-28 12:03 Alexey Brodkin
2012-09-28 13:01 ` Jiri Slaby
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