From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCH] ARM: PL011: add support for extended FIFO-size of PL011-r1p5 Date: Mon, 13 May 2013 23:56:16 -0600 Message-ID: <5191D200.3040604@wwwdotorg.org> References: <007301ce375e$bcf6d6b0$36e48410$@lge.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: Received: from avon.wwwdotorg.org ([70.85.31.133]:59478 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751177Ab3ENF4S (ORCPT ); Tue, 14 May 2013 01:56:18 -0400 In-Reply-To: <007301ce375e$bcf6d6b0$36e48410$@lge.com> Sender: linux-serial-owner@vger.kernel.org List-Id: linux-serial@vger.kernel.org To: Jongsung Kim Cc: Russell King , Greg Kroah-Hartman , jslaby@suse.cz, linux-serial@vger.kernel.org, "linux-kernel@vger.kernel.org" , "linux-rpi-kernel@lists.infradead.org" , "linux-arm-kernel@lists.infradead.org" On 04/12/2013 03:18 AM, Jongsung Kim wrote: > The latest r1p5-revision of the ARM PL011 UART has 32-byte FIFOs, while all > earlier ones have 16-byte FIFOs. This patch suggests a way to set the > FIFO-size correctly & flexibly by using a > function(vendor_data::get_fifosize) rather than using the > vendor_data::fifosize variable. The function takes the UARTPeriphID, and > returns the correct size. This change (now part of 3.10-rc1) breaks the serial port on the BCM2835 ARM SoC (part of the Raspberry Pi). Sorry for not noticing this earlier; a combination of my vacation and laziness I guess. For reference, the AMBA periphid of the UART device there is 0x00341011. The nibble "3" is the revision being tested in: > +static unsigned int get_fifosize_arm(unsigned int periphid) > +{ > + unsigned int rev = (periphid >> 20) & 0xf; > + return rev < 3 ? 16 : 32; > +} Should that be <= not <, or is there just something more wrong in the patch or bcm2835 HW? I wonder how r1p5 maps to 3 in the test above.