[PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

This series implements a common reset framework driver for Tegra, and
updates all relevant Tegra drivers to use it. It also removes the custom
DMA bindings and replaced them with the standard DMA DT bindings.

Historically, the Tegra clock driver has exported a custom API for module
reset. This series removes that API, and transitions DT and drivers to
the new reset framework.

The custom API used a "struct clk" to identify which module to reset, and
consequently some DT bindings and drivers required clocks to be provided
where they really needed just a reset identifier instead. Due to this
known deficiency, I have always considered most Tegra bindings to be
unstable. This series removes this excuse for instability, although I
still consider some Tegra bindings unstable due to the need to convert to
the common DMA bindings.

Historically, Tegra DMA channels have been represented in DT using a
custom nvidia,dma-request-selector property. Now that standard DMA DT
bindings exist, convert all Tegra bindings, DTs, and drivers to use the
standard instead.

This series makes a DT-ABI-incompatible change to:
- Require reset specifiers in DT where relevant.
- Require standard DMA specifiers.
- Remove clock specifiers from DT where they were only needed for reset.
- Remove legacy DMA specifier properties.

I anticipate merging this whole series into the Tegra and arm-soc trees
as its own branch, due to internal dependencies. This branch will be
stable and can then be merged into any other subsystem trees should any
conflicts arise.

This series depends on Peter's Tegra clock driver rework, available at
git://nv-tegra.nvidia.com/user/pdeschrijver/linux tegra-clk-tegra124-0
(or whatever version of that gets included in 3.14)

Cc: ac100@lists.launchpad.net
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: alsa-devel@alsa-project.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: devel@driverdev.osuosl.org
Cc: devicetree@vger.kernel.org
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Dmitry Torokhov <dtor@mail.ru>
Cc: dri-devel@lists.freedesktop.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Julian Andres Klode <jak@jak-linux.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-i2c@vger.kernel.org
Cc: linux-input@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: linux-serial@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Cc: Marc Dietrich <marvin24@gmx.de>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: pdeschrijver@nvidia.com
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Terje Bergström <tbergstrom@nvidia.com>
Cc: treding@nvidia.com
Cc: Wolfram Sang <wsa@the-dreams.de>

Stephen Warren (31):
  ARM: tegra: add missing clock documentation to DT bindings
  ARM: tegra: document reset properties in DT bindings
  ARM: tegra: document use of standard DMA DT bindings
  ARM: tegra: update DT files to add reset properties
  ARM: tegra: update DT files to add DMA properties
  ARM: tegra: select the reset framework
  clk: tegra: implement a reset driver
  pci: tegra: use reset framework
  drm/tegra: use reset framework
  ARM: tegra: pass reset to tegra_powergate_sequence_power_up()
  dma: add channel request API that supports deferred probe
  dma: tegra: use reset framework
  dma: tegra: register as an OF DMA controller
  ASoC: dmaengine: support deferred probe for DMA channels
  ASoC: dmaengine: add custom DMA config to snd_dmaengine_pcm_config
  ASoC: tegra: use reset framework
  ASoC: tegra: call pm_runtime APIs around register accesses
  ASoC: tegra: allocate AHUB FIFO during probe() not startup()
  ASoC: tegra: convert to standard DMA DT bindings
  i2c: tegra: use reset framework
  staging: nvec: use reset framework
  spi: tegra: use reset framework
  spi: tegra: convert to standard DMA DT bindings
  serial: tegra: use reset framework
  serial: tegra: convert to standard DMA DT bindings
  Input: tegra-kbc - use reset framework
  USB: EHCI: tegra: use reset framework
  ARM: tegra: remove legacy clock entries from DT
  ARM: tegra: remove legacy DMA entries from DT
  clk: tegra: remove legacy reset APIs
  clk: tegra: remove bogus PCIE_XCLK

 .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      |   1 +
 .../bindings/clock/nvidia,tegra114-car.txt         |   4 +
 .../bindings/clock/nvidia,tegra124-car.txt         |   4 +
 .../bindings/clock/nvidia,tegra20-car.txt          |   4 +
 .../bindings/clock/nvidia,tegra30-car.txt          |   4 +
 .../devicetree/bindings/dma/tegra20-apbdma.txt     |   9 ++
 .../bindings/gpu/nvidia,tegra20-host1x.txt         | 124 +++++++++++++++
 .../devicetree/bindings/i2c/nvidia,tegra20-i2c.txt |  27 +++-
 .../bindings/input/nvidia,tegra20-kbc.txt          |   9 ++
 .../bindings/mmc/nvidia,tegra20-sdhci.txt          |   9 ++
 .../devicetree/bindings/nvec/nvidia,nvec.txt       |  12 ++
 .../bindings/pci/nvidia,tegra20-pcie.txt           |  28 ++--
 .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt |   9 ++
 .../devicetree/bindings/rtc/nvidia,tegra20-rtc.txt |   3 +
 .../bindings/serial/nvidia,tegra20-hsuart.txt      |  19 ++-
 .../bindings/sound/nvidia,tegra-audio-alc5632.txt  |   7 +-
 .../bindings/sound/nvidia,tegra-audio-rt5640.txt   |   7 +-
 .../bindings/sound/nvidia,tegra-audio-wm8753.txt   |   7 +-
 .../bindings/sound/nvidia,tegra-audio-wm8903.txt   |   7 +-
 .../bindings/sound/nvidia,tegra-audio-wm9712.txt   |   7 +-
 .../bindings/sound/nvidia,tegra20-ac97.txt         |  20 ++-
 .../bindings/sound/nvidia,tegra20-i2s.txt          |  19 ++-
 .../bindings/sound/nvidia,tegra30-ahub.txt         |  54 +++++--
 .../bindings/sound/nvidia,tegra30-i2s.txt          |  11 +-
 .../bindings/spi/nvidia,tegra114-spi.txt           |  24 ++-
 .../bindings/spi/nvidia,tegra20-sflash.txt         |  20 ++-
 .../bindings/spi/nvidia,tegra20-slink.txt          |  20 ++-
 .../bindings/timer/nvidia,tegra20-timer.txt        |   3 +
 .../bindings/timer/nvidia,tegra30-timer.txt        |   3 +
 .../bindings/usb/nvidia,tegra20-ehci.txt           |   7 +-
 arch/arm/boot/dts/tegra114.dtsi                    | 142 ++++++++++++++---
 arch/arm/boot/dts/tegra20-paz00.dts                |   2 +
 arch/arm/boot/dts/tegra20.dtsi                     | 132 ++++++++++++++--
 arch/arm/boot/dts/tegra30.dtsi                     | 171 +++++++++++++++++----
 arch/arm/mach-tegra/Kconfig                        |   2 +
 arch/arm/mach-tegra/powergate.c                    |   8 +-
 drivers/clk/tegra/clk-periph-gate.c                |  22 ---
 drivers/clk/tegra/clk-periph.c                     |  40 -----
 drivers/clk/tegra/clk-tegra114.c                   |   3 +-
 drivers/clk/tegra/clk-tegra124.c                   |   2 +-
 drivers/clk/tegra/clk-tegra20.c                    |   9 +-
 drivers/clk/tegra/clk-tegra30.c                    |  10 +-
 drivers/clk/tegra/clk.c                            |  55 ++++++-
 drivers/clk/tegra/clk.h                            |   3 +-
 drivers/dma/acpi-dma.c                             |  12 +-
 drivers/dma/dmaengine.c                            |  44 +++++-
 drivers/dma/of-dma.c                               |  12 +-
 drivers/dma/tegra20-apb-dma.c                      |  49 +++++-
 drivers/gpu/drm/tegra/Kconfig                      |   1 +
 drivers/gpu/drm/tegra/dc.c                         |   9 +-
 drivers/gpu/drm/tegra/drm.h                        |   3 +
 drivers/gpu/drm/tegra/gr3d.c                       |  22 ++-
 drivers/gpu/drm/tegra/hdmi.c                       |  14 +-
 drivers/i2c/busses/i2c-tegra.c                     |  13 +-
 drivers/input/keyboard/tegra-kbc.c                 |  13 +-
 drivers/pci/host/pci-tegra.c                       |  52 +++++--
 drivers/spi/Kconfig                                |   3 +
 drivers/spi/spi-tegra114.c                         |  66 ++++----
 drivers/spi/spi-tegra20-sflash.c                   |  18 ++-
 drivers/spi/spi-tegra20-slink.c                    |  66 ++++----
 drivers/staging/nvec/nvec.c                        |  11 +-
 drivers/staging/nvec/nvec.h                        |   5 +-
 drivers/tty/serial/serial-tegra.c                  |  86 +++++------
 drivers/usb/host/ehci-tegra.c                      |  14 +-
 include/dt-bindings/clock/tegra20-car.h            |   2 +-
 include/dt-bindings/clock/tegra30-car.h            |   2 +-
 include/linux/clk/tegra.h                          |   7 -
 include/linux/dmaengine.h                          |   7 +
 include/linux/of_dma.h                             |   9 +-
 include/linux/tegra-powergate.h                    |   4 +-
 include/sound/dmaengine_pcm.h                      |   6 +
 sound/soc/soc-generic-dmaengine-pcm.c              |  82 +++++++---
 sound/soc/tegra/Kconfig                            |   2 +
 sound/soc/tegra/tegra20_ac97.c                     |  11 --
 sound/soc/tegra/tegra20_i2s.c                      |  20 +--
 sound/soc/tegra/tegra30_ahub.c                     | 125 +++++++++------
 sound/soc/tegra/tegra30_ahub.h                     |  11 +-
 sound/soc/tegra/tegra30_i2s.c                      |  97 ++++++------
 sound/soc/tegra/tegra30_i2s.h                      |   3 +
 sound/soc/tegra/tegra_pcm.c                        |  17 +-
 sound/soc/tegra/tegra_pcm.h                        |   5 +
 81 files changed, 1448 insertions(+), 558 deletions(-)

-- 
1.8.1.5


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[PATCH 24/31] serial: tegra: use reset framework

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Cc: treding@nvidia.com
Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-serial@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
This patch is part of a series with strong internal depdendencies. I'm
looking for an ack so that I can take the entire series through the Tegra
and arm-soc trees. The series will be part of a stable branch that can be
merged into other subsystems if needed to avoid/resolve dependencies.
---
 drivers/tty/serial/serial-tegra.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index dfe79ccc4fb3..4455481a3517 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -34,6 +34,7 @@
 #include <linux/of_device.h>
 #include <linux/pagemap.h>
 #include <linux/platform_device.h>
+#include <linux/reset.h>
 #include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_core.h>
@@ -44,8 +45,6 @@
 #include <linux/tty.h>
 #include <linux/tty_flip.h>
 
-#include <linux/clk/tegra.h>
-
 #define TEGRA_UART_TYPE				"TEGRA_UART"
 #define TX_EMPTY_STATUS				(UART_LSR_TEMT | UART_LSR_THRE)
 #define BYTES_TO_ALIGN(x)			((unsigned long)(x) & 0x3)
@@ -103,6 +102,7 @@ struct tegra_uart_port {
 	const struct tegra_uart_chip_data	*cdata;
 
 	struct clk				*uart_clk;
+	struct reset_control			*rst;
 	unsigned int				current_baud;
 
 	/* Register shadow */
@@ -832,9 +832,9 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup)
 	clk_prepare_enable(tup->uart_clk);
 
 	/* Reset the UART controller to clear all previous status.*/
-	tegra_periph_reset_assert(tup->uart_clk);
+	reset_control_assert(tup->rst);
 	udelay(10);
-	tegra_periph_reset_deassert(tup->uart_clk);
+	reset_control_deassert(tup->rst);
 
 	tup->rx_in_progress = 0;
 	tup->tx_in_progress = 0;
@@ -1320,6 +1320,12 @@ static int tegra_uart_probe(struct platform_device *pdev)
 		return PTR_ERR(tup->uart_clk);
 	}
 
+	tup->rst = devm_reset_control_get(&pdev->dev, "serial");
+	if (IS_ERR(tup->rst)) {
+		dev_err(&pdev->dev, "Couldn't get the reset\n");
+		return PTR_ERR(tup->rst);
+	}
+
 	u->iotype = UPIO_MEM32;
 	u->irq = platform_get_irq(pdev, 0);
 	u->regshift = 2;
-- 
1.8.1.5

[PATCH 25/31] serial: tegra: convert to standard DMA DT bindings

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

By using dma_request_slave_channel_or_err(), the DMA slave ID can be
looked up from standard DT properties, and squirrelled away during
channel allocation. Hence, there's no need to use a custom DT property
to store the slave ID.

DMA channel allocation is moved to probe() so that deferred probe works.

Cc: treding@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-serial@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
This patch is part of a series with strong internal depdendencies. I'm
looking for an ack so that I can take the entire series through the Tegra
and arm-soc trees. The series will be part of a stable branch that can be
merged into other subsystems if needed to avoid/resolve dependencies.
---
 drivers/tty/serial/serial-tegra.c | 72 ++++++++++++++++-----------------------
 1 file changed, 30 insertions(+), 42 deletions(-)

diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index 4455481a3517..e07c8bfe7459 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -120,7 +120,6 @@ struct tegra_uart_port {
 	bool					rx_timeout;
 	int					rx_in_progress;
 	int					symb_bit;
-	int					dma_req_sel;
 
 	struct dma_chan				*rx_dma_chan;
 	struct dma_chan				*tx_dma_chan;
@@ -910,15 +909,15 @@ static int tegra_uart_dma_channel_allocate(struct tegra_uart_port *tup,
 	dma_addr_t dma_phys;
 	int ret;
 	struct dma_slave_config dma_sconfig;
-	dma_cap_mask_t mask;
 
-	dma_cap_zero(mask);
-	dma_cap_set(DMA_SLAVE, mask);
-	dma_chan = dma_request_channel(mask, NULL, NULL);
-	if (!dma_chan) {
-		dev_err(tup->uport.dev,
-			"Dma channel is not available, will try later\n");
-		return -EPROBE_DEFER;
+	dma_chan = dma_request_slave_channel_or_err(tup->uport.dev,
+						dma_to_memory ? "rx" : "tx");
+	if (IS_ERR(dma_chan)) {
+		ret = PTR_ERR(dma_chan);
+		if (ret != -EPROBE_DEFER)
+			dev_err(tup->uport.dev,
+				"DMA channel alloc failed: %d\n", ret);
+		return ret;
 	}
 
 	if (dma_to_memory) {
@@ -938,7 +937,6 @@ static int tegra_uart_dma_channel_allocate(struct tegra_uart_port *tup,
 		dma_buf = tup->uport.state->xmit.buf;
 	}
 
-	dma_sconfig.slave_id = tup->dma_req_sel;
 	if (dma_to_memory) {
 		dma_sconfig.src_addr = tup->uport.mapbase;
 		dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
@@ -1000,37 +998,20 @@ static int tegra_uart_startup(struct uart_port *u)
 	struct tegra_uart_port *tup = to_tegra_uport(u);
 	int ret;
 
-	ret = tegra_uart_dma_channel_allocate(tup, false);
-	if (ret < 0) {
-		dev_err(u->dev, "Tx Dma allocation failed, err = %d\n", ret);
-		return ret;
-	}
-
-	ret = tegra_uart_dma_channel_allocate(tup, true);
-	if (ret < 0) {
-		dev_err(u->dev, "Rx Dma allocation failed, err = %d\n", ret);
-		goto fail_rx_dma;
-	}
-
 	ret = tegra_uart_hw_init(tup);
 	if (ret < 0) {
 		dev_err(u->dev, "Uart HW init failed, err = %d\n", ret);
-		goto fail_hw_init;
+		return ret;
 	}
 
 	ret = request_irq(u->irq, tegra_uart_isr, 0,
 				dev_name(u->dev), tup);
 	if (ret < 0) {
 		dev_err(u->dev, "Failed to register ISR for IRQ %d\n", u->irq);
-		goto fail_hw_init;
+		return ret;
 	}
-	return 0;
 
-fail_hw_init:
-	tegra_uart_dma_channel_free(tup, true);
-fail_rx_dma:
-	tegra_uart_dma_channel_free(tup, false);
-	return ret;
+	return 0;
 }
 
 static void tegra_uart_shutdown(struct uart_port *u)
@@ -1042,8 +1023,6 @@ static void tegra_uart_shutdown(struct uart_port *u)
 	tup->rx_in_progress = 0;
 	tup->tx_in_progress = 0;
 
-	tegra_uart_dma_channel_free(tup, true);
-	tegra_uart_dma_channel_free(tup, false);
 	free_irq(u->irq, tup);
 }
 
@@ -1222,17 +1201,8 @@ static int tegra_uart_parse_dt(struct platform_device *pdev,
 	struct tegra_uart_port *tup)
 {
 	struct device_node *np = pdev->dev.of_node;
-	u32 of_dma[2];
 	int port;
 
-	if (of_property_read_u32_array(np, "nvidia,dma-request-selector",
-				of_dma, 2) >= 0) {
-		tup->dma_req_sel = of_dma[1];
-	} else {
-		dev_err(&pdev->dev, "missing dma requestor in device tree\n");
-		return -EINVAL;
-	}
-
 	port = of_alias_get_id(np, "serial");
 	if (port < 0) {
 		dev_err(&pdev->dev, "failed to get alias id, errno %d\n", port);
@@ -1326,14 +1296,29 @@ static int tegra_uart_probe(struct platform_device *pdev)
 		return PTR_ERR(tup->rst);
 	}
 
+	ret = tegra_uart_dma_channel_allocate(tup, false);
+	if (ret < 0)
+		return ret;
+
+	ret = tegra_uart_dma_channel_allocate(tup, true);
+	if (ret < 0)
+		goto err_free_dma_tx;
+
 	u->iotype = UPIO_MEM32;
 	u->irq = platform_get_irq(pdev, 0);
 	u->regshift = 2;
 	ret = uart_add_one_port(&tegra_uart_driver, u);
 	if (ret < 0) {
 		dev_err(&pdev->dev, "Failed to add uart port, err %d\n", ret);
-		return ret;
+		goto err_free_dma_rx;
 	}
+
+	return 0;
+
+err_free_dma_tx:
+	tegra_uart_dma_channel_free(tup, false);
+err_free_dma_rx:
+	tegra_uart_dma_channel_free(tup, true);
 	return ret;
 }
 
@@ -1343,6 +1328,9 @@ static int tegra_uart_remove(struct platform_device *pdev)
 	struct uart_port *u = &tup->uport;
 
 	uart_remove_one_port(&tegra_uart_driver, u);
+	tegra_uart_dma_channel_free(tup, true);
+	tegra_uart_dma_channel_free(tup, false);
+
 	return 0;
 }
 
-- 
1.8.1.5

Re: [PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[Terje Bergström]

On 15.11.2013 22:53, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
> 
> This series implements a common reset framework driver for Tegra, and
> updates all relevant Tegra drivers to use it. It also removes the custom
> DMA bindings and replaced them with the standard DMA DT bindings.
> 
> Historically, the Tegra clock driver has exported a custom API for module
> reset. This series removes that API, and transitions DT and drivers to
> the new reset framework.
> 
> The custom API used a "struct clk" to identify which module to reset, and
> consequently some DT bindings and drivers required clocks to be provided
> where they really needed just a reset identifier instead. Due to this
> known deficiency, I have always considered most Tegra bindings to be
> unstable. This series removes this excuse for instability, although I
> still consider some Tegra bindings unstable due to the need to convert to
> the common DMA bindings.
> 
> Historically, Tegra DMA channels have been represented in DT using a
> custom nvidia,dma-request-selector property. Now that standard DMA DT
> bindings exist, convert all Tegra bindings, DTs, and drivers to use the
> standard instead.
> 
> This series makes a DT-ABI-incompatible change to:
> - Require reset specifiers in DT where relevant.
> - Require standard DMA specifiers.
> - Remove clock specifiers from DT where they were only needed for reset.
> - Remove legacy DMA specifier properties.
> 
> I anticipate merging this whole series into the Tegra and arm-soc trees
> as its own branch, due to internal dependencies. This branch will be
> stable and can then be merged into any other subsystem trees should any
> conflicts arise.
> 
> This series depends on Peter's Tegra clock driver rework, available at
> git://nv-tegra.nvidia.com/user/pdeschrijver/linux tegra-clk-tegra124-0
> (or whatever version of that gets included in 3.14)

Overall, a good change. For host1x part:

Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>

This patch does not change the behavior, but we have in original code
the problem that we don't flush the MC queue when resetting an engine.
This can cause some memory writes to not hit memory. There was an
earlier discussion on that, but we seem to have lost track of the issue.

Terje

Re: [PATCH 25/31] serial: tegra: convert to standard DMA DT bindings

[Greg Kroah-Hartman]

On Fri, Nov 15, 2013 at 01:54:20PM -0700, Stephen Warren wrote:
> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> 
> By using dma_request_slave_channel_or_err(), the DMA slave ID can be
> looked up from standard DT properties, and squirrelled away during
> channel allocation. Hence, there's no need to use a custom DT property
> to store the slave ID.
> 
> DMA channel allocation is moved to probe() so that deferred probe works.
> 
> Cc: treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Cc: Greg Kroah-Hartman <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>
> Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> This patch is part of a series with strong internal depdendencies. I'm
> looking for an ack so that I can take the entire series through the Tegra
> and arm-soc trees. The series will be part of a stable branch that can be
> merged into other subsystems if needed to avoid/resolve dependencies.

Acked-by: Greg Kroah-Hartman <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>

Re: [PATCH 24/31] serial: tegra: use reset framework

[Greg Kroah-Hartman]

On Fri, Nov 15, 2013 at 01:54:19PM -0700, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
> 
> Tegra's clock driver now provides an implementation of the common
> reset API (include/linux/reset.h). Use this instead of the old Tegra-
> specific API; that will soon be removed.
> 
> Cc: treding@nvidia.com
> Cc: pdeschrijver@nvidia.com
> Cc: linux-tegra@vger.kernel.org
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: linux-serial@vger.kernel.org
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> This patch is part of a series with strong internal depdendencies. I'm
> looking for an ack so that I can take the entire series through the Tegra
> and arm-soc trees. The series will be part of a stable branch that can be
> merged into other subsystems if needed to avoid/resolve dependencies.

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Re: [PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[Arnd Bergmann]

On Friday 15 November 2013, Stephen Warren wrote:
> This series implements a common reset framework driver for Tegra, and
> updates all relevant Tegra drivers to use it. It also removes the custom
> DMA bindings and replaced them with the standard DMA DT bindings.

The series is rather long, so I may have missed it, but I think you need one
more patch to the apbdma binding to document the use of #dma-cells, what
value it has, and what the format of the dma specifiers in slave drivers
needs to be.

	Arnd

Re: [PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[Stephen Warren]

On 11/20/2013 08:37 AM, Arnd Bergmann wrote:
> On Friday 15 November 2013, Stephen Warren wrote:
>> This series implements a common reset framework driver for Tegra, and
>> updates all relevant Tegra drivers to use it. It also removes the custom
>> DMA bindings and replaced them with the standard DMA DT bindings.
> 
> The series is rather long, so I may have missed it, but I think you need one
> more patch to the apbdma binding to document the use of #dma-cells, what
> value it has, and what the format of the dma specifiers in slave drivers
> needs to be.

Yes, you're right. I will fold the following into "ARM: tegra: document
use of standard DMA DT bindings":

> diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
> index 0b1e577ab9d3..0b0f9498e265 100644
> --- a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
> +++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
> @@ -11,6 +11,10 @@ Required properties:
>    See ../reset/reset.txt for details.
>  - reset-names : Must include the following entries:
>    - dma
> +- #iommu-cells : Must be <1>. This dictates the length of DMA specifiers in
> +  client nodes' dmas properties. The specifier represents the DMA request
> +  select value for the peripheral. For more details, consult the Tegra TRM's
> +  documentation of the APB DMA channel control register REQ_SEL field.
>  
>  Examples:
>  
> @@ -36,4 +40,5 @@ apbdma: dma@6000a000 {
>  	clocks = <&tegra_car 34>;
>  	resets = <&tegra_car 34>;
>  	reset-names = "dma";
> +	#iommu-cells = <1>;
>  };

Re: [PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[Arnd Bergmann]

On Wednesday 20 November 2013, Stephen Warren wrote:
> > +- #iommu-cells : Must be <1>. This dictates the length of DMA specifiers in
> > +  client nodes' dmas properties. The specifier represents the DMA request
> > +  select value for the peripheral. For more details, consult the Tegra TRM's
> > +  documentation of the APB DMA channel control register REQ_SEL field.
> >  
> >  Examples:
> >  
> > @@ -36,4 +40,5 @@ apbdma: dma@6000a000 {
> >       clocks = <&tegra_car 34>;
> >       resets = <&tegra_car 34>;
> >       reset-names = "dma";
> > +     #iommu-cells = <1>;


s/iommu/dma/

Otherwise looks good. The dts files are correct, so I guess it's just
a typo here.

	Arnd

Re: [PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[Stephen Warren]

On 11/20/2013 10:03 AM, Arnd Bergmann wrote:
> On Wednesday 20 November 2013, Stephen Warren wrote:
>>> +- #iommu-cells : Must be <1>. This dictates the length of DMA specifiers in
>>> +  client nodes' dmas properties. The specifier represents the DMA request
>>> +  select value for the peripheral. For more details, consult the Tegra TRM's
>>> +  documentation of the APB DMA channel control register REQ_SEL field.
>>>  
>>>  Examples:
>>>  
>>> @@ -36,4 +40,5 @@ apbdma: dma@6000a000 {
>>>       clocks = <&tegra_car 34>;
>>>       resets = <&tegra_car 34>;
>>>       reset-names = "dma";
>>> +     #iommu-cells = <1>;
> 
> 
> s/iommu/dma/
> 
> Otherwise looks good. The dts files are correct, so I guess it's just
> a typo here.

Thanks, fixed locally.

Re: [Ac100] [PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[Martino Brandolini]

[-- Attachment #1.1: Type: text/plain, Size: 2260 bytes --]

Dear all,
My ac100 screen is flickering so much. I realized I'm not using it anymore.
So if anyone wants to have it for free would be for me a huge pleasure to
give it away. I'm based in milan and I'll be in London for the next week.
Maybe someone needs it.

Martino


2013/11/20 Stephen Warren <swarren@wwwdotorg.org>

> On 11/20/2013 08:37 AM, Arnd Bergmann wrote:
> > On Friday 15 November 2013, Stephen Warren wrote:
> >> This series implements a common reset framework driver for Tegra, and
> >> updates all relevant Tegra drivers to use it. It also removes the custom
> >> DMA bindings and replaced them with the standard DMA DT bindings.
> >
> > The series is rather long, so I may have missed it, but I think you need
> one
> > more patch to the apbdma binding to document the use of #dma-cells, what
> > value it has, and what the format of the dma specifiers in slave drivers
> > needs to be.
>
> Yes, you're right. I will fold the following into "ARM: tegra: document
> use of standard DMA DT bindings":
>
> > diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
> b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
> > index 0b1e577ab9d3..0b0f9498e265 100644
> > --- a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
> > +++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
> > @@ -11,6 +11,10 @@ Required properties:
> >    See ../reset/reset.txt for details.
> >  - reset-names : Must include the following entries:
> >    - dma
> > +- #iommu-cells : Must be <1>. This dictates the length of DMA
> specifiers in
> > +  client nodes' dmas properties. The specifier represents the DMA
> request
> > +  select value for the peripheral. For more details, consult the Tegra
> TRM's
> > +  documentation of the APB DMA channel control register REQ_SEL field.
> >
> >  Examples:
> >
> > @@ -36,4 +40,5 @@ apbdma: dma@6000a000 {
> >       clocks = <&tegra_car 34>;
> >       resets = <&tegra_car 34>;
> >       reset-names = "dma";
> > +     #iommu-cells = <1>;
> >  };
>
>
> _______________________________________________
> Mailing list: https://launchpad.net/~ac100
> Post to     : ac100@lists.launchpad.net
> Unsubscribe : https://launchpad.net/~ac100
> More help   : https://help.launchpad.net/ListHelp
>

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Re: [PATCH 24/31] serial: tegra: use reset framework

[Thierry Reding]

[-- Attachment #1: Type: text/plain, Size: 1316 bytes --]

On Fri, Nov 15, 2013 at 01:54:19PM -0700, Stephen Warren wrote:
> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> 
> Tegra's clock driver now provides an implementation of the common
> reset API (include/linux/reset.h). Use this instead of the old Tegra-
> specific API; that will soon be removed.
> 
> Cc: treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
> Cc: pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Cc: Greg Kroah-Hartman <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>
> Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> This patch is part of a series with strong internal depdendencies. I'm
> looking for an ack so that I can take the entire series through the Tegra
> and arm-soc trees. The series will be part of a stable branch that can be
> merged into other subsystems if needed to avoid/resolve dependencies.
> ---
>  drivers/tty/serial/serial-tegra.c | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)

Reviewed-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]

Re: [PATCH 00/31] ARM: tegra: use common reset and DMA bindings

[Stephen Warren]

On 11/15/2013 01:53 PM, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
> 
> This series implements a common reset framework driver for Tegra, and
> updates all relevant Tegra drivers to use it. It also removes the custom
> DMA bindings and replaced them with the standard DMA DT bindings.
> 
> Historically, the Tegra clock driver has exported a custom API for module
> reset. This series removes that API, and transitions DT and drivers to
> the new reset framework.
> 
> The custom API used a "struct clk" to identify which module to reset, and
> consequently some DT bindings and drivers required clocks to be provided
> where they really needed just a reset identifier instead. Due to this
> known deficiency, I have always considered most Tegra bindings to be
> unstable. This series removes this excuse for instability, although I
> still consider some Tegra bindings unstable due to the need to convert to
> the common DMA bindings.
> 
> Historically, Tegra DMA channels have been represented in DT using a
> custom nvidia,dma-request-selector property. Now that standard DMA DT
> bindings exist, convert all Tegra bindings, DTs, and drivers to use the
> standard instead.
> 
> This series makes a DT-ABI-incompatible change to:
> - Require reset specifiers in DT where relevant.
> - Require standard DMA specifiers.
> - Remove clock specifiers from DT where they were only needed for reset.
> - Remove legacy DMA specifier properties.
> 
> I anticipate merging this whole series into the Tegra and arm-soc trees
> as its own branch, due to internal dependencies. This branch will be
> stable and can then be merged into any other subsystem trees should any
> conflicts arise.
> 
> This series depends on Peter's Tegra clock driver rework, available at
> git://nv-tegra.nvidia.com/user/pdeschrijver/linux tegra-clk-tegra124-0
> (or whatever version of that gets included in 3.14)

I've applied this series (and pulled in the DMA/ASoC/clk dependencies
required) to Tegra's for-3.14/dmas-resets-rework branch.