Re: [PATCH 4/4] serial: 8250_dw: use serial_in() and not readl()

[Peter Hurley <peter@hurleysoftware.com>]

Hi Noam,

On 07/22/2015 05:34 AM, Noam Camus wrote:
> From: Noam Camus <noamc@ezchip.com>
> 
> This is now matches device endianness.

I'm not seeing where serial_in() is used here, as claimed by the $subject.

Regards,
Peter Hurley

> Signed-off-by: Noam Camus <noamc@ezchip.com>
> ---
>  drivers/tty/serial/8250/8250_dw.c |    8 ++++++--
>  1 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index 620f983..a64197c 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -291,7 +291,9 @@ static bool dw8250_dma_filter(struct dma_chan *chan, void *param)
>  static void dw8250_setup_port(struct uart_8250_port *up)
>  {
>  	struct uart_port	*p = &up->port;
> -	u32			reg = readl(p->membase + DW_UART_UCV);
> +	u32			reg = (p->iotype == UPIO_MEM32BE) ?
> +					ioread32be(p->membase + DW_UART_UCV) :
> +					readl(p->membase + DW_UART_UCV);
>  
>  	/*
>  	 * If the Component Version Register returns zero, we know that
> @@ -303,7 +305,9 @@ static void dw8250_setup_port(struct uart_8250_port *up)
>  	dev_dbg_ratelimited(p->dev, "Designware UART version %c.%c%c\n",
>  		(reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);
>  
> -	reg = readl(p->membase + DW_UART_CPR);
> +	reg = (p->iotype == UPIO_MEM32BE) ?
> +		ioread32be(p->membase + DW_UART_CPR) :
> +		readl(p->membase + DW_UART_CPR);
>  	if (!reg)
>  		return;
>  
>