From mboxrd@z Thu Jan  1 00:00:00 1970
From: Timur Tabi <timur@codeaurora.org>
Subject: Re: [PATCH v13 5/5] uart: pl011: Add support to ZTE ZX296702 uart
Date: Mon, 26 Oct 2015 09:07:42 -0500
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To: Andre Przywara <andre.przywara@arm.com>, Jun Nie <jun.nie@linaro.org>
Cc: "linux@arm.linux.org.uk" <linux@arm.linux.org.uk>, "peter@hurleysoftware.com" <peter@hurleysoftware.com>, "jason.liu@linaro.org" <jason.liu@linaro.org>, "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>, Andrew Jackson <Andrew.Jackson@arm.com>, "linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>, "shawn.guo@linaro.org" <shawn.guo@linaro.org>, "wan.zhijun@zte.com.cn" <wan.zhijun@zte.com.cn>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>
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Andre Przywara wrote:

> Yeah, I was interested in that scenario too, because the SBSA spec
> actually speaks of 32-bit registers and vendors may implement it
> strictly as that. Still waiting for actual failure reports on this
> before I wanted to push a fix, though.

What do you mean by failure reports?  Our hardware generates an SError 
if you try to access the PL011 registers with 8-bit or 16-bit reads or 
writes.

>> We have an internal patch
>> that replaces all of the read/write routines with vendor function calls.
>>   I would need to refactor our patch on top of yours.
>
> But wouldn't Jun's patch address this more easily, because it wraps
> every call already? TBH I found this change the most interesting.

Yes, but I think it changes a lot of things unnecessarily, like the 
register names.

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
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