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Wed, 17 Jan 2024 06:59:27 -0800 (PST) Received: from [192.168.2.107] ([79.115.63.202]) by smtp.gmail.com with ESMTPSA id bm19-20020a170906c05300b00a2362c5e3dbsm7856439ejb.151.2024.01.17.06.59.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 Jan 2024 06:59:27 -0800 (PST) Message-ID: <59a2e142-e970-4792-9233-7c447ac391b2@linaro.org> Date: Wed, 17 Jan 2024 14:59:24 +0000 Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 08/12] arm64: dts: exynos: gs101: remove reg-io-width from serial Content-Language: en-US To: Sam Protsenko Cc: peter.griffin@linaro.org, krzysztof.kozlowski+dt@linaro.org, gregkh@linuxfoundation.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, conor+dt@kernel.org, andi.shyti@kernel.org, alim.akhtar@samsung.com, jirislaby@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org, andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com References: <20240109125814.3691033-1-tudor.ambarus@linaro.org> <20240109125814.3691033-9-tudor.ambarus@linaro.org> From: Tudor Ambarus In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 1/16/24 17:57, Sam Protsenko wrote: > On Tue, Jan 9, 2024 at 7:00 AM Tudor Ambarus wrote: >> Remove the reg-io-width property in order to comply with the bindings. >> >> The entire bus (PERIC) on which the GS101 serial resides only allows >> 32-bit register accesses. The reg-io-width dt property is disallowed >> for the "google,gs101-uart" compatible and instead the iotype is >> inferred from the compatible. >> >> Reviewed-by: Peter Griffin >> Signed-off-by: Tudor Ambarus >> --- > Reviewed-by: Sam Protsenko > > Just out of curiosity (I probably missed the relevant discussion > earlier): what is the actual reason for moving 'reg-io-width' to the > driver's code as 'iotype'? I mean, what is the actual problem that's The majority (if not all?) of the hardware blocks in GS101 SoC require 32 bit register access widths. Instead of specifying reg-io-width = 4 everywhere in the device tree, we infer it from the compatibles. The relevant discussion is here: https://lore.kernel.org/linux-arm-kernel/db368449-f446-47e8-81b6-a11c2a872306@linaro.org/ Cheers, ta > being solved by this -- is it to make the earlycon functional for > gs101? I'm asking because the bus width looks like a part of HW > description, which usually belongs to dts, from the design point of > view. Anyways, that's not a concern, just trying to understand the > decision.