From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: matthew.gerlach@linux.intel.com
Cc: Tom Rix <trix@redhat.com>,
hao.wu@intel.com, yilun.xu@intel.com, russell.h.weight@intel.com,
basheer.ahmed.muddebihal@intel.com, mdf@kernel.org,
linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, tianfei.zhang@intel.com,
corbet@lwn.net, gregkh@linuxfoundation.org,
linux-serial@vger.kernel.org, jirislaby@kernel.org,
geert+renesas@glider.be, niklas.soderlund+renesas@ragnatech.se,
macro@orcam.me.uk, johan@kernel.org, lukas@wunner.de,
ilpo.jarvinen@linux.intel.com, marpagan@redhat.com,
bagasdotme@gmail.com
Subject: Re: [PATCH v8 3/4] fpga: dfl: add basic support for DFHv1
Date: Mon, 2 Jan 2023 19:28:25 +0200 [thread overview]
Message-ID: <Y7MUOQ/X/ls5/+RP@smile.fi.intel.com> (raw)
In-Reply-To: <Y7MT6e8c2VLCjZuw@smile.fi.intel.com>
On Mon, Jan 02, 2023 at 07:27:06PM +0200, Andy Shevchenko wrote:
> On Mon, Jan 02, 2023 at 08:54:48AM -0800, matthew.gerlach@linux.intel.com wrote:
> > On Thu, 29 Dec 2022, Andy Shevchenko wrote:
> > > On Thu, Dec 29, 2022 at 08:18:03AM -0800, Tom Rix wrote:
> > > > On 12/28/22 10:16 AM, matthew.gerlach@linux.intel.com wrote:
...
> > > > > + u64 params[];
> > > > u64 *params
>
> > > This will break the overflow.h macros, no?
> > > Besides that it will break the code for sure as it's not an equivalent.
>
> > I don't understand how this will break the overflow.h macros. The definition
> > of struct dfl_feature_info and all of its uses are in a single file, dfl.c.
>
> Hint: __must_be_array()
>
> As I said, the proposed change is not acceptable since it's not an equivalent.
Ah, you meant that there is no use of macros from overflow in the dfl.c?
IIRC we discussed that some of the code may make use of them, or am I
mistaken?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2023-01-02 17:28 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-28 18:16 [PATCH v8 0/4] Enhance definition of DFH and use enhancements for UART driver matthew.gerlach
2022-12-28 18:16 ` [PATCH v8 1/4] Documentation: fpga: dfl: Add documentation for DFHv1 matthew.gerlach
2022-12-29 15:31 ` Tom Rix
2022-12-29 18:48 ` matthew.gerlach
2022-12-28 18:16 ` [PATCH v8 2/4] fpga: dfl: Add DFHv1 Register Definitions matthew.gerlach
2022-12-28 18:16 ` [PATCH v8 3/4] fpga: dfl: add basic support for DFHv1 matthew.gerlach
2022-12-29 9:57 ` Andy Shevchenko
2022-12-29 17:31 ` matthew.gerlach
2022-12-29 16:18 ` Tom Rix
2022-12-29 18:25 ` matthew.gerlach
2022-12-29 20:41 ` Andy Shevchenko
2023-01-02 16:54 ` matthew.gerlach
2023-01-02 17:27 ` Andy Shevchenko
2023-01-02 17:28 ` Andy Shevchenko [this message]
2023-01-02 18:09 ` matthew.gerlach
2022-12-30 9:23 ` Xu Yilun
2023-01-02 18:25 ` matthew.gerlach
2022-12-28 18:16 ` [PATCH v8 4/4] tty: serial: 8250: add DFL bus driver for Altera 16550 matthew.gerlach
2022-12-29 9:58 ` Andy Shevchenko
2022-12-29 17:33 ` matthew.gerlach
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