* [PATCH 3/3] gpio: sprd: Add clear interrupt
@ 2023-08-08 3:31 Wenhua Lin
2023-08-08 13:25 ` Andy Shevchenko
2023-08-09 1:31 ` Baolin Wang
0 siblings, 2 replies; 7+ messages in thread
From: Wenhua Lin @ 2023-08-08 3:31 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Andy Shevchenko, Orson Zhai,
Baolin Wang, Chunyan Zhang
Cc: linux-serial, linux-kernel, wenhua lin, Wenhua Lin, Xiongpeng Wu
Clear interrupt after set the interrupt type.
Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com>
---
drivers/gpio/gpio-eic-sprd.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c
index c506cfd6df8e..31125f53bc97 100644
--- a/drivers/gpio/gpio-eic-sprd.c
+++ b/drivers/gpio/gpio-eic-sprd.c
@@ -374,29 +374,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_edge_irq);
break;
case IRQ_TYPE_EDGE_FALLING:
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_edge_irq);
break;
case IRQ_TYPE_EDGE_BOTH:
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1);
+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_edge_irq);
break;
case IRQ_TYPE_LEVEL_HIGH:
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_level_irq);
break;
case IRQ_TYPE_LEVEL_LOW:
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_level_irq);
break;
default:
@@ -409,29 +414,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_edge_irq);
break;
case IRQ_TYPE_EDGE_FALLING:
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_edge_irq);
break;
case IRQ_TYPE_EDGE_BOTH:
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1);
+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_edge_irq);
break;
case IRQ_TYPE_LEVEL_HIGH:
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_level_irq);
break;
case IRQ_TYPE_LEVEL_LOW:
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
irq_set_handler_locked(data, handle_level_irq);
break;
default:
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] gpio: sprd: Add clear interrupt
2023-08-08 3:31 [PATCH 3/3] gpio: sprd: Add clear interrupt Wenhua Lin
@ 2023-08-08 13:25 ` Andy Shevchenko
2023-08-10 7:27 ` wenhua lin
2023-08-09 1:31 ` Baolin Wang
1 sibling, 1 reply; 7+ messages in thread
From: Andy Shevchenko @ 2023-08-08 13:25 UTC (permalink / raw)
To: Wenhua Lin
Cc: Linus Walleij, Bartosz Golaszewski, Orson Zhai, Baolin Wang,
Chunyan Zhang, linux-serial, linux-kernel, wenhua lin,
Xiongpeng Wu
On Tue, Aug 08, 2023 at 11:31:44AM +0800, Wenhua Lin wrote:
> Clear interrupt after set the interrupt type.
Why?
Can't it be done in the ->init_hw() callback of GPIO IRQ chip?
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] gpio: sprd: Add clear interrupt
2023-08-08 3:31 [PATCH 3/3] gpio: sprd: Add clear interrupt Wenhua Lin
2023-08-08 13:25 ` Andy Shevchenko
@ 2023-08-09 1:31 ` Baolin Wang
2023-08-10 7:08 ` wenhua lin
1 sibling, 1 reply; 7+ messages in thread
From: Baolin Wang @ 2023-08-09 1:31 UTC (permalink / raw)
To: Wenhua Lin, Linus Walleij, Bartosz Golaszewski, Andy Shevchenko,
Orson Zhai, Chunyan Zhang
Cc: linux-serial, linux-kernel, wenhua lin, Xiongpeng Wu
On 8/8/2023 11:31 AM, Wenhua Lin wrote:
> Clear interrupt after set the interrupt type.
Sorry, NAK. The commit message is meaningless.
> Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com>
> ---
> drivers/gpio/gpio-eic-sprd.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c
> index c506cfd6df8e..31125f53bc97 100644
> --- a/drivers/gpio/gpio-eic-sprd.c
> +++ b/drivers/gpio/gpio-eic-sprd.c
> @@ -374,29 +374,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
> + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_edge_irq);
> break;
> case IRQ_TYPE_EDGE_FALLING:
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
> + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_edge_irq);
> break;
> case IRQ_TYPE_EDGE_BOTH:
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1);
> + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_edge_irq);
> break;
> case IRQ_TYPE_LEVEL_HIGH:
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
> + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_level_irq);
> break;
> case IRQ_TYPE_LEVEL_LOW:
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
> sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
> + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_level_irq);
> break;
> default:
> @@ -409,29 +414,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
> + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_edge_irq);
> break;
> case IRQ_TYPE_EDGE_FALLING:
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
> + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_edge_irq);
> break;
> case IRQ_TYPE_EDGE_BOTH:
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1);
> + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_edge_irq);
> break;
> case IRQ_TYPE_LEVEL_HIGH:
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
> + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_level_irq);
> break;
> case IRQ_TYPE_LEVEL_LOW:
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
> sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
> + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> irq_set_handler_locked(data, handle_level_irq);
> break;
> default:
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] gpio: sprd: Add clear interrupt
2023-08-09 1:31 ` Baolin Wang
@ 2023-08-10 7:08 ` wenhua lin
0 siblings, 0 replies; 7+ messages in thread
From: wenhua lin @ 2023-08-10 7:08 UTC (permalink / raw)
To: Baolin Wang
Cc: Wenhua Lin, Linus Walleij, Bartosz Golaszewski, Andy Shevchenko,
Orson Zhai, Chunyan Zhang, linux-serial, linux-kernel,
Xiongpeng Wu
On Wed, Aug 9, 2023 at 9:31 AM Baolin Wang
<baolin.wang@linux.alibaba.com> wrote:
>
>
>
> On 8/8/2023 11:31 AM, Wenhua Lin wrote:
> > Clear interrupt after set the interrupt type.
>
> Sorry, NAK. The commit message is meaningless.
Hi baolin:
We will re-modify the commit message and submit it in patch v2.
Thanks
Wenhua.Lin
>
> > Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com>
> > ---
> > drivers/gpio/gpio-eic-sprd.c | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c
> > index c506cfd6df8e..31125f53bc97 100644
> > --- a/drivers/gpio/gpio-eic-sprd.c
> > +++ b/drivers/gpio/gpio-eic-sprd.c
> > @@ -374,29 +374,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
> > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_edge_irq);
> > break;
> > case IRQ_TYPE_EDGE_FALLING:
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
> > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_edge_irq);
> > break;
> > case IRQ_TYPE_EDGE_BOTH:
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1);
> > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_edge_irq);
> > break;
> > case IRQ_TYPE_LEVEL_HIGH:
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
> > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_level_irq);
> > break;
> > case IRQ_TYPE_LEVEL_LOW:
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
> > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
> > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_level_irq);
> > break;
> > default:
> > @@ -409,29 +414,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
> > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_edge_irq);
> > break;
> > case IRQ_TYPE_EDGE_FALLING:
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
> > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_edge_irq);
> > break;
> > case IRQ_TYPE_EDGE_BOTH:
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1);
> > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_edge_irq);
> > break;
> > case IRQ_TYPE_LEVEL_HIGH:
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
> > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_level_irq);
> > break;
> > case IRQ_TYPE_LEVEL_LOW:
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
> > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
> > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
> > irq_set_handler_locked(data, handle_level_irq);
> > break;
> > default:
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] gpio: sprd: Add clear interrupt
2023-08-08 13:25 ` Andy Shevchenko
@ 2023-08-10 7:27 ` wenhua lin
2023-08-10 9:56 ` Andy Shevchenko
0 siblings, 1 reply; 7+ messages in thread
From: wenhua lin @ 2023-08-10 7:27 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Wenhua Lin, Linus Walleij, Bartosz Golaszewski, Orson Zhai,
Baolin Wang, Chunyan Zhang, linux-serial, linux-kernel,
Xiongpeng Wu
On Tue, Aug 8, 2023 at 9:25 PM Andy Shevchenko <andy@kernel.org> wrote:
>
> On Tue, Aug 08, 2023 at 11:31:44AM +0800, Wenhua Lin wrote:
> > Clear interrupt after set the interrupt type.
>
> Why?
>
> Can't it be done in the ->init_hw() callback of GPIO IRQ chip?
Hi Andy:
The initialization state of EIC is high-level trigger. If the external
level is high and the interrupt condition is met,
EIC has a latch function. If the module registers the eic interrupt,
an interrupt will be generated immediately
as soon as the eic interrupt is enabled. To solve this problem, our
processing method is to clear the interrupt
once when setting the interrupt trigger type, in order to avoid that
this interrupt is the last interrupt.
Thanks
Wenhua.Lin
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] gpio: sprd: Add clear interrupt
2023-08-10 7:27 ` wenhua lin
@ 2023-08-10 9:56 ` Andy Shevchenko
2023-08-11 7:52 ` wenhua lin
0 siblings, 1 reply; 7+ messages in thread
From: Andy Shevchenko @ 2023-08-10 9:56 UTC (permalink / raw)
To: wenhua lin
Cc: Andy Shevchenko, Wenhua Lin, Linus Walleij, Bartosz Golaszewski,
Orson Zhai, Baolin Wang, Chunyan Zhang, linux-serial,
linux-kernel, Xiongpeng Wu
On Thu, Aug 10, 2023 at 10:27 AM wenhua lin <wenhua.lin1994@gmail.com> wrote:
> On Tue, Aug 8, 2023 at 9:25 PM Andy Shevchenko <andy@kernel.org> wrote:
> > On Tue, Aug 08, 2023 at 11:31:44AM +0800, Wenhua Lin wrote:
> > > Clear interrupt after set the interrupt type.
> >
> > Why?
> >
> > Can't it be done in the ->init_hw() callback of GPIO IRQ chip?
>
> Hi Andy:
> The initialization state of EIC is high-level trigger. If the external
> level is high and the interrupt condition is met,
> EIC has a latch function. If the module registers the eic interrupt,
> an interrupt will be generated immediately
> as soon as the eic interrupt is enabled. To solve this problem, our
> processing method is to clear the interrupt
> once when setting the interrupt trigger type, in order to avoid that
> this interrupt is the last interrupt.
Obvious question, isn't this needed to be added to ->init_hw() as well?
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] gpio: sprd: Add clear interrupt
2023-08-10 9:56 ` Andy Shevchenko
@ 2023-08-11 7:52 ` wenhua lin
0 siblings, 0 replies; 7+ messages in thread
From: wenhua lin @ 2023-08-11 7:52 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Andy Shevchenko, Wenhua Lin, Linus Walleij, Bartosz Golaszewski,
Orson Zhai, Baolin Wang, Chunyan Zhang, linux-serial,
linux-kernel, Xiongpeng Wu
On Thu, Aug 10, 2023 at 5:57 PM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>
> On Thu, Aug 10, 2023 at 10:27 AM wenhua lin <wenhua.lin1994@gmail.com> wrote:
> > On Tue, Aug 8, 2023 at 9:25 PM Andy Shevchenko <andy@kernel.org> wrote:
> > > On Tue, Aug 08, 2023 at 11:31:44AM +0800, Wenhua Lin wrote:
> > > > Clear interrupt after set the interrupt type.
> > >
> > > Why?
> > >
> > > Can't it be done in the ->init_hw() callback of GPIO IRQ chip?
> >
> > Hi Andy:
> > The initialization state of EIC is high-level trigger. If the external
> > level is high and the interrupt condition is met,
> > EIC has a latch function. If the module registers the eic interrupt,
> > an interrupt will be generated immediately
> > as soon as the eic interrupt is enabled. To solve this problem, our
> > processing method is to clear the interrupt
> > once when setting the interrupt trigger type, in order to avoid that
> > this interrupt is the last interrupt.
>
> Obvious question, isn't this needed to be added to ->init_hw() as well?
In the ->init_hw() function, the sprd_gpio_irq_ack interface will be called
to clear the interrupt, and there is no need to add it repeatedly
>
> --
> With Best Regards,
> Andy Shevchenko
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-08-11 7:52 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2023-08-08 3:31 [PATCH 3/3] gpio: sprd: Add clear interrupt Wenhua Lin
2023-08-08 13:25 ` Andy Shevchenko
2023-08-10 7:27 ` wenhua lin
2023-08-10 9:56 ` Andy Shevchenko
2023-08-11 7:52 ` wenhua lin
2023-08-09 1:31 ` Baolin Wang
2023-08-10 7:08 ` wenhua lin
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