Re: [PATCH v3] tty/serial: create debugfs interface for UART register tracing

[Andy Shevchenko <andriy.shevchenko@intel.com>]

On Mon, Sep 11, 2023 at 04:14:48PM -0600, Dan Raymond wrote:
> >>>> Implement a UART register tracing facility using the debugfs.  This can be
> >>>> used as a "serial port sniffer" to monitor UART traffic and line settings
> >>>> with timestamps at microsecond granularity.  This can be useful for general
> >>>> serial port debugging or to debug the UART driver itself.
> >>>
> >>>>  drivers/tty/serial/8250/8250_debug.c | 530 +++++++++++++++++++++++++++
> >>>
> >>> My gosh. Why trace points and trace events can't be used for that?
> >>
> >> I don't understand your post.  Are you saying there is already a way to
> >> trace UART register reads/writes without this patch? Can you elaborate?
> > 
> > Besides what Greg an I were telling you (another type of infrastructure),
> > as a matter of fact you may trace any IO on some architectures (at least x86),
> > it's called mmiotracer (I have used it like 5 years ago or so to trace UART).
> > 
> > Below is the excerpt from my old shell script
> > 
> > rebind() {
> > 	local drvdir="/sys/bus/$1/drivers/$2"
> > 	local devdir="/sys/bus/$1/devices/$3"
> > 	[ -d "$drvdir" -a -d "$devdir" ] || return
> > 	echo "$3" > "$drvdir/unbind"
> > 	echo "$3" > "$drvdir/bind"
> > }
> > 
> > mmiotrace() {
> > 	echo mmiotrace > /sys/kernel/tracing/current_tracer
> > 	echo 1 > /sys/kernel/tracing/tracing_on
> > 
> > 	rebind platform 'dw-apb-uart'   '80860F0A:00'   # BYT ttyS1 (ACPI)
> > 	rebind platform 'dw-apb-uart'   '8086228A:00'   # BSW ttyS1 (ACPI)
> > 	rebind pci      '8250_mid'      '0000:00:04.2'  # Edison ttyS1
> > 	rebind pci      'intel-lpss'    '0000:00:18.1'  # BXT LH ttyS1
> > 	rebind pci      'intel-lpss'    '0000:00:1e.0'  # SKL ttyS1
> > 	rebind pci      '8250_lpss'     '0000:00:1e.3'  # BSW ttyS1 (PCI)
> > }
> 
> Correct me if I'm wrong but I don't think mmiotrace will work for me.  My
> environment comprises an Intel Celeron M connected to an 852GM north bridge,
> an ICH4 south bridge, and a SCH3114 Super I/O controller.  My UART device
> is ttyS1 and it uses port I/O not memory-mapped I/O.

Correct, mmiotrace (as suggested by its name) works only on MMIO.
For IO there is no such mechanism as there are no exceptions when
you access IO ports.

So, in such case the only instrumentation can help, but I suggest
to do it generally as you may miss the writes or reads that are
not going via serial_*() APIs.

Look how lib/trace_readwrite.c is done.

-- 
With Best Regards,
Andy Shevchenko