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charset=us-ascii Content-Disposition: inline In-Reply-To: <62eca5d814da3734cfa984a78e0978efefbbc827.1727873292.git.pnewman@connecttech.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Wed, Oct 02, 2024 at 10:14:07AM -0400, Parker Newman wrote: > From: Parker Newman > > Add a quirk similar to eeprom_93xx46 to add an extra clock cycle before > reading data from the EEPROM. > > The 93Cx6 family of EEPROMs output a "dummy 0 bit" between the writing > of the op-code/address from the host to the EEPROM and the reading of > the actual data from the EEPROM. > > More info can be found on page 6 of the AT93C46 datasheet (linked below). > Similar notes are found in other 93xx6 datasheets. > > In summary the read operation for a 93Cx6 EEPROM is: > Write to EEPROM: 110[A5-A0] (9 bits) > Read from EEPROM: 0[D15-D0] (17 bits) > > Where: > 110 is the start bit and READ OpCode > [A5-A0] is the address to read from > 0 is a "dummy bit" preceding the actual data > [D15-D0] is the actual data. > > Looking at the READ timing diagrams in the 93Cx6 datasheets the dummy > bit should be clocked out on the last address bit clock cycle meaning it > should be discarded naturally. > > However, depending on the hardware configuration sometimes this dummy > bit is not discarded. This is the case with Exar PCI UARTs which require > an extra clock cycle between sending the address and reading the data. ... > +static inline bool has_quirk_extra_read_cycle(struct eeprom_93cx6 *eeprom) > +{ > + return eeprom->quirks & PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE; > +} > + Seems to me the redundant new line at the end of file. -- With Best Regards, Andy Shevchenko