From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Artem Shimko <a.shimko.dev@gmail.com>
Cc: sashal@kernel.org, miquel.raynal@bootlin.com,
phil.edworthy@renesas.com,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH] serial: 8250_dw: Clean up register macros and error handling
Date: Mon, 27 Apr 2026 10:02:02 +0300 [thread overview]
Message-ID: <ae8J6uqgOarcduas@ashevche-desk.local> (raw)
In-Reply-To: <20260424210525.1574497-1-a.shimko.dev@gmail.com>
On Sat, Apr 25, 2026 at 12:05:24AM +0300, Artem Shimko wrote:
> Align register offset definitions for DW_UART_USR, DW_UART_DMASA,
> OCTEON_UART_USR, RZN1_UART_TDMACR and RZN1_UART_RDMACR to improve
> readability. Replace raw shift with FIELD_PREP() and GENMASK() for
> RZN1_UART_xDMACR burst field definitions — this documents that the
> field occupies bits [2:1] and prevents accidental overflow when new
> burst values are added.
>
> Simplify ENXIO handling in dw8250_probe(): instead of explicitly
> zeroing 'err' and then checking it, use a single conditional that
> allows -ENXIO (no interrupt, fall back to polling) while treating
> any other error as fatal. No functional change intended.
There is real patch series in-flight which we want to apply.
This one may wait till that happen. You may also help reviewing that
in a way that this patch won't be needed at all (or be minimal).
https://lore.kernel.org/linux-serial/20260424-ultrarisc-serial-v4-0-1765a0b4c4a0@ultrarisc.com/
--
With Best Regards,
Andy Shevchenko
prev parent reply other threads:[~2026-04-27 7:02 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-24 21:05 [PATCH] serial: 8250_dw: Clean up register macros and error handling Artem Shimko
2026-04-27 7:02 ` Andy Shevchenko [this message]
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