From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Maciej W. Rozycki" Subject: Re: [PATCH 00/36] Add Cavium OCTEON processor support (v2). Date: Wed, 29 Oct 2008 19:15:06 +0000 (GMT) Message-ID: References: <490655B6.4030406@caviumnetworks.com> Mime-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-path: In-Reply-To: <490655B6.4030406@caviumnetworks.com> Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org To: David Daney Cc: linux-mips , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Morton , "Paoletti, Tomaso" List-Id: linux-serial@vger.kernel.org On Mon, 27 Oct 2008, David Daney wrote: > This patch set introduces preliminary support for Cavium Networks' > OCTEON processor family. More information about these processors may > be obtained here: > > http://www.caviumnetworks.com/OCTEON_MIPS64.html Well, in the context of a technical mailing list there isn't much more information available at the link you've quoted; although I do understand you might not be the most appropriate person to point it to. Honestly, stating: "The family comprises SOC devices built around MIPS64 cores" would provide about as much (little) information as the web site does. :( Maciej