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Thu, 29 Oct 2026 22:56:25 -0700 (PDT) Received: from debian ([169.211.140.146]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ae8454327esm2520564a91.4.2026.10.29.22.56.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2026 22:56:24 -0700 (PDT) Date: Fri, 30 Oct 2026 01:56:15 -0400 From: Kwanghoon Son To: Conor Dooley Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Miguel Ojeda , Boqun Feng , Gary Guo , =?iso-8859-1?Q?Bj=F6rn?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Tamir Duberstein , Alexandre Courbot , Onur =?iso-8859-1?Q?=D6zkan?= , Thomas Gleixner , Radu Rendec , Paul Walmsley , Samuel Holland , Palmer Dabbelt , Daniel Lezcano , Anup Patel , Albert Ou , Alexandre Ghiti , Greg Kroah-Hartman , Jiri Slaby , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, Paul Walmsley , linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org Subject: Re: [PATCH RFC 05/12] dt-bindings: serial: Add BL808 UART Message-ID: References: <20261029-rust-bl808-console-v1-0-b736ee920078@gmail.com> <20261029-rust-bl808-console-v1-5-b736ee920078@gmail.com> <20261029-pouch-enunciate-e74cf84e42a7@spud> <20261029-sequester-countable-6a7b597c2551@spud> X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261029-sequester-countable-6a7b597c2551@spud> On Thu, Oct 29, 2026 at 07:18:38PM +0000, Conor Dooley wrote: > On Thu, Oct 29, 2026 at 06:54:49PM +0000, Conor Dooley wrote: > > On Thu, Oct 29, 2026 at 01:05:46AM -0400, Kwanghoon Son wrote: > > > Describe the UART register range, interrupt and baud clock input. > > > Initial Linux support targets the BL808 32-byte FIFO and reuses > > > Zephyr's bflb,uart compatible. UART3 is D0 PLIC source 20. > > > > > > Link: https://docs.zephyrproject.org/latest/build/dts/api/bindings/serial/bflb,uart.html > > > > > > Signed-off-by: Kwanghoon Son > > > --- > > > .../devicetree/bindings/serial/bflb,uart.yaml | 57 ++++++++++++++++++++++ > > > 1 file changed, 57 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/serial/bflb,uart.yaml b/Documentation/devicetree/bindings/serial/bflb,uart.yaml > > > new file mode 100644 > > > index 0000000000000000000000000000000000000000..df29d258f0a1c6d7bb283cf19c4157436991b64b > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/serial/bflb,uart.yaml > > > @@ -0,0 +1,57 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/serial/bflb,uart.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Bouffalo Lab UART Controller > > > + > > > +description: | > > > + UART IP used by Bouffalo Lab SoCs. Initial Linux support covers the > > > + BL808 controller with a 32-byte FIFO. The compatible follows Zephyr. > > > + > > > +maintainers: > > > + - Kwanghoon Son > > > + > > > +allOf: > > > + - $ref: serial.yaml# > > > + > > > +properties: > > > + compatible: > > > + const: bflb,uart > > > > This needs to be a device-specific compatible - please just use the > > binding already reviewed and agreed upon in Jisheng's 2023 series. Again. I'll base this on Jisheng's reviewed binding which is "bouffalolab,bl808-uart". > > > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + interrupts: > > > + maxItems: 1 > > > + > > > + clocks: > > > + items: > > > + - description: Baud rate generator clock > > > + > > > + clock-names: > > > + items: > > > + - const: baud > > > > Drop this clock name, with only one clock there's no more need for it > > than the interrupt-names or reg-names that you do not use either. I'll remove clock-names from the binding, driver will look up the single clock without a name. > > And additionally, I see no value in picking something to suit zephyr, > when zephyr uses things like "bflb,clock-controller" or "bflb,pwm-1" and > "bflb,pwm2" and so on. Make a clean break and do things correctly rather > than try (and fail) to be compatible with the zephyr dts. > I'll describe the hardware rather than compatiblity reusing the Zephyr name. > > > > > + > > > +required: > > > + - compatible > > > + - reg > > > + - interrupts > > > + - clocks > > > + - clock-names > > > + > > > +unevaluatedProperties: false > > > + > > > +examples: > > > + - | > > > + #include > > > + > > > + uart3: serial@30002000 { > > > + compatible = "bflb,uart"; > > > + reg = <0x30002000 0x1000>; > > > + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; > > > + clocks = <&uart_baud>; > > > + clock-names = "baud"; > > > + }; > > > +... > > > > > > -- > > > 2.47.3 > > > > >