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Sat, 07 Nov 2026 18:27:57 -0800 (PST) Received: from debian ([169.211.140.146]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1b3771ea85bsm2390172c88.18.2026.11.07.18.27.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Nov 2026 18:27:57 -0800 (PST) Date: Sat, 7 Nov 2026 21:27:32 -0500 From: Kwanghoon Son To: Conor Dooley Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Miguel Ojeda , Boqun Feng , Gary Guo , =?iso-8859-1?Q?Bj=F6rn?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Tamir Duberstein , Alexandre Courbot , Onur =?iso-8859-1?Q?=D6zkan?= , Thomas Gleixner , Radu Rendec , Paul Walmsley , Samuel Holland , Palmer Dabbelt , Daniel Lezcano , Anup Patel , Albert Ou , Alexandre Ghiti , Greg Kroah-Hartman , Jiri Slaby , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, Paul Walmsley , linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org Subject: Re: [PATCH RFC 12/12] MAINTAINERS: Add Bouffalo Lab BL808 support Message-ID: References: <20261029-rust-bl808-console-v1-0-b736ee920078@gmail.com> <20261029-rust-bl808-console-v1-12-b736ee920078@gmail.com> <20261029-spyglass-evasion-772697094cb9@spud> <20261029-amuser-savior-6a6ab062f471@spud> <20261030-slider-finished-360b10521e0b@spud> <20261102-throng-botanical-b244058ecc37@spud> <20261106-dislike-despise-91106ac848dd@spud> X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261106-dislike-despise-91106ac848dd@spud> On Fri, Nov 06, 2026 at 06:00:13PM +0000, Conor Dooley wrote: > > Cool. One thing that I noticed, and felt it was a bit odd actually is > that the uarts are fed directly from the crystal oscillator. Jisheng had > that in his original series though so I assume that's actually how the > hardware works? I carried over the direct crystal reference from Jisheng's series. But will change in v2. UART3's baud clock passes through a mux and divider. The current M1s firmware selects the 40 MHz crystal via MM_XCLK, while the APB register interface runs at 160 MHz. Following your feedback, the UART node in my v2 work now describes complete form of clock itself. two clock inputs: clocks = <&uart_apb>, <&uart_baud>; clock-names = "apb", "baud"; uart_apb: clock-uart-apb { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <160000000>; }; The fixed-clock providers currently reflect the firmware settings. I'll add proper clock-controller support before submitting the DTS. Best regards, kwang.