Re: [PATCH v2] serial-uartlite: Remove an un-necessary read of control register

[Michal Simek <michal.simek@xilinx.com>]

On 11/26/21 15:07, Maarten Brock wrote:
> + Michal
> 
> On 2021-11-24 13:37, Shubhrajyoti Datta wrote:
>>> -----Original Message-----
>>> From: Greg KH <gregkh@linuxfoundation.org>
>>> Sent: Wednesday, November 24, 2021 3:38 PM
>>> To: Shubhrajyoti Datta <shubhraj@xilinx.com>
>>> Cc: linux-serial@vger.kernel.org; jirislaby@kernel.org; jacmet@sunsite.dk; git
>>> <git@xilinx.com>
>>> Subject: Re: [PATCH v2] serial-uartlite: Remove an un-necessary read of control
>>> register
>>>
>>> On Tue, Nov 23, 2021 at 06:43:48PM +0530, Shubhrajyoti Datta wrote:
>>> > The control register is a writeonly register that's why reading it
>>> > doesn't make any sense.
>>> > The manual states "This is a write-only register. Issuing a read
>>> > request to the control register generates the read acknowledgment with zero
>>> data."
>>>
>>> Are you sure this is ok to remove?  Usually you have to do a read after a 
>>> write to
>>> ensure that the write succeeded.
>>>
>>> What ensures that the write succeeded now if you remove this read?
>>
>> I do not find the mention of a read requirement in the manual.
>> Also in the current code in ulite_console_write and in ulite_startup
>> we are writing without a read.
>>
>> Thanks and Regards,
>> Shubhrajyoti
> 
> I suggest to confer with Michal Simek. He introduced the read in 
> ulite_request_port()

 From my perspective that read is not needed and can be removed.

> in the past. The other one in ulite_shutdown() has been there since its 
> inception in
> 2006.

I confirm this. It was originally developed for PPC systems that's why not sure 
if there was any issue on PLB bus. But I expect Grant wanted to make sure that 
disabling port reached IP that's why he read it back that irq can be freed and 
clock disabled.
This is better to keep it there for sure.

Thanks,
Michal