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Wed, 30 Jun 2021 12:49:31 +0000 Received: from [10.26.49.10] (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 30 Jun 2021 12:49:28 +0000 Subject: Re: [PATCH] serial: tegra: Only print FIFO error message when an error occurs To: Thierry Reding CC: Greg Kroah-Hartman , Jiri Slaby , Laxman Dewangan , "Krishna Yarlagadda" , , , References: <20210630094601.136280-1-jonathanh@nvidia.com> From: Jon Hunter Message-ID: Date: Wed, 30 Jun 2021 13:49:26 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d219a22d-8a0a-4031-a99a-08d93bc58165 X-MS-TrafficTypeDiagnostic: MWHPR12MB1424: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jun 2021 12:49:31.4065 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d219a22d-8a0a-4031-a99a-08d93bc58165 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT042.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1424 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org On 30/06/2021 13:11, Thierry Reding wrote: > On Wed, Jun 30, 2021 at 10:46:01AM +0100, Jon Hunter wrote: >> The Tegra serial driver always prints an error message when enabling the >> FIFO for devices that have support for checking the FIFO enable status. >> Fix this by only display the error message, when an error occurs. >> >> Fixes: 222dcdff3405 ("serial: tegra: check for FIFO mode enabled status") >> Cc: >> Signed-off-by: Jon Hunter >> --- >> drivers/tty/serial/serial-tegra.c | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c >> index 222032792d6c..cd481f7ba8eb 100644 >> --- a/drivers/tty/serial/serial-tegra.c >> +++ b/drivers/tty/serial/serial-tegra.c >> @@ -1045,9 +1045,10 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup) >> >> if (tup->cdata->fifo_mode_enable_status) { >> ret = tegra_uart_wait_fifo_mode_enabled(tup); >> - dev_err(tup->uport.dev, "FIFO mode not enabled\n"); >> - if (ret < 0) >> + if (ret < 0) { >> + dev_err(tup->uport.dev, "FIFO mode not enabled\n"); > > The error message seems a bit confusing. I read this as meaning "FIFO > mode was expected to be enabled but wasn't" whereas this really seems to > mean that for some reason the FIFO enable timed out. > > In the former case it sounds like a some configuration mismatch, while > it's really something that went wrong during the process of enabling the > FIFO mode. > > So I wonder if this should perhaps be something like: > > dev_err(tup->uport.dev, "FIFO mode enable timed out\n"); > > or something along those lines. Yes good point. Maybe I should just ... dev_err(tup->uport.dev, "Failed to enable FIFO mode: %d\n", ret); Then if it is updated to ever return anything other that -ETIMEDOUT we are covered. I will send a V2. Jon -- nvpublic