[PATCH] [V3] uartlite: move from byte accesses to word accesses

[PATCH] [V3] uartlite: move from byte accesses to word accesses

[John Linn]

Byte accesses for I/O devices in Xilinx IP is going to be less
desired in the future such that the driver is being changed to
use 32 bit accesses.

This change facilitates using the uartlite IP over a PCIe bus
which only allows 32 bit accesses.

Signed-off-by: John Linn <john.linn@xilinx.com>

---

V2 - updated the commit message based on Peter's comments

V3 - removed u8 casting based on Peter's comments, cleaned up and
simplified the change by using raw I/O functions rather than
using in_be32 & out_be32 functions.
---
 drivers/serial/uartlite.c |   32 ++++++++++++++++----------------
 1 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
index ab2ab3c..bdf08c7 100644
--- a/drivers/serial/uartlite.c
+++ b/drivers/serial/uartlite.c
@@ -86,7 +86,7 @@ static int ulite_receive(struct uart_port *port, int stat)
 	/* stats */
 	if (stat & ULITE_STATUS_RXVALID) {
 		port->icount.rx++;
-		ch = readb(port->membase + ULITE_RX);
+		ch = __raw_readl(port->membase + ULITE_RX);
 
 		if (stat & ULITE_STATUS_PARITY)
 			port->icount.parity++;
@@ -131,7 +131,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
 		return 0;
 
 	if (port->x_char) {
-		writeb(port->x_char, port->membase + ULITE_TX);
+		__raw_writel(port->x_char, port->membase + ULITE_TX);
 		port->x_char = 0;
 		port->icount.tx++;
 		return 1;
@@ -140,7 +140,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
 	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 		return 0;
 
-	writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
+	__raw_writel(xmit->buf[xmit->tail], port->membase + ULITE_TX);
 	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 	port->icount.tx++;
 
@@ -157,7 +157,7 @@ static irqreturn_t ulite_isr(int irq, void *dev_id)
 	int busy, n = 0;
 
 	do {
-		int stat = readb(port->membase + ULITE_STATUS);
+		int stat = __raw_readl(port->membase + ULITE_STATUS);
 		busy  = ulite_receive(port, stat);
 		busy |= ulite_transmit(port, stat);
 		n++;
@@ -178,7 +178,7 @@ static unsigned int ulite_tx_empty(struct uart_port *port)
 	unsigned int ret;
 
 	spin_lock_irqsave(&port->lock, flags);
-	ret = readb(port->membase + ULITE_STATUS);
+	ret = __raw_readl(port->membase + ULITE_STATUS);
 	spin_unlock_irqrestore(&port->lock, flags);
 
 	return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
@@ -201,7 +201,7 @@ static void ulite_stop_tx(struct uart_port *port)
 
 static void ulite_start_tx(struct uart_port *port)
 {
-	ulite_transmit(port, readb(port->membase + ULITE_STATUS));
+	ulite_transmit(port, __raw_readl(port->membase + ULITE_STATUS));
 }
 
 static void ulite_stop_rx(struct uart_port *port)
@@ -230,17 +230,17 @@ static int ulite_startup(struct uart_port *port)
 	if (ret)
 		return ret;
 
-	writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
+	__raw_writel(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
 	       port->membase + ULITE_CONTROL);
-	writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
+	__raw_writel(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
 
 	return 0;
 }
 
 static void ulite_shutdown(struct uart_port *port)
 {
-	writeb(0, port->membase + ULITE_CONTROL);
-	readb(port->membase + ULITE_CONTROL); /* dummy */
+	__raw_writel(0, port->membase + ULITE_CONTROL);
+	__raw_readl(port->membase + ULITE_CONTROL); /* dummy */
 	free_irq(port->irq, port);
 }
 
@@ -352,7 +352,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
 
 	/* Spin waiting for TX fifo to have space available */
 	for (i = 0; i < 100000; i++) {
-		val = readb(port->membase + ULITE_STATUS);
+		val = __raw_readl(port->membase + ULITE_STATUS);
 		if ((val & ULITE_STATUS_TXFULL) == 0)
 			break;
 		cpu_relax();
@@ -362,7 +362,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
 static void ulite_console_putchar(struct uart_port *port, int ch)
 {
 	ulite_console_wait_tx(port);
-	writeb(ch, port->membase + ULITE_TX);
+	__raw_writel(ch, port->membase + ULITE_TX);
 }
 
 static void ulite_console_write(struct console *co, const char *s,
@@ -379,8 +379,8 @@ static void ulite_console_write(struct console *co, const char *s,
 		spin_lock_irqsave(&port->lock, flags);
 
 	/* save and disable interrupt */
-	ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
-	writeb(0, port->membase + ULITE_CONTROL);
+	ier = __raw_readl(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
+	__raw_writel(0, port->membase + ULITE_CONTROL);
 
 	uart_console_write(port, s, count, ulite_console_putchar);
 
@@ -388,7 +388,7 @@ static void ulite_console_write(struct console *co, const char *s,
 
 	/* restore interrupt state */
 	if (ier)
-		writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
+		__raw_writel(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
 
 	if (locked)
 		spin_unlock_irqrestore(&port->lock, flags);
@@ -601,7 +601,7 @@ ulite_of_probe(struct of_device *op, const struct of_device_id *match)
 
 	id = of_get_property(op->node, "port-number", NULL);
 
-	return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
+	return ulite_assign(&op->dev, id ? *id : -1, res.start, irq);
 }
 
 static int __devexit ulite_of_remove(struct of_device *op)
-- 
1.6.2.1



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Re: [PATCH] [V3] uartlite: move from byte accesses to word accesses

[Grant Likely]

On Wed, Mar 17, 2010 at 9:40 AM, John Linn <john.linn@xilinx.com> wrote:
> Byte accesses for I/O devices in Xilinx IP is going to be less
> desired in the future such that the driver is being changed to
> use 32 bit accesses.
>
> This change facilitates using the uartlite IP over a PCIe bus
> which only allows 32 bit accesses.
>
> Signed-off-by: John Linn <john.linn@xilinx.com>
>
> ---
>
> V2 - updated the commit message based on Peter's comments
>
> V3 - removed u8 casting based on Peter's comments, cleaned up and
> simplified the change by using raw I/O functions rather than
> using in_be32 & out_be32 functions.

The __raw_{read,write}l() functions aren't the best choice here.  User
ioread32be(), iowrite32be() instead if you want them to work
cross-architecture (see include/asm-generic/iomap.h).

g.

> ---
>  drivers/serial/uartlite.c |   32 ++++++++++++++++----------------
>  1 files changed, 16 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
> index ab2ab3c..bdf08c7 100644
> --- a/drivers/serial/uartlite.c
> +++ b/drivers/serial/uartlite.c
> @@ -86,7 +86,7 @@ static int ulite_receive(struct uart_port *port, int stat)
>        /* stats */
>        if (stat & ULITE_STATUS_RXVALID) {
>                port->icount.rx++;
> -               ch = readb(port->membase + ULITE_RX);
> +               ch = __raw_readl(port->membase + ULITE_RX);
>
>                if (stat & ULITE_STATUS_PARITY)
>                        port->icount.parity++;
> @@ -131,7 +131,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
>                return 0;
>
>        if (port->x_char) {
> -               writeb(port->x_char, port->membase + ULITE_TX);
> +               __raw_writel(port->x_char, port->membase + ULITE_TX);
>                port->x_char = 0;
>                port->icount.tx++;
>                return 1;
> @@ -140,7 +140,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
>        if (uart_circ_empty(xmit) || uart_tx_stopped(port))
>                return 0;
>
> -       writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
> +       __raw_writel(xmit->buf[xmit->tail], port->membase + ULITE_TX);
>        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
>        port->icount.tx++;
>
> @@ -157,7 +157,7 @@ static irqreturn_t ulite_isr(int irq, void *dev_id)
>        int busy, n = 0;
>
>        do {
> -               int stat = readb(port->membase + ULITE_STATUS);
> +               int stat = __raw_readl(port->membase + ULITE_STATUS);
>                busy  = ulite_receive(port, stat);
>                busy |= ulite_transmit(port, stat);
>                n++;
> @@ -178,7 +178,7 @@ static unsigned int ulite_tx_empty(struct uart_port *port)
>        unsigned int ret;
>
>        spin_lock_irqsave(&port->lock, flags);
> -       ret = readb(port->membase + ULITE_STATUS);
> +       ret = __raw_readl(port->membase + ULITE_STATUS);
>        spin_unlock_irqrestore(&port->lock, flags);
>
>        return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
> @@ -201,7 +201,7 @@ static void ulite_stop_tx(struct uart_port *port)
>
>  static void ulite_start_tx(struct uart_port *port)
>  {
> -       ulite_transmit(port, readb(port->membase + ULITE_STATUS));
> +       ulite_transmit(port, __raw_readl(port->membase + ULITE_STATUS));
>  }
>
>  static void ulite_stop_rx(struct uart_port *port)
> @@ -230,17 +230,17 @@ static int ulite_startup(struct uart_port *port)
>        if (ret)
>                return ret;
>
> -       writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
> +       __raw_writel(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
>               port->membase + ULITE_CONTROL);
> -       writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> +       __raw_writel(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
>
>        return 0;
>  }
>
>  static void ulite_shutdown(struct uart_port *port)
>  {
> -       writeb(0, port->membase + ULITE_CONTROL);
> -       readb(port->membase + ULITE_CONTROL); /* dummy */
> +       __raw_writel(0, port->membase + ULITE_CONTROL);
> +       __raw_readl(port->membase + ULITE_CONTROL); /* dummy */
>        free_irq(port->irq, port);
>  }
>
> @@ -352,7 +352,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
>
>        /* Spin waiting for TX fifo to have space available */
>        for (i = 0; i < 100000; i++) {
> -               val = readb(port->membase + ULITE_STATUS);
> +               val = __raw_readl(port->membase + ULITE_STATUS);
>                if ((val & ULITE_STATUS_TXFULL) == 0)
>                        break;
>                cpu_relax();
> @@ -362,7 +362,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
>  static void ulite_console_putchar(struct uart_port *port, int ch)
>  {
>        ulite_console_wait_tx(port);
> -       writeb(ch, port->membase + ULITE_TX);
> +       __raw_writel(ch, port->membase + ULITE_TX);
>  }
>
>  static void ulite_console_write(struct console *co, const char *s,
> @@ -379,8 +379,8 @@ static void ulite_console_write(struct console *co, const char *s,
>                spin_lock_irqsave(&port->lock, flags);
>
>        /* save and disable interrupt */
> -       ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
> -       writeb(0, port->membase + ULITE_CONTROL);
> +       ier = __raw_readl(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
> +       __raw_writel(0, port->membase + ULITE_CONTROL);
>
>        uart_console_write(port, s, count, ulite_console_putchar);
>
> @@ -388,7 +388,7 @@ static void ulite_console_write(struct console *co, const char *s,
>
>        /* restore interrupt state */
>        if (ier)
> -               writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> +               __raw_writel(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
>
>        if (locked)
>                spin_unlock_irqrestore(&port->lock, flags);
> @@ -601,7 +601,7 @@ ulite_of_probe(struct of_device *op, const struct of_device_id *match)
>
>        id = of_get_property(op->node, "port-number", NULL);
>
> -       return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
> +       return ulite_assign(&op->dev, id ? *id : -1, res.start, irq);
>  }
>
>  static int __devexit ulite_of_remove(struct of_device *op)
> --
> 1.6.2.1
>
>
>
> This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
>
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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RE: [PATCH] [V3] uartlite: move from byte accesses to word accesses

[John Linn]

> -----Original Message-----
> From: glikely@secretlab.ca [mailto:glikely@secretlab.ca] On Behalf Of Grant Likely
> Sent: Wednesday, March 17, 2010 10:21 AM
> To: John Linn
> Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk; michal.simek@petalogix.com;
> john.williams@petalogix.com
> Subject: Re: [PATCH] [V3] uartlite: move from byte accesses to word accesses
> 
> On Wed, Mar 17, 2010 at 9:40 AM, John Linn <john.linn@xilinx.com> wrote:
> > Byte accesses for I/O devices in Xilinx IP is going to be less
> > desired in the future such that the driver is being changed to
> > use 32 bit accesses.
> >
> > This change facilitates using the uartlite IP over a PCIe bus
> > which only allows 32 bit accesses.
> >
> > Signed-off-by: John Linn <john.linn@xilinx.com>
> >
> > ---
> >
> > V2 - updated the commit message based on Peter's comments
> >
> > V3 - removed u8 casting based on Peter's comments, cleaned up and
> > simplified the change by using raw I/O functions rather than
> > using in_be32 & out_be32 functions.
> 
> The __raw_{read,write}l() functions aren't the best choice here.  User
> ioread32be(), iowrite32be() instead if you want them to work
> cross-architecture (see include/asm-generic/iomap.h).

Maybe the ioread functions will work better than the in/out_be32 as they 
were not working like I wanted. 

I'm still trying to get my head wrapped around the right I/O functions to use since there are so many options.

I'll look at your suggestions.

Thanks,
John

> 
> g.
> 
> > ---
> >  drivers/serial/uartlite.c |   32 ++++++++++++++++----------------
> >  1 files changed, 16 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
> > index ab2ab3c..bdf08c7 100644
> > --- a/drivers/serial/uartlite.c
> > +++ b/drivers/serial/uartlite.c
> > @@ -86,7 +86,7 @@ static int ulite_receive(struct uart_port *port, int stat)
> >        /* stats */
> >        if (stat & ULITE_STATUS_RXVALID) {
> >                port->icount.rx++;
> > -               ch = readb(port->membase + ULITE_RX);
> > +               ch = __raw_readl(port->membase + ULITE_RX);
> >
> >                if (stat & ULITE_STATUS_PARITY)
> >                        port->icount.parity++;
> > @@ -131,7 +131,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
> >                return 0;
> >
> >        if (port->x_char) {
> > -               writeb(port->x_char, port->membase + ULITE_TX);
> > +               __raw_writel(port->x_char, port->membase + ULITE_TX);
> >                port->x_char = 0;
> >                port->icount.tx++;
> >                return 1;
> > @@ -140,7 +140,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
> >        if (uart_circ_empty(xmit) || uart_tx_stopped(port))
> >                return 0;
> >
> > -       writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
> > +       __raw_writel(xmit->buf[xmit->tail], port->membase + ULITE_TX);
> >        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
> >        port->icount.tx++;
> >
> > @@ -157,7 +157,7 @@ static irqreturn_t ulite_isr(int irq, void *dev_id)
> >        int busy, n = 0;
> >
> >        do {
> > -               int stat = readb(port->membase + ULITE_STATUS);
> > +               int stat = __raw_readl(port->membase + ULITE_STATUS);
> >                busy  = ulite_receive(port, stat);
> >                busy |= ulite_transmit(port, stat);
> >                n++;
> > @@ -178,7 +178,7 @@ static unsigned int ulite_tx_empty(struct uart_port *port)
> >        unsigned int ret;
> >
> >        spin_lock_irqsave(&port->lock, flags);
> > -       ret = readb(port->membase + ULITE_STATUS);
> > +       ret = __raw_readl(port->membase + ULITE_STATUS);
> >        spin_unlock_irqrestore(&port->lock, flags);
> >
> >        return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
> > @@ -201,7 +201,7 @@ static void ulite_stop_tx(struct uart_port *port)
> >
> >  static void ulite_start_tx(struct uart_port *port)
> >  {
> > -       ulite_transmit(port, readb(port->membase + ULITE_STATUS));
> > +       ulite_transmit(port, __raw_readl(port->membase + ULITE_STATUS));
> >  }
> >
> >  static void ulite_stop_rx(struct uart_port *port)
> > @@ -230,17 +230,17 @@ static int ulite_startup(struct uart_port *port)
> >        if (ret)
> >                return ret;
> >
> > -       writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
> > +       __raw_writel(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
> >               port->membase + ULITE_CONTROL);
> > -       writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> > +       __raw_writel(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> >
> >        return 0;
> >  }
> >
> >  static void ulite_shutdown(struct uart_port *port)
> >  {
> > -       writeb(0, port->membase + ULITE_CONTROL);
> > -       readb(port->membase + ULITE_CONTROL); /* dummy */
> > +       __raw_writel(0, port->membase + ULITE_CONTROL);
> > +       __raw_readl(port->membase + ULITE_CONTROL); /* dummy */
> >        free_irq(port->irq, port);
> >  }
> >
> > @@ -352,7 +352,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
> >
> >        /* Spin waiting for TX fifo to have space available */
> >        for (i = 0; i < 100000; i++) {
> > -               val = readb(port->membase + ULITE_STATUS);
> > +               val = __raw_readl(port->membase + ULITE_STATUS);
> >                if ((val & ULITE_STATUS_TXFULL) == 0)
> >                        break;
> >                cpu_relax();
> > @@ -362,7 +362,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
> >  static void ulite_console_putchar(struct uart_port *port, int ch)
> >  {
> >        ulite_console_wait_tx(port);
> > -       writeb(ch, port->membase + ULITE_TX);
> > +       __raw_writel(ch, port->membase + ULITE_TX);
> >  }
> >
> >  static void ulite_console_write(struct console *co, const char *s,
> > @@ -379,8 +379,8 @@ static void ulite_console_write(struct console *co, const char *s,
> >                spin_lock_irqsave(&port->lock, flags);
> >
> >        /* save and disable interrupt */
> > -       ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
> > -       writeb(0, port->membase + ULITE_CONTROL);
> > +       ier = __raw_readl(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
> > +       __raw_writel(0, port->membase + ULITE_CONTROL);
> >
> >        uart_console_write(port, s, count, ulite_console_putchar);
> >
> > @@ -388,7 +388,7 @@ static void ulite_console_write(struct console *co, const char *s,
> >
> >        /* restore interrupt state */
> >        if (ier)
> > -               writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> > +               __raw_writel(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> >
> >        if (locked)
> >                spin_unlock_irqrestore(&port->lock, flags);
> > @@ -601,7 +601,7 @@ ulite_of_probe(struct of_device *op, const struct of_device_id *match)
> >
> >        id = of_get_property(op->node, "port-number", NULL);
> >
> > -       return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
> > +       return ulite_assign(&op->dev, id ? *id : -1, res.start, irq);
> >  }
> >
> >  static int __devexit ulite_of_remove(struct of_device *op)
> > --
> > 1.6.2.1
> >
> >
> >
> > This email and any attachments are intended for the sole use of the named recipient(s) and
> contain(s) confidential information that may be proprietary, privileged or copyrighted under
> applicable law. If you are not the intended recipient, do not read, copy, or forward this email
> message or any attachments. Delete this email message and any attachments immediately.
> >
> >
> >
> 
> 
> 
> --
> Grant Likely, B.Sc., P.Eng.
> Secret Lab Technologies Ltd.


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RE: [PATCH] [V3] uartlite: move from byte accesses to word accesses

[John Linn]

> -----Original Message-----
> From: John Linn
> Sent: Wednesday, March 17, 2010 10:27 AM
> To: 'Grant Likely'
> Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk; michal.simek@petalogix.com;
> john.williams@petalogix.com
> Subject: RE: [PATCH] [V3] uartlite: move from byte accesses to word accesses
> 
> > -----Original Message-----
> > From: glikely@secretlab.ca [mailto:glikely@secretlab.ca] On Behalf Of Grant Likely
> > Sent: Wednesday, March 17, 2010 10:21 AM
> > To: John Linn
> > Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk; michal.simek@petalogix.com;
> > john.williams@petalogix.com
> > Subject: Re: [PATCH] [V3] uartlite: move from byte accesses to word accesses
> >
> > On Wed, Mar 17, 2010 at 9:40 AM, John Linn <john.linn@xilinx.com> wrote:
> > > Byte accesses for I/O devices in Xilinx IP is going to be less
> > > desired in the future such that the driver is being changed to
> > > use 32 bit accesses.
> > >
> > > This change facilitates using the uartlite IP over a PCIe bus
> > > which only allows 32 bit accesses.
> > >
> > > Signed-off-by: John Linn <john.linn@xilinx.com>
> > >
> > > ---
> > >
> > > V2 - updated the commit message based on Peter's comments
> > >
> > > V3 - removed u8 casting based on Peter's comments, cleaned up and
> > > simplified the change by using raw I/O functions rather than
> > > using in_be32 & out_be32 functions.
> >
> > The __raw_{read,write}l() functions aren't the best choice here.  User
> > ioread32be(), iowrite32be() instead if you want them to work
> > cross-architecture (see include/asm-generic/iomap.h).
> 
> Maybe the ioread functions will work better than the in/out_be32 as they
> were not working like I wanted.
> 
> I'm still trying to get my head wrapped around the right I/O functions to use since there are so many
> options.
> 
> I'll look at your suggestions.

That works ok on Powerpc, but not microblaze yet as there are still patches in the process of going into the kernel for that.

Do we need to wait til those patches are in?

Thanks,
John
> 
> Thanks,
> John
> 
> >
> > g.
> >
> > > ---
> > >  drivers/serial/uartlite.c |   32 ++++++++++++++++----------------
> > >  1 files changed, 16 insertions(+), 16 deletions(-)
> > >
> > > diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
> > > index ab2ab3c..bdf08c7 100644
> > > --- a/drivers/serial/uartlite.c
> > > +++ b/drivers/serial/uartlite.c
> > > @@ -86,7 +86,7 @@ static int ulite_receive(struct uart_port *port, int stat)
> > >        /* stats */
> > >        if (stat & ULITE_STATUS_RXVALID) {
> > >                port->icount.rx++;
> > > -               ch = readb(port->membase + ULITE_RX);
> > > +               ch = __raw_readl(port->membase + ULITE_RX);
> > >
> > >                if (stat & ULITE_STATUS_PARITY)
> > >                        port->icount.parity++;
> > > @@ -131,7 +131,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
> > >                return 0;
> > >
> > >        if (port->x_char) {
> > > -               writeb(port->x_char, port->membase + ULITE_TX);
> > > +               __raw_writel(port->x_char, port->membase + ULITE_TX);
> > >                port->x_char = 0;
> > >                port->icount.tx++;
> > >                return 1;
> > > @@ -140,7 +140,7 @@ static int ulite_transmit(struct uart_port *port, int stat)
> > >        if (uart_circ_empty(xmit) || uart_tx_stopped(port))
> > >                return 0;
> > >
> > > -       writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
> > > +       __raw_writel(xmit->buf[xmit->tail], port->membase + ULITE_TX);
> > >        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
> > >        port->icount.tx++;
> > >
> > > @@ -157,7 +157,7 @@ static irqreturn_t ulite_isr(int irq, void *dev_id)
> > >        int busy, n = 0;
> > >
> > >        do {
> > > -               int stat = readb(port->membase + ULITE_STATUS);
> > > +               int stat = __raw_readl(port->membase + ULITE_STATUS);
> > >                busy  = ulite_receive(port, stat);
> > >                busy |= ulite_transmit(port, stat);
> > >                n++;
> > > @@ -178,7 +178,7 @@ static unsigned int ulite_tx_empty(struct uart_port *port)
> > >        unsigned int ret;
> > >
> > >        spin_lock_irqsave(&port->lock, flags);
> > > -       ret = readb(port->membase + ULITE_STATUS);
> > > +       ret = __raw_readl(port->membase + ULITE_STATUS);
> > >        spin_unlock_irqrestore(&port->lock, flags);
> > >
> > >        return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
> > > @@ -201,7 +201,7 @@ static void ulite_stop_tx(struct uart_port *port)
> > >
> > >  static void ulite_start_tx(struct uart_port *port)
> > >  {
> > > -       ulite_transmit(port, readb(port->membase + ULITE_STATUS));
> > > +       ulite_transmit(port, __raw_readl(port->membase + ULITE_STATUS));
> > >  }
> > >
> > >  static void ulite_stop_rx(struct uart_port *port)
> > > @@ -230,17 +230,17 @@ static int ulite_startup(struct uart_port *port)
> > >        if (ret)
> > >                return ret;
> > >
> > > -       writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
> > > +       __raw_writel(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
> > >               port->membase + ULITE_CONTROL);
> > > -       writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> > > +       __raw_writel(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> > >
> > >        return 0;
> > >  }
> > >
> > >  static void ulite_shutdown(struct uart_port *port)
> > >  {
> > > -       writeb(0, port->membase + ULITE_CONTROL);
> > > -       readb(port->membase + ULITE_CONTROL); /* dummy */
> > > +       __raw_writel(0, port->membase + ULITE_CONTROL);
> > > +       __raw_readl(port->membase + ULITE_CONTROL); /* dummy */
> > >        free_irq(port->irq, port);
> > >  }
> > >
> > > @@ -352,7 +352,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
> > >
> > >        /* Spin waiting for TX fifo to have space available */
> > >        for (i = 0; i < 100000; i++) {
> > > -               val = readb(port->membase + ULITE_STATUS);
> > > +               val = __raw_readl(port->membase + ULITE_STATUS);
> > >                if ((val & ULITE_STATUS_TXFULL) == 0)
> > >                        break;
> > >                cpu_relax();
> > > @@ -362,7 +362,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
> > >  static void ulite_console_putchar(struct uart_port *port, int ch)
> > >  {
> > >        ulite_console_wait_tx(port);
> > > -       writeb(ch, port->membase + ULITE_TX);
> > > +       __raw_writel(ch, port->membase + ULITE_TX);
> > >  }
> > >
> > >  static void ulite_console_write(struct console *co, const char *s,
> > > @@ -379,8 +379,8 @@ static void ulite_console_write(struct console *co, const char *s,
> > >                spin_lock_irqsave(&port->lock, flags);
> > >
> > >        /* save and disable interrupt */
> > > -       ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
> > > -       writeb(0, port->membase + ULITE_CONTROL);
> > > +       ier = __raw_readl(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
> > > +       __raw_writel(0, port->membase + ULITE_CONTROL);
> > >
> > >        uart_console_write(port, s, count, ulite_console_putchar);
> > >
> > > @@ -388,7 +388,7 @@ static void ulite_console_write(struct console *co, const char *s,
> > >
> > >        /* restore interrupt state */
> > >        if (ier)
> > > -               writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> > > +               __raw_writel(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
> > >
> > >        if (locked)
> > >                spin_unlock_irqrestore(&port->lock, flags);
> > > @@ -601,7 +601,7 @@ ulite_of_probe(struct of_device *op, const struct of_device_id *match)
> > >
> > >        id = of_get_property(op->node, "port-number", NULL);
> > >
> > > -       return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
> > > +       return ulite_assign(&op->dev, id ? *id : -1, res.start, irq);
> > >  }
> > >
> > >  static int __devexit ulite_of_remove(struct of_device *op)
> > > --
> > > 1.6.2.1
> > >
> > >
> > >
> > > This email and any attachments are intended for the sole use of the named recipient(s) and
> > contain(s) confidential information that may be proprietary, privileged or copyrighted under
> > applicable law. If you are not the intended recipient, do not read, copy, or forward this email
> > message or any attachments. Delete this email message and any attachments immediately.
> > >
> > >
> > >
> >
> >
> >
> > --
> > Grant Likely, B.Sc., P.Eng.
> > Secret Lab Technologies Ltd.


This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.


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Re: [PATCH] [V3] uartlite: move from byte accesses to word accesses

[Grant Likely]

On Wed, Mar 17, 2010 at 12:04 PM, John Linn <John.Linn@xilinx.com> wrote:
>
>
>> -----Original Message-----
>> From: John Linn
>> Sent: Wednesday, March 17, 2010 10:27 AM
>> To: 'Grant Likely'
>> Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk; michal.simek@petalogix.com;
>> john.williams@petalogix.com
>> Subject: RE: [PATCH] [V3] uartlite: move from byte accesses to word accesses
>>
>> > -----Original Message-----
>> > From: glikely@secretlab.ca [mailto:glikely@secretlab.ca] On Behalf Of Grant Likely
>> > Sent: Wednesday, March 17, 2010 10:21 AM
>> > To: John Linn
>> > Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk; michal.simek@petalogix.com;
>> > john.williams@petalogix.com
>> > Subject: Re: [PATCH] [V3] uartlite: move from byte accesses to word accesses
>> >
>> > On Wed, Mar 17, 2010 at 9:40 AM, John Linn <john.linn@xilinx.com> wrote:
>> > > Byte accesses for I/O devices in Xilinx IP is going to be less
>> > > desired in the future such that the driver is being changed to
>> > > use 32 bit accesses.
>> > >
>> > > This change facilitates using the uartlite IP over a PCIe bus
>> > > which only allows 32 bit accesses.
>> > >
>> > > Signed-off-by: John Linn <john.linn@xilinx.com>
>> > >
>> > > ---
>> > >
>> > > V2 - updated the commit message based on Peter's comments
>> > >
>> > > V3 - removed u8 casting based on Peter's comments, cleaned up and
>> > > simplified the change by using raw I/O functions rather than
>> > > using in_be32 & out_be32 functions.
>> >
>> > The __raw_{read,write}l() functions aren't the best choice here.  User
>> > ioread32be(), iowrite32be() instead if you want them to work
>> > cross-architecture (see include/asm-generic/iomap.h).
>>
>> Maybe the ioread functions will work better than the in/out_be32 as they
>> were not working like I wanted.
>>
>> I'm still trying to get my head wrapped around the right I/O functions to use since there are so many
>> options.
>>
>> I'll look at your suggestions.
>
> That works ok on Powerpc, but not microblaze yet as there are still patches in the process of going into the kernel for that.
>
> Do we need to wait til those patches are in?

I'd make it broken in Kconfig on microblaze until those patches get
merged.  To the best of my knowledge, the ioread/write routines are
the best functions to use for cross-architecture MMIO code.

g.
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Re: [PATCH] [V3] uartlite: move from byte accesses to word accesses

[John Williams]

Sorry, resending after disabling HTML mode in gmail:

On Thu, Mar 18, 2010 at 7:26 AM, Grant Likely <grant.likely@secretlab.ca> wrote:
>
> On Wed, Mar 17, 2010 at 12:04 PM, John Linn <John.Linn@xilinx.com> wrote:
> >
> >
> >> -----Original Message-----
> >> From: John Linn
> >> Sent: Wednesday, March 17, 2010 10:27 AM
> >> To: 'Grant Likely'
> >> Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk; michal.simek@petalogix.com;
> >> john.williams@petalogix.com
> >> Subject: RE: [PATCH] [V3] uartlite: move from byte accesses to word accesses
> >>
> >> > -----Original Message-----
> >> > From: glikely@secretlab.ca [mailto:glikely@secretlab.ca] On Behalf Of Grant Likely
> >> > Sent: Wednesday, March 17, 2010 10:21 AM
> >> > To: John Linn
> >> > Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk; michal.simek@petalogix.com;
> >> > john.williams@petalogix.com
> >> > Subject: Re: [PATCH] [V3] uartlite: move from byte accesses to word accesses
> >> >
> >> > On Wed, Mar 17, 2010 at 9:40 AM, John Linn <john.linn@xilinx.com> wrote:
> >> > > Byte accesses for I/O devices in Xilinx IP is going to be less
> >> > > desired in the future such that the driver is being changed to
> >> > > use 32 bit accesses.
> >> > >
> >> > > This change facilitates using the uartlite IP over a PCIe bus
> >> > > which only allows 32 bit accesses.
> >> > >
> >> > > Signed-off-by: John Linn <john.linn@xilinx.com>
> >> > >
> >> > > ---
> >> > >
> >> > > V2 - updated the commit message based on Peter's comments
> >> > >
> >> > > V3 - removed u8 casting based on Peter's comments, cleaned up and
> >> > > simplified the change by using raw I/O functions rather than
> >> > > using in_be32 & out_be32 functions.
> >> >
> >> > The __raw_{read,write}l() functions aren't the best choice here.  User
> >> > ioread32be(), iowrite32be() instead if you want them to work
> >> > cross-architecture (see include/asm-generic/iomap.h).
> >>
> >> Maybe the ioread functions will work better than the in/out_be32 as they
> >> were not working like I wanted.
> >>
> >> I'm still trying to get my head wrapped around the right I/O functions to use since there are so many
> >> options.
> >>
> >> I'll look at your suggestions.
> >
> > That works ok on Powerpc, but not microblaze yet as there are still patches in the process of going into the kernel for that.
> >
> > Do we need to wait til those patches are in?
>
> I'd make it broken in Kconfig on microblaze until those patches get
> merged.  To the best of my knowledge, the ioread/write routines are
> the best functions to use for cross-architecture MMIO code.

The MMIO patchset for MicroBlaze is in linux-next and Michal sent an
-rc2 pull request to Linus on 11th March.

Maybe I misunderstood Grant's meaning, but I think this uartlite
ioread/iowrite change must be conditional on the MicroBlaze MMIO
patchset being merged.  uartlite is a core driver for MicroBlaze and
it's not OK to break it just for an MMIO purity tweak!

Hopefully Linus will pull Michal's changes soon and this wil just
resolve itself.

John
--
John Williams
PetaLogix - Linux Solutions for a Reconfigurable World
w: www.petalogix.com  p: +61-7-30090663  f: +61-7-30090663
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Re: [PATCH] [V3] uartlite: move from byte accesses to word accesses

[Grant Likely]

On Wed, Mar 17, 2010 at 5:31 PM, John Williams
<john.williams@petalogix.com> wrote:
>
>
> On Thu, Mar 18, 2010 at 7:26 AM, Grant Likely <grant.likely@secretlab.ca>
> wrote:
>>
>> On Wed, Mar 17, 2010 at 12:04 PM, John Linn <John.Linn@xilinx.com> wrote:
>> >
>> >
>> >> -----Original Message-----
>> >> From: John Linn
>> >> Sent: Wednesday, March 17, 2010 10:27 AM
>> >> To: 'Grant Likely'
>> >> Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk;
>> >> michal.simek@petalogix.com;
>> >> john.williams@petalogix.com
>> >> Subject: RE: [PATCH] [V3] uartlite: move from byte accesses to word
>> >> accesses
>> >>
>> >> > -----Original Message-----
>> >> > From: glikely@secretlab.ca [mailto:glikely@secretlab.ca] On Behalf Of
>> >> > Grant Likely
>> >> > Sent: Wednesday, March 17, 2010 10:21 AM
>> >> > To: John Linn
>> >> > Cc: linux-serial@vger.kernel.org; jacmet@sunsite.dk;
>> >> > michal.simek@petalogix.com;
>> >> > john.williams@petalogix.com
>> >> > Subject: Re: [PATCH] [V3] uartlite: move from byte accesses to word
>> >> > accesses
>> >> >
>> >> > On Wed, Mar 17, 2010 at 9:40 AM, John Linn <john.linn@xilinx.com>
>> >> > wrote:
>> >> > > Byte accesses for I/O devices in Xilinx IP is going to be less
>> >> > > desired in the future such that the driver is being changed to
>> >> > > use 32 bit accesses.
>> >> > >
>> >> > > This change facilitates using the uartlite IP over a PCIe bus
>> >> > > which only allows 32 bit accesses.
>> >> > >
>> >> > > Signed-off-by: John Linn <john.linn@xilinx.com>
>> >> > >
>> >> > > ---
>> >> > >
>> >> > > V2 - updated the commit message based on Peter's comments
>> >> > >
>> >> > > V3 - removed u8 casting based on Peter's comments, cleaned up and
>> >> > > simplified the change by using raw I/O functions rather than
>> >> > > using in_be32 & out_be32 functions.
>> >> >
>> >> > The __raw_{read,write}l() functions aren't the best choice here.
>> >> >  User
>> >> > ioread32be(), iowrite32be() instead if you want them to work
>> >> > cross-architecture (see include/asm-generic/iomap.h).
>> >>
>> >> Maybe the ioread functions will work better than the in/out_be32 as
>> >> they
>> >> were not working like I wanted.
>> >>
>> >> I'm still trying to get my head wrapped around the right I/O functions
>> >> to use since there are so many
>> >> options.
>> >>
>> >> I'll look at your suggestions.
>> >
>> > That works ok on Powerpc, but not microblaze yet as there are still
>> > patches in the process of going into the kernel for that.
>> >
>> > Do we need to wait til those patches are in?
>>
>> I'd make it broken in Kconfig on microblaze until those patches get
>> merged.  To the best of my knowledge, the ioread/write routines are
>> the best functions to use for cross-architecture MMIO code.
>
> The MMIO patchset for MicroBlaze is in linux-next and Michal sent an -rc2
> pull request to Linus on 11th March.
>
> Maybe I misunderstood Grant's meaning, but I think this uartlite
> ioread/iowrite change must be conditional on the MicroBlaze MMIO patchset
> being merged.  uartlite is a core driver for MicroBlaze and it's not OK to
> break it just for an MMIO purity tweak!

Of course you're right.  I was getting confused with the ll_temac
driver change.  Sorry.

> Hopefully Linus will pull Michal's changes soon and this wil just resolve
> itself.

Yeah, just wait for Michal's pull req to get processed before
respinning the patch.

g.
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