* Re: [PATCH] pch_uart: Add Kontron COMe-mTT10 uart clock quirk
From: Darren Hart @ 2012-03-22 21:49 UTC (permalink / raw)
To: Michael Brunner
Cc: Linux Kernel Mailing List, Greg Kroah-Hartman, Alan Cox,
linux-serial
In-Reply-To: <20120322223112.291e0c59@mail.gmx.de>
On 03/22/2012 02:31 PM, Michael Brunner wrote:
>> These boards should already be supported by the following BIOS check.
>> As the DMI_BOARD_NAME was changing, it was Kontron's recommendation
>> to use the FRI2 prefix in the DMI_BIOS_VERSION.
>>
>>
>>> cmp = dmi_get_system_info(DMI_BIOS_VERSION);
>>> if (cmp && strnstr(cmp, "FRI2", 4))
>>
>> Is this not working for you? If not, what is the DMI_BIOS_VERSION
>> reported by your board?
>>
>> And for clarification, we are talking about this right:
>> http://us.kontron.com/products/systems+and+platforms/m2m/m2m+smart+services+developer+kit.html
>
> My changes refer to the embedded module with the project code NTC1:
> <http://us.kontron.com/products/computeronmodules/com+express/com+express+mini/comemtt10.html>
>
> So unfortunately the FRI2 checks won't work for this.
>
> Michael
OK, my board has DMI_BOARD_NAME as:
"nETXe-TT 1.0GHz E2 KDMS-FRI" but will also undergo a rename in the near
future. I'm concerned about colliding as I believe this kit may use the
same board you are working with. This COM Express module will be renamed
"COMe-mTT10" which will match your strstr compare.
So what does your DMI_BIOS_VERSION report?
I didn't like basing this on BIOS_VERSION, but I did so at Kontron's
preference. Now we're seeing the fallout (sooner than I expected).
So the question is, do we treat these as separate devices (the board and
the development kit which I believe includes your board) or do we lump
them together.
Since it is the firmware that ultimately decides what the initial
UARTCLK is, we can't base this on the hardware alone. The hardware in
fact should be default if a firmware match isn't found first. So, my
preference would be that you move your new comparison AFTER the FRI2
DMI_BIOS_VERSION comparison. This ensures the FRI2 doesn't match your
new comparison which might get a different UARTCLK in the future for
whatever reason.
Thanks,
--
Darren Hart
Intel Open Source Technology Center
Yocto Project - Linux Kernel
^ permalink raw reply
* Re: [PATCH] pch_uart: Add Kontron COMe-mTT10 uart clock quirk
From: Michael Brunner @ 2012-03-22 23:34 UTC (permalink / raw)
To: Darren Hart
Cc: Linux Kernel Mailing List, Greg Kroah-Hartman, Alan Cox,
linux-serial
In-Reply-To: <4F6B9E7B.9090005@linux.intel.com>
> OK, my board has DMI_BOARD_NAME as:
>
> "nETXe-TT 1.0GHz E2 KDMS-FRI" but will also undergo a rename in the
> near future. I'm concerned about colliding as I believe this kit may
> use the same board you are working with. This COM Express module will
> be renamed "COMe-mTT10" which will match your strstr compare.
You are right, the development kit uses a customized version of the
COMe-mTT10.
> So what does your DMI_BIOS_VERSION report?
The BIOS for the stock COMe-mTT10 is prefixed with NTC1.
> I didn't like basing this on BIOS_VERSION, but I did so at Kontron's
> preference. Now we're seeing the fallout (sooner than I expected).
Basically this is not a wrong decision, as the FRI2 project code is
unique for the firmware used on the development kit.
> So the question is, do we treat these as separate devices (the board
> and the development kit which I believe includes your board) or do we
> lump them together.
To be safe we should treat them as separate devices and make sure we
are able to differentiate between them.
> Since it is the firmware that ultimately decides what the initial
> UARTCLK is, we can't base this on the hardware alone. The hardware in
> fact should be default if a firmware match isn't found first. So, my
> preference would be that you move your new comparison AFTER the FRI2
> DMI_BIOS_VERSION comparison. This ensures the FRI2 doesn't match your
> new comparison which might get a different UARTCLK in the future for
> whatever reason.
I understand your concerns and agree with you that in this case the BIOS
version should be checked before the board name, same goes for the
product name. So I will prepare a new patch that puts my BOARD_NAME
comparison to the end.
Michael
^ permalink raw reply
* Re: [PATCH 0/3] OMAP2+: UART: Enable tx wakeup + remove cpu checks
From: Paul Walmsley @ 2012-03-22 23:40 UTC (permalink / raw)
To: Raja, Govindraj
Cc: Kevin Hilman, linux-omap, linux-serial, linux-arm-kernel,
Felipe Balbi
In-Reply-To: <CAMrsUdLtC0iVk2qDDDXj2tteAzP5UQJXNvsCoJLEC9Yty2QjvQ@mail.gmail.com>
Hi
On Thu, 22 Mar 2012, Raja, Govindraj wrote:
> Sorry I for got to add that, here are details on what was tested.
>
> 1.) OMAP2430 SDP : Boot tested with uart1 as console.
>
> 2.) OMAP3430 SDP: Boot test, suspend/resume tests, retention off mode
> (checking retention and off mode count
> in cpu idle cases)
>
> 3.) OMAP3630 - Beagle XM: Boot test, suspend/resume tests, retention off mode
> (checking retention and
> off mode count in cpu idle cases)
>
> 4.) OMAP4430 - PANDA: Boot test, suspend/resume tests
>
> 5.) OMAP4460 - PANDA: Boot test.
What kernel .config was used for these tests?
- Paul
^ permalink raw reply
* Re: [PATCH] serial: PL011: move interrupt clearing
From: viresh kumar @ 2012-03-23 3:39 UTC (permalink / raw)
To: Linus Walleij
Cc: linux-serial, Greg Kroah-Hartman, Russell King, Jong-Sung Kim,
stable, Chanho Min, linux-arm-kernel, Shreshtha Kumar Sahu,
spear-devel
In-Reply-To: <CACRpkdate+sQJvS8H7qNXiwe6c+F58g=OF0Qg=TxxnTwPXBrYQ@mail.gmail.com>
On Thu, Mar 22, 2012 at 1:30 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Thu, Mar 22, 2012 at 2:04 AM, viresh kumar <viresh.linux@gmail.com> wrote:
>> You missed me in CC??
>
> I put you in Reported-by, then used --cc at the prompt because git send-email
> still does not realize it must put Reported-by: tags on the CC list.
That's strange. When i check my mail on @st.com id, i see myself in cc
list, but on
gmail i see following cc list in your first mail.
linux-serial@vger.kernel.org, Greg Kroah-Hartman
<gregkh@linuxfoundation.org>, Russell King <linux@arm.linux.org.uk>,
Jong-Sung Kim <neidhard.kim@lge.com>, stable <stable@vger.kernel.org>,
Chanho Min <chanho0207@gmail.com>,
linux-arm-kernel@lists.infradead.org, Shreshtha Kumar Sahu
<shreshthakumar.sahu@stericsson.com>
Why don't i see myself in cc here?
I have seen similar issues earlier too, with our ST internal and
Mainline mailing lists.
Any ideas?
--
viresh
^ permalink raw reply
* Re: [PATCH 0/3] OMAP2+: UART: Enable tx wakeup + remove cpu checks
From: Raja, Govindraj @ 2012-03-23 7:47 UTC (permalink / raw)
To: Paul Walmsley
Cc: Kevin Hilman, linux-omap, linux-serial, linux-arm-kernel,
Felipe Balbi
In-Reply-To: <alpine.DEB.2.00.1203221740140.24425@utopia.booyaka.com>
Hi Paul,
On Fri, Mar 23, 2012 at 5:10 AM, Paul Walmsley <paul@pwsan.com> wrote:
> Hi
>
> On Thu, 22 Mar 2012, Raja, Govindraj wrote:
>
>> Sorry I for got to add that, here are details on what was tested.
>>
>> 1.) OMAP2430 SDP : Boot tested with uart1 as console.
>>
>> 2.) OMAP3430 SDP: Boot test, suspend/resume tests, retention off mode
>> (checking retention and off mode count
>> in cpu idle cases)
>>
>> 3.) OMAP3630 - Beagle XM: Boot test, suspend/resume tests, retention off mode
>> (checking retention and
>> off mode count in cpu idle cases)
>>
>> 4.) OMAP4430 - PANDA: Boot test, suspend/resume tests
>>
>> 5.) OMAP4460 - PANDA: Boot test.
>
> What kernel .config was used for these tests?
omap2plus_defconfig was used.
the same kernel image was tested with all these boards.
(kernel image was built along with initramfs support
using minimal busybox filesystem)
--
Thanks,
Govindraj.R
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH] serial: PL011: move interrupt clearing
From: Linus Walleij @ 2012-03-23 8:17 UTC (permalink / raw)
To: viresh kumar
Cc: linux-serial, Greg Kroah-Hartman, Russell King, Jong-Sung Kim,
stable, Chanho Min, linux-arm-kernel, Shreshtha Kumar Sahu,
spear-devel
In-Reply-To: <CAOh2x=kqTZxzyEMEF0bYFQ0a0zMEQNZWrzw48e1WFiMxYpRSeg@mail.gmail.com>
On Fri, Mar 23, 2012 at 4:39 AM, viresh kumar <viresh.linux@gmail.com> wrote:
> That's strange. When i check my mail on @st.com id, i see myself in cc
> list, but on
> gmail i see following cc list in your first mail.
(...)
>
> Why don't i see myself in cc here?
No clue :-(
On *my* gmail it looks like this:
Cc: linux-arm-kernel@lists.infradead.org,
Chanho Min <chanho0207@gmail.com>,
Jong-Sung Kim <neidhard.kim@lge.com>,
Viresh Kumar <viresh.kumar@st.com>,
Linus Walleij <linus.walleij@linaro.org>,
Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>,
Russell King <linux@arm.linux.org.uk>,
stable <stable@vger.kernel.org>
Trust no gmail...
Linus Walleij
^ permalink raw reply
* [PATCHv2] pch_uart: Add Kontron COMe-mTT10 uart clock quirk
From: Michael Brunner @ 2012-03-23 10:06 UTC (permalink / raw)
To: Darren Hart
Cc: Linux Kernel Mailing List, Greg Kroah-Hartman, Alan Cox,
linux-serial
In-Reply-To: <4F6B9E7B.9090005@linux.intel.com>
Add UART clock quirk for the Kontron COMe-mTT10 module.
The board has previously been called nanoETXexpress-TT, therefore this
is also checked.
As suggested by Darren Hart the comparison in this patch version is
placed after the FRI2 checks to ensure it will also work with possible
upcoming changes to the FRI2 firmware.
This patch follows the patchset submitted by Darren Hart at
commit a46f5533ecfc7bbdd646d84fdab8656031a715c6.
Signed-off-by: Michael Brunner <mibru@gmx.de>
---
drivers/tty/serial/pch_uart.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 332f2eb..dd69c95 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -210,6 +210,7 @@ enum {
#define CMITC_UARTCLK 192000000 /* 192.0000 MHz */
#define FRI2_64_UARTCLK 64000000 /* 64.0000 MHz */
#define FRI2_48_UARTCLK 48000000 /* 48.0000 MHz */
+#define NTC1_UARTCLK 64000000 /* 64.0000 MHz */
struct pch_uart_buffer {
unsigned char *buf;
@@ -388,6 +389,12 @@ static int pch_uart_get_uartclk(void)
if (cmp && strstr(cmp, "Fish River Island II"))
return FRI2_48_UARTCLK;
+ /* Kontron COMe-mTT10 (nanoETXexpress-TT) */
+ cmp = dmi_get_system_info(DMI_BOARD_NAME);
+ if (cmp && (strstr(cmp, "COMe-mTT") ||
+ strstr(cmp, "nanoETXexpress-TT")))
+ return NTC1_UARTCLK;
+
return DEFAULT_UARTCLK;
}
^ permalink raw reply related
* Re: [PATCHv2] pch_uart: Add Kontron COMe-mTT10 uart clock quirk
From: Darren Hart @ 2012-03-23 14:25 UTC (permalink / raw)
To: Michael Brunner
Cc: Linux Kernel Mailing List, Greg Kroah-Hartman, Alan Cox,
linux-serial
In-Reply-To: <20120323110637.63aa2f64@hyperion>
On 03/23/2012 03:06 AM, Michael Brunner wrote:
> Add UART clock quirk for the Kontron COMe-mTT10 module.
>
> The board has previously been called nanoETXexpress-TT, therefore this
> is also checked.
>
> As suggested by Darren Hart the comparison in this patch version is
> placed after the FRI2 checks to ensure it will also work with possible
> upcoming changes to the FRI2 firmware.
>
> This patch follows the patchset submitted by Darren Hart at
> commit a46f5533ecfc7bbdd646d84fdab8656031a715c6.
>
> Signed-off-by: Michael Brunner <mibru@gmx.de>
> ---
> drivers/tty/serial/pch_uart.c | 7 +++++++
> 1 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
> index 332f2eb..dd69c95 100644
> --- a/drivers/tty/serial/pch_uart.c
> +++ b/drivers/tty/serial/pch_uart.c
> @@ -210,6 +210,7 @@ enum {
> #define CMITC_UARTCLK 192000000 /* 192.0000 MHz */
> #define FRI2_64_UARTCLK 64000000 /* 64.0000 MHz */
> #define FRI2_48_UARTCLK 48000000 /* 48.0000 MHz */
> +#define NTC1_UARTCLK 64000000 /* 64.0000 MHz */
>
> struct pch_uart_buffer {
> unsigned char *buf;
> @@ -388,6 +389,12 @@ static int pch_uart_get_uartclk(void)
> if (cmp && strstr(cmp, "Fish River Island II"))
> return FRI2_48_UARTCLK;
>
> + /* Kontron COMe-mTT10 (nanoETXexpress-TT) */
> + cmp = dmi_get_system_info(DMI_BOARD_NAME);
> + if (cmp && (strstr(cmp, "COMe-mTT") ||
> + strstr(cmp, "nanoETXexpress-TT")))
> + return NTC1_UARTCLK;
> +
I don't know the cost of a dmi_get_system_info() call, since we already
grabbed BOARD_NAME, would it make sense to reuse that value by using a
dedicated cmp string?
...
Hrm, just appears to be an array lookup...
return dmi_ident[field];
No real loss there.
Acked-by: Darren Hart <dvhart@linux.intel.com>
--
Darren Hart
Intel Open Source Technology Center
Yocto Project - Linux Kernel
^ permalink raw reply
* LOAN @ YOUR DOOR STEP
From: edu @ 2012-03-25 16:25 UTC (permalink / raw)
To: kingsaigbe
Do you need an urgent loan? contact us today for more info.
[reply only on this email below]
Email:kingsfinancial@aol.com
^ permalink raw reply
* Re: [GIT PATCH] TTY/serial patches for 3.4-rc1
From: Tilman Schmidt @ 2012-03-25 17:12 UTC (permalink / raw)
To: Greg KH, Jiri Slaby; +Cc: linux-kernel, linux-serial, netdev, hjlipp
In-Reply-To: <20120319195649.GD9883@kroah.com>
Jiri, Greg,
On 19.03.2012 20:56, Greg KH wrote:
> tty and serial merge for 3.4-rc1
[...]
> Jiri Slaby (77):
[...]
> TTY: isdn/gigaset, do not set tty->driver_data to NULL
It seems that the amendment we discussed on 05.03.2012 did not
make it into this patch. It would be nice if the following patch
could still be added on top of it.
Thanks,
Tilman
From: Tilman Schmidt <tilman@imap.cc>
Date: Sun, 25 Mar 2012 12:21:57 +0200
Subject: [PATCH] isdn/gigaset: use gig_dbg() for debugging output
The "TTY buffer in tty_port" patchset introduced an opencoded
debug message in the Gigaset tty device if_close() function.
Change it to use the gig_dbg() macro like everywhere else in
the driver.
Signed-off-by: Tilman Schmidt <tilman@imap.cc>
---
drivers/isdn/gigaset/interface.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/isdn/gigaset/interface.c b/drivers/isdn/gigaset/interface.c
index b3d6ac1..a6d9fd2 100644
--- a/drivers/isdn/gigaset/interface.c
+++ b/drivers/isdn/gigaset/interface.c
@@ -176,7 +176,7 @@ static void if_close(struct tty_struct *tty, struct file *filp)
struct cardstate *cs = tty->driver_data;
if (!cs) { /* happens if we didn't find cs in open */
- printk(KERN_DEBUG "%s: no cardstate\n", __func__);
+ gig_dbg(DEBUG_IF, "%s: no cardstate", __func__);
return;
}
--
1.7.3.4
^ permalink raw reply related
* [PATCH 1/7] pch_uart: Delete unused structure member
From: Tomoya MORINAGA @ 2012-03-26 5:43 UTC (permalink / raw)
To: Alan Cox, Greg Kroah-Hartman, linux-serial, linux-kernel
Cc: qi.wang, yong.y.wang, joel.clark, kok.howg.ewe, Tomoya MORINAGA
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
---
drivers/tty/serial/pch_uart.c | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 332f2eb..80609e4 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -236,7 +236,6 @@ struct eg20t_port {
unsigned int fcr;
unsigned int mcr;
unsigned int use_dma;
- unsigned int use_dma_flag;
struct dma_async_tx_descriptor *desc_tx;
struct dma_async_tx_descriptor *desc_rx;
struct pch_dma_slave param_tx;
@@ -1445,7 +1444,6 @@ static int pch_uart_verify_port(struct uart_port *port,
return -EOPNOTSUPP;
#endif
priv->use_dma = 1;
- priv->use_dma_flag = 1;
dev_info(priv->port.dev, "PCH UART : Use DMA Mode\n");
}
--
1.7.7.6
^ permalink raw reply related
* [PATCH 3/7] pch_uart: change type to %d to %02x
From: Tomoya MORINAGA @ 2012-03-26 5:43 UTC (permalink / raw)
To: Alan Cox, Greg Kroah-Hartman, linux-serial, linux-kernel
Cc: qi.wang, yong.y.wang, joel.clark, kok.howg.ewe, Tomoya MORINAGA
In-Reply-To: <1332740586-28496-1-git-send-email-tomoya.rohm@gmail.com>
%02x format is easier to understand better than %d.
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
---
drivers/tty/serial/pch_uart.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 6347f01..c025c4b 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -1087,7 +1087,7 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id)
ret = PCH_UART_HANDLED_MS_INT;
break;
default: /* Never junp to this label */
- dev_err(priv->port.dev, "%s:iid=%d (%lu)\n", __func__,
+ dev_err(priv->port.dev, "%s:iid=%02x (%lu)\n", __func__,
iid, jiffies);
ret = -1;
break;
--
1.7.7.6
^ permalink raw reply related
* [PATCH 5/7] pch_uart: delete unused data structure
From: Tomoya MORINAGA @ 2012-03-26 5:43 UTC (permalink / raw)
To: Alan Cox, Greg Kroah-Hartman, linux-serial, linux-kernel
Cc: qi.wang, yong.y.wang, joel.clark, kok.howg.ewe, Tomoya MORINAGA
In-Reply-To: <1332740586-28496-1-git-send-email-tomoya.rohm@gmail.com>
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
---
drivers/tty/serial/pch_uart.c | 6 ------
1 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 7a9ef83..020bbf3 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -228,7 +228,6 @@ struct eg20t_port {
int start_tx;
int start_rx;
int tx_empty;
- int int_dis_flag;
int trigger;
int trigger_level;
struct pch_uart_buffer rxbuf;
@@ -1105,10 +1104,6 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id)
}
handled |= (unsigned int)ret;
}
- if (handled == 0 && iid <= 1) {
- if (priv->int_dis_flag)
- priv->int_dis_flag = 0;
- }
spin_unlock_irqrestore(&priv->port.lock, flags);
return IRQ_RETVAL(handled);
@@ -1203,7 +1198,6 @@ static void pch_uart_stop_rx(struct uart_port *port)
priv = container_of(port, struct eg20t_port, port);
priv->start_rx = 0;
pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_RX_INT);
- priv->int_dis_flag = 1;
}
/* Enable the modem status interrupts. */
--
1.7.7.6
^ permalink raw reply related
* [PATCH 6/7] pch_uart: Fix return value issue
From: Tomoya MORINAGA @ 2012-03-26 5:43 UTC (permalink / raw)
To: Alan Cox, Greg Kroah-Hartman, linux-serial, linux-kernel
Cc: qi.wang, yong.y.wang, joel.clark, kok.howg.ewe, Tomoya MORINAGA
In-Reply-To: <1332740586-28496-1-git-send-email-tomoya.rohm@gmail.com>
Currently, occurring line status interrupt,
returned value is not set in interrupt handler function.
As a result, 0 can be returned.
This patch adds setting returned value.
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
---
drivers/tty/serial/pch_uart.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 020bbf3..6e7f0ac 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -39,6 +39,7 @@ enum {
PCH_UART_HANDLED_RX_ERR_INT_SHIFT,
PCH_UART_HANDLED_RX_TRG_INT_SHIFT,
PCH_UART_HANDLED_MS_INT_SHIFT,
+ PCH_UART_HANDLED_LS_INT_SHIFT,
};
enum {
@@ -63,6 +64,8 @@ enum {
PCH_UART_HANDLED_RX_TRG_INT_SHIFT)<<1))
#define PCH_UART_HANDLED_MS_INT (1<<((PCH_UART_HANDLED_MS_INT_SHIFT)<<1))
+#define PCH_UART_HANDLED_LS_INT (1<<((PCH_UART_HANDLED_LS_INT_SHIFT)<<1))
+
#define PCH_UART_RBR 0x00
#define PCH_UART_THR 0x00
@@ -1062,6 +1065,8 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id)
UART_LSR_PE | UART_LSR_OE)) {
pch_uart_err_ir(priv, lsr);
ret = PCH_UART_HANDLED_RX_ERR_INT;
+ } else {
+ ret = PCH_UART_HANDLED_LS_INT;
}
break;
case PCH_UART_IID_RDR: /* Received Data Ready */
--
1.7.7.6
^ permalink raw reply related
* [PATCH 2/7] pch_uart: change type to u8
From: Tomoya MORINAGA @ 2012-03-26 5:43 UTC (permalink / raw)
To: Alan Cox, Greg Kroah-Hartman, linux-serial, linux-kernel
Cc: qi.wang, yong.y.wang, joel.clark, kok.howg.ewe, Tomoya MORINAGA
In-Reply-To: <1332740586-28496-1-git-send-email-tomoya.rohm@gmail.com>
Target uart register access size is 8bit.
However, 32bit is used at 2 points.
This patch modifies type "unsigned int" to "unsigned char".
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
---
drivers/tty/serial/pch_uart.c | 12 ++++--------
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 80609e4..6347f01 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -556,14 +556,10 @@ static int pch_uart_hal_read(struct eg20t_port *priv, unsigned char *buf,
return i;
}
-static unsigned int pch_uart_hal_get_iid(struct eg20t_port *priv)
+static unsigned char pch_uart_hal_get_iid(struct eg20t_port *priv)
{
- unsigned int iir;
- int ret;
-
- iir = ioread8(priv->membase + UART_IIR);
- ret = (iir & (PCH_UART_IIR_IID | PCH_UART_IIR_TOI | PCH_UART_IIR_IP));
- return ret;
+ return ioread8(priv->membase + UART_IIR) &\
+ (PCH_UART_IIR_IID | PCH_UART_IIR_TOI | PCH_UART_IIR_IP);
}
static u8 pch_uart_hal_get_line_status(struct eg20t_port *priv)
@@ -1049,7 +1045,7 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id)
unsigned int handled;
u8 lsr;
int ret = 0;
- unsigned int iid;
+ unsigned char iid;
unsigned long flags;
spin_lock_irqsave(&priv->port.lock, flags);
--
1.7.7.6
^ permalink raw reply related
* [PATCH 4/7] pch_uart: Support modem status interrupt
From: Tomoya MORINAGA @ 2012-03-26 5:43 UTC (permalink / raw)
To: Alan Cox, Greg Kroah-Hartman, linux-serial, linux-kernel
Cc: qi.wang, yong.y.wang, joel.clark, kok.howg.ewe, Tomoya MORINAGA
In-Reply-To: <1332740586-28496-1-git-send-email-tomoya.rohm@gmail.com>
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
---
drivers/tty/serial/pch_uart.c | 15 +++++++++++++--
1 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index c025c4b..7a9ef83 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -1047,10 +1047,15 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id)
int ret = 0;
unsigned char iid;
unsigned long flags;
+ int next = 1;
+ u8 msr;
spin_lock_irqsave(&priv->port.lock, flags);
handled = 0;
- while ((iid = pch_uart_hal_get_iid(priv)) > 1) {
+ while (next) {
+ iid = pch_uart_hal_get_iid(priv);
+ if (iid & PCH_UART_IIR_IP) /* No Interrupt */
+ break;
switch (iid) {
case PCH_UART_IID_RLS: /* Receiver Line Status */
lsr = pch_uart_hal_get_line_status(priv);
@@ -1084,12 +1089,18 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id)
ret = handle_tx(priv);
break;
case PCH_UART_IID_MS: /* Modem Status */
- ret = PCH_UART_HANDLED_MS_INT;
+ msr = pch_uart_hal_get_modem(priv);
+ next = 0; /* MS ir prioirty is the lowest. So, MS ir
+ means final interrupt */
+ if ((msr & UART_MSR_ANY_DELTA) == 0)
+ break;
+ ret |= PCH_UART_HANDLED_MS_INT;
break;
default: /* Never junp to this label */
dev_err(priv->port.dev, "%s:iid=%02x (%lu)\n", __func__,
iid, jiffies);
ret = -1;
+ next = 0;
break;
}
handled |= (unsigned int)ret;
--
1.7.7.6
^ permalink raw reply related
* [PATCH 7/7] pch_uart: Fix duplicate memory release issue
From: Tomoya MORINAGA @ 2012-03-26 5:43 UTC (permalink / raw)
To: Alan Cox, Greg Kroah-Hartman, linux-serial, linux-kernel
Cc: qi.wang, yong.y.wang, joel.clark, kok.howg.ewe, Tomoya MORINAGA
In-Reply-To: <1332740586-28496-1-git-send-email-tomoya.rohm@gmail.com>
Add initialize variable to prevent duplicate free memory.
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
---
drivers/tty/serial/pch_uart.c | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 6e7f0ac..803847b 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -660,10 +660,13 @@ static void pch_free_dma(struct uart_port *port)
dma_release_channel(priv->chan_rx);
priv->chan_rx = NULL;
}
- if (sg_dma_address(&priv->sg_rx))
- dma_free_coherent(port->dev, port->fifosize,
- sg_virt(&priv->sg_rx),
- sg_dma_address(&priv->sg_rx));
+
+ if (priv->rx_buf_dma) {
+ dma_free_coherent(port->dev, port->fifosize, priv->rx_buf_virt,
+ priv->rx_buf_dma);
+ priv->rx_buf_virt = NULL;
+ priv->rx_buf_dma = 0;
+ }
return;
}
--
1.7.7.6
^ permalink raw reply related
* [PATCH] serial: pl011: implement workaround for CTS clear event issue
From: Linus Walleij @ 2012-03-26 8:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-serial
Cc: linux-arm-kernel, Christophe Arnal, Guillaume Jaunet,
Matthias Locher, Chanho Min, Linus Walleij, Rajanikanth H.V
From: "Rajanikanth H.V" <rajanikanth.hv@stericsson.com>
Problem Observed:
- interrupt status is set by rising or falling edge on CTS line
- interrupt status is cleared on a .0. to .1. transition of the
interrupt-clear register bit 1.
- interrupt-clear register is reset by hardware once the interrupt
status is .0..
Remark: It seems not possible to read this register back by the
CPU though, but internally this register exists.
- when simultaneous set and reset event on the interrupt status
happens, then the set-event has priority and the status remains
.1.. As a result the interrupt-clear register is not reset to
.0., and no new .0. to .1. transition can be detected on it when
writing a .1. to it.
This implies race condition, the clear must be performed at least
one UARTCLK the riding edge of CTS RIS interrupt.
Fix:
Instead of resetting UART as done in commit
c16d51a32bbb61ac8fd96f78b5ce2fccfe0fb4c3
"amba pl011: workaround for uart registers lockup" do the
following:
write .0. and then .1. to the interrupt-clear register to make
sure that this transition is detected. According to the datasheet
writing a .0. does not have any effect, but actually it allows to
reset the internal interrupt-clear register.
Take into account:
The .0. needs to last at least for one clk_uart clock period
(~ 38 MHz, 26.08ns)
This way we can do away with the tasklet and keep only a tiny
fix triggered by the variant flag introduced in this patch.
Signed-off-by: Guillaume Jaunet <guillaume.jaunet@stericsson.com>
Signed-off-by: Christophe Arnal <christophe.arnal@stericsson.com>
Signed-off-by: Matthias Locher <Matthias.Locher@stericsson.com>
Signed-off-by: Rajanikanth H.V <rajanikanth.hv@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/tty/serial/amba-pl011.c | 114 +++++++--------------------------------
1 file changed, 18 insertions(+), 96 deletions(-)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 4ed35c5..e48211d 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -61,35 +61,9 @@
#define SERIAL_AMBA_MINOR 64
#define SERIAL_AMBA_NR UART_NR
-#define AMBA_ISR_PASS_LIMIT 256
-
#define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE)
#define UART_DUMMY_DR_RX (1 << 16)
-
-#define UART_WA_SAVE_NR 14
-
-static void pl011_lockup_wa(unsigned long data);
-static const u32 uart_wa_reg[UART_WA_SAVE_NR] = {
- ST_UART011_DMAWM,
- ST_UART011_TIMEOUT,
- ST_UART011_LCRH_RX,
- UART011_IBRD,
- UART011_FBRD,
- ST_UART011_LCRH_TX,
- UART011_IFLS,
- ST_UART011_XFCR,
- ST_UART011_XON1,
- ST_UART011_XON2,
- ST_UART011_XOFF1,
- ST_UART011_XOFF2,
- UART011_CR,
- UART011_IMSC
-};
-
-static u32 uart_wa_regdata[UART_WA_SAVE_NR];
-static DECLARE_TASKLET(pl011_lockup_tlet, pl011_lockup_wa, 0);
-
/* There is by now at least one vendor with differing details, so handle it */
struct vendor_data {
unsigned int ifls;
@@ -99,6 +73,7 @@ struct vendor_data {
bool oversampling;
bool interrupt_may_hang; /* vendor-specific */
bool dma_threshold;
+ bool cts_event_workaround;
};
static struct vendor_data vendor_arm = {
@@ -108,6 +83,7 @@ static struct vendor_data vendor_arm = {
.lcrh_rx = UART011_LCRH,
.oversampling = false,
.dma_threshold = false,
+ .cts_event_workaround = false,
};
static struct vendor_data vendor_st = {
@@ -118,6 +94,7 @@ static struct vendor_data vendor_st = {
.oversampling = true,
.interrupt_may_hang = true,
.dma_threshold = true,
+ .cts_event_workaround = true,
};
static struct uart_amba_port *amba_ports[UART_NR];
@@ -1038,69 +1015,6 @@ static inline bool pl011_dma_rx_running(struct uart_amba_port *uap)
#define pl011_dma_flush_buffer NULL
#endif
-
-/*
- * pl011_lockup_wa
- * This workaround aims to break the deadlock situation
- * when after long transfer over uart in hardware flow
- * control, uart interrupt registers cannot be cleared.
- * Hence uart transfer gets blocked.
- *
- * It is seen that during such deadlock condition ICR
- * don't get cleared even on multiple write. This leads
- * pass_counter to decrease and finally reach zero. This
- * can be taken as trigger point to run this UART_BT_WA.
- *
- */
-static void pl011_lockup_wa(unsigned long data)
-{
- struct uart_amba_port *uap = amba_ports[0];
- void __iomem *base = uap->port.membase;
- struct circ_buf *xmit = &uap->port.state->xmit;
- struct tty_struct *tty = uap->port.state->port.tty;
- int buf_empty_retries = 200;
- int loop;
-
- /* Stop HCI layer from submitting data for tx */
- tty->hw_stopped = 1;
- while (!uart_circ_empty(xmit)) {
- if (buf_empty_retries-- == 0)
- break;
- udelay(100);
- }
-
- /* Backup registers */
- for (loop = 0; loop < UART_WA_SAVE_NR; loop++)
- uart_wa_regdata[loop] = readl(base + uart_wa_reg[loop]);
-
- /* Disable UART so that FIFO data is flushed out */
- writew(0x00, uap->port.membase + UART011_CR);
-
- /* Soft reset UART module */
- if (uap->port.dev->platform_data) {
- struct amba_pl011_data *plat;
-
- plat = uap->port.dev->platform_data;
- if (plat->reset)
- plat->reset();
- }
-
- /* Restore registers */
- for (loop = 0; loop < UART_WA_SAVE_NR; loop++)
- writew(uart_wa_regdata[loop] ,
- uap->port.membase + uart_wa_reg[loop]);
-
- /* Initialise the old status of the modem signals */
- uap->old_status = readw(uap->port.membase + UART01x_FR) &
- UART01x_FR_MODEM_ANY;
-
- if (readl(base + UART011_MIS) & 0x2)
- printk(KERN_EMERG "UART_BT_WA: ***FAILED***\n");
-
- /* Start Tx/Rx */
- tty->hw_stopped = 0;
-}
-
static void pl011_stop_tx(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
@@ -1227,14 +1141,28 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
{
struct uart_amba_port *uap = dev_id;
unsigned long flags;
- unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
+ unsigned int status;
int handled = 0;
+ unsigned int dummy_read;
spin_lock_irqsave(&uap->port.lock, flags);
status = readw(uap->port.membase + UART011_MIS);
if (status) {
do {
+ if (uap->vendor->cts_event_workaround) {
+ /* workaround to make sure that all bits are unlocked.. */
+ writew(0x00, uap->port.membase + UART011_ICR);
+
+ /*
+ * WA: introduce 26ns(1 uart clk) delay before W1C;
+ * single apb access will incur 2 pclk(133.12Mhz) delay,
+ * so add 2 dummy reads
+ */
+ dummy_read = readw(uap->port.membase + UART011_ICR);
+ dummy_read = readw(uap->port.membase + UART011_ICR);
+ }
+
writew(status & ~(UART011_TXIS|UART011_RTIS|
UART011_RXIS),
uap->port.membase + UART011_ICR);
@@ -1251,12 +1179,6 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
if (status & UART011_TXIS)
pl011_tx_chars(uap);
- if (pass_counter-- == 0) {
- if (uap->interrupt_may_hang)
- tasklet_schedule(&pl011_lockup_tlet);
- break;
- }
-
status = readw(uap->port.membase + UART011_MIS);
} while (status != 0);
handled = 1;
--
1.7.9.2
^ permalink raw reply related
* Re: [GIT PATCH] TTY/serial patches for 3.4-rc1
From: Jiri Slaby @ 2012-03-26 8:12 UTC (permalink / raw)
To: Tilman Schmidt; +Cc: Greg KH, linux-kernel, linux-serial, netdev, hjlipp
In-Reply-To: <20120325171837.67310140074@xenon.ts.pxnet.com>
On 03/25/2012 07:12 PM, Tilman Schmidt wrote:
> Jiri, Greg,
>
> On 19.03.2012 20:56, Greg KH wrote:
>> tty and serial merge for 3.4-rc1
> [...]
>> Jiri Slaby (77):
> [...]
>> TTY: isdn/gigaset, do not set tty->driver_data to NULL
>
> It seems that the amendment we discussed on 05.03.2012 did not
> make it into this patch. It would be nice if the following patch
> could still be added on top of it.
Ah, yes, I forgot, of course. Thanks for posting it.
> From: Tilman Schmidt <tilman@imap.cc>
> Date: Sun, 25 Mar 2012 12:21:57 +0200
> Subject: [PATCH] isdn/gigaset: use gig_dbg() for debugging output
>
> The "TTY buffer in tty_port" patchset introduced an opencoded
> debug message in the Gigaset tty device if_close() function.
> Change it to use the gig_dbg() macro like everywhere else in
> the driver.
>
> Signed-off-by: Tilman Schmidt <tilman@imap.cc>
> ---
> drivers/isdn/gigaset/interface.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/isdn/gigaset/interface.c b/drivers/isdn/gigaset/interface.c
> index b3d6ac1..a6d9fd2 100644
> --- a/drivers/isdn/gigaset/interface.c
> +++ b/drivers/isdn/gigaset/interface.c
> @@ -176,7 +176,7 @@ static void if_close(struct tty_struct *tty, struct file *filp)
> struct cardstate *cs = tty->driver_data;
>
> if (!cs) { /* happens if we didn't find cs in open */
> - printk(KERN_DEBUG "%s: no cardstate\n", __func__);
> + gig_dbg(DEBUG_IF, "%s: no cardstate", __func__);
> return;
> }
>
--
js
suse labs
^ permalink raw reply
* Re: [PATCH] serial: pl011: implement workaround for CTS clear event issue
From: Russell King - ARM Linux @ 2012-03-26 8:17 UTC (permalink / raw)
To: Linus Walleij
Cc: Greg Kroah-Hartman, linux-serial, linux-arm-kernel,
Christophe Arnal, Guillaume Jaunet, Matthias Locher, Chanho Min,
Linus Walleij, Rajanikanth H.V
In-Reply-To: <1332748868-10172-1-git-send-email-linus.walleij@stericsson.com>
On Mon, Mar 26, 2012 at 10:01:08AM +0200, Linus Walleij wrote:
> - unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
> + unsigned int status;
Why are you removing the pass counter and associated code, which was
there before your work-around patch was applied?
^ permalink raw reply
* Re: [PATCH] serial: pl011: implement workaround for CTS clear event issue
From: Linus Walleij @ 2012-03-26 9:05 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Linus Walleij, Greg Kroah-Hartman, linux-serial, linux-arm-kernel,
Christophe Arnal, Guillaume Jaunet, Matthias Locher, Chanho Min,
Rajanikanth H.V
In-Reply-To: <20120326081756.GI5611@n2100.arm.linux.org.uk>
On Mon, Mar 26, 2012 at 10:17 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Mon, Mar 26, 2012 at 10:01:08AM +0200, Linus Walleij wrote:
>> - unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
>> + unsigned int status;
>
> Why are you removing the pass counter and associated code, which was
> there before your work-around patch was applied?
Good point, I'll cook a v2 which restores that counter an break clause to
what it was before the workaround was added.
Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe linux-serial" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* RE: [PATCH] serial: pl011: implement workaround for CTS clear event issue
From: Rajanikanth H V @ 2012-03-26 9:07 UTC (permalink / raw)
To: Russell King - ARM Linux, Linus WALLEIJ
Cc: Greg Kroah-Hartman, linux-serial@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Christophe ARNAL,
Guillaume JAUNET, Matthias LOCHER, Chanho Min, Linus Walleij,
Srinidhi KASAGAR
In-Reply-To: <20120326081756.GI5611@n2100.arm.linux.org.uk>
Russell,
As per my understanding, pass counter helps to identify/break the
Deadlock situation and triggers bottom half handler in which
Uart controller will be forced to reset (save and restore of UART register happens).
It has been found from hardware analysis that race condition(explained in my commit message)
was causing the situation to persist (i.e. CTS ack was not happening in spite of W1C),
hence, assuming UART controller in deadlock state is wrong.
Thanks,
Rajanikanth
-----Original Message-----
From: Russell King - ARM Linux [mailto:linux@arm.linux.org.uk]
Sent: Monday, March 26, 2012 1:48 PM
To: Linus WALLEIJ
Cc: Greg Kroah-Hartman; linux-serial@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Christophe ARNAL; Guillaume JAUNET; Matthias LOCHER; Chanho Min; Linus Walleij; Rajanikanth H V
Subject: Re: [PATCH] serial: pl011: implement workaround for CTS clear event issue
On Mon, Mar 26, 2012 at 10:01:08AM +0200, Linus Walleij wrote:
> - unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
> + unsigned int status;
Why are you removing the pass counter and associated code, which was
there before your work-around patch was applied?
^ permalink raw reply
* Re: [PATCH] serial: pl011: implement workaround for CTS clear event issue
From: Linus Walleij @ 2012-03-26 9:14 UTC (permalink / raw)
To: Rajanikanth H V
Cc: Russell King - ARM Linux, Linus WALLEIJ, Greg Kroah-Hartman,
linux-serial@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Christophe ARNAL,
Guillaume JAUNET, Matthias LOCHER, Chanho Min, Srinidhi KASAGAR
In-Reply-To: <2B1D156D95AE9B4EAD379CB9E465FE73255E4BB903@EXDCVYMBSTM005.EQ1STM.local>
On Mon, Mar 26, 2012 at 11:07 AM, Rajanikanth H V
<rajanikanth.hv@stericsson.com> wrote:
> As per my understanding, pass counter helps to identify/break the
> Deadlock situation and triggers bottom half handler in which
> Uart controller will be forced to reset (save and restore of UART register happens).
It was there before the fix for the deadlock situation found in ST hardwares,
which was solved by the tasklet, was ever introduced.
It has been around forever as a simple guard to stop the ISR from
going into a loop... which is nice coding practice anyway so let's
keep it.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2] serial: pl011: implement workaround for CTS clear event issue
From: Linus Walleij @ 2012-03-26 9:17 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-serial
Cc: linux-arm-kernel, Christophe Arnal, Guillaume Jaunet,
Matthias Locher, Chanho Min, Linus Walleij, Rajanikanth H.V
From: "Rajanikanth H.V" <rajanikanth.hv@stericsson.com>
Problem Observed:
- interrupt status is set by rising or falling edge on CTS line
- interrupt status is cleared on a .0. to .1. transition of the
interrupt-clear register bit 1.
- interrupt-clear register is reset by hardware once the interrupt
status is .0..
Remark: It seems not possible to read this register back by the
CPU though, but internally this register exists.
- when simultaneous set and reset event on the interrupt status
happens, then the set-event has priority and the status remains
.1.. As a result the interrupt-clear register is not reset to
.0., and no new .0. to .1. transition can be detected on it when
writing a .1. to it.
This implies race condition, the clear must be performed at least
one UARTCLK the riding edge of CTS RIS interrupt.
Fix:
Instead of resetting UART as done in commit
c16d51a32bbb61ac8fd96f78b5ce2fccfe0fb4c3
"amba pl011: workaround for uart registers lockup" do the
following:
write .0. and then .1. to the interrupt-clear register to make
sure that this transition is detected. According to the datasheet
writing a .0. does not have any effect, but actually it allows to
reset the internal interrupt-clear register.
Take into account:
The .0. needs to last at least for one clk_uart clock period
(~ 38 MHz, 26.08ns)
This way we can do away with the tasklet and keep only a tiny
fix triggered by the variant flag introduced in this patch.
Signed-off-by: Guillaume Jaunet <guillaume.jaunet@stericsson.com>
Signed-off-by: Christophe Arnal <christophe.arnal@stericsson.com>
Signed-off-by: Matthias Locher <Matthias.Locher@stericsson.com>
Signed-off-by: Rajanikanth H.V <rajanikanth.hv@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Restore the ISR loop lockup guard pass_counter to what it was
before the lockup fix tasklet was introduced.
---
drivers/tty/serial/amba-pl011.c | 109 +++++++--------------------------------
1 file changed, 18 insertions(+), 91 deletions(-)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 4ed35c5..5001a88 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -66,30 +66,6 @@
#define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE)
#define UART_DUMMY_DR_RX (1 << 16)
-
-#define UART_WA_SAVE_NR 14
-
-static void pl011_lockup_wa(unsigned long data);
-static const u32 uart_wa_reg[UART_WA_SAVE_NR] = {
- ST_UART011_DMAWM,
- ST_UART011_TIMEOUT,
- ST_UART011_LCRH_RX,
- UART011_IBRD,
- UART011_FBRD,
- ST_UART011_LCRH_TX,
- UART011_IFLS,
- ST_UART011_XFCR,
- ST_UART011_XON1,
- ST_UART011_XON2,
- ST_UART011_XOFF1,
- ST_UART011_XOFF2,
- UART011_CR,
- UART011_IMSC
-};
-
-static u32 uart_wa_regdata[UART_WA_SAVE_NR];
-static DECLARE_TASKLET(pl011_lockup_tlet, pl011_lockup_wa, 0);
-
/* There is by now at least one vendor with differing details, so handle it */
struct vendor_data {
unsigned int ifls;
@@ -99,6 +75,7 @@ struct vendor_data {
bool oversampling;
bool interrupt_may_hang; /* vendor-specific */
bool dma_threshold;
+ bool cts_event_workaround;
};
static struct vendor_data vendor_arm = {
@@ -108,6 +85,7 @@ static struct vendor_data vendor_arm = {
.lcrh_rx = UART011_LCRH,
.oversampling = false,
.dma_threshold = false,
+ .cts_event_workaround = false,
};
static struct vendor_data vendor_st = {
@@ -118,6 +96,7 @@ static struct vendor_data vendor_st = {
.oversampling = true,
.interrupt_may_hang = true,
.dma_threshold = true,
+ .cts_event_workaround = true,
};
static struct uart_amba_port *amba_ports[UART_NR];
@@ -1038,69 +1017,6 @@ static inline bool pl011_dma_rx_running(struct uart_amba_port *uap)
#define pl011_dma_flush_buffer NULL
#endif
-
-/*
- * pl011_lockup_wa
- * This workaround aims to break the deadlock situation
- * when after long transfer over uart in hardware flow
- * control, uart interrupt registers cannot be cleared.
- * Hence uart transfer gets blocked.
- *
- * It is seen that during such deadlock condition ICR
- * don't get cleared even on multiple write. This leads
- * pass_counter to decrease and finally reach zero. This
- * can be taken as trigger point to run this UART_BT_WA.
- *
- */
-static void pl011_lockup_wa(unsigned long data)
-{
- struct uart_amba_port *uap = amba_ports[0];
- void __iomem *base = uap->port.membase;
- struct circ_buf *xmit = &uap->port.state->xmit;
- struct tty_struct *tty = uap->port.state->port.tty;
- int buf_empty_retries = 200;
- int loop;
-
- /* Stop HCI layer from submitting data for tx */
- tty->hw_stopped = 1;
- while (!uart_circ_empty(xmit)) {
- if (buf_empty_retries-- == 0)
- break;
- udelay(100);
- }
-
- /* Backup registers */
- for (loop = 0; loop < UART_WA_SAVE_NR; loop++)
- uart_wa_regdata[loop] = readl(base + uart_wa_reg[loop]);
-
- /* Disable UART so that FIFO data is flushed out */
- writew(0x00, uap->port.membase + UART011_CR);
-
- /* Soft reset UART module */
- if (uap->port.dev->platform_data) {
- struct amba_pl011_data *plat;
-
- plat = uap->port.dev->platform_data;
- if (plat->reset)
- plat->reset();
- }
-
- /* Restore registers */
- for (loop = 0; loop < UART_WA_SAVE_NR; loop++)
- writew(uart_wa_regdata[loop] ,
- uap->port.membase + uart_wa_reg[loop]);
-
- /* Initialise the old status of the modem signals */
- uap->old_status = readw(uap->port.membase + UART01x_FR) &
- UART01x_FR_MODEM_ANY;
-
- if (readl(base + UART011_MIS) & 0x2)
- printk(KERN_EMERG "UART_BT_WA: ***FAILED***\n");
-
- /* Start Tx/Rx */
- tty->hw_stopped = 0;
-}
-
static void pl011_stop_tx(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
@@ -1229,12 +1145,26 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
unsigned long flags;
unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
int handled = 0;
+ unsigned int dummy_read;
spin_lock_irqsave(&uap->port.lock, flags);
status = readw(uap->port.membase + UART011_MIS);
if (status) {
do {
+ if (uap->vendor->cts_event_workaround) {
+ /* workaround to make sure that all bits are unlocked.. */
+ writew(0x00, uap->port.membase + UART011_ICR);
+
+ /*
+ * WA: introduce 26ns(1 uart clk) delay before W1C;
+ * single apb access will incur 2 pclk(133.12Mhz) delay,
+ * so add 2 dummy reads
+ */
+ dummy_read = readw(uap->port.membase + UART011_ICR);
+ dummy_read = readw(uap->port.membase + UART011_ICR);
+ }
+
writew(status & ~(UART011_TXIS|UART011_RTIS|
UART011_RXIS),
uap->port.membase + UART011_ICR);
@@ -1251,11 +1181,8 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
if (status & UART011_TXIS)
pl011_tx_chars(uap);
- if (pass_counter-- == 0) {
- if (uap->interrupt_may_hang)
- tasklet_schedule(&pl011_lockup_tlet);
+ if (pass_counter-- == 0)
break;
- }
status = readw(uap->port.membase + UART011_MIS);
} while (status != 0);
--
1.7.9.2
^ permalink raw reply related
* (From: Mrs. Mary kumba, Family Business Assistance Tel:+27-737535133 )
From: Tony Kumba @ 2012-03-26 9:45 UTC (permalink / raw)
[-- Attachment #1: Type: text/plain, Size: 31 bytes --]
Please view the attached letter
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