* Re: [PATCH v6 04/10] gpio: exar: Fix iomap request
From: Linus Walleij @ 2017-06-20 8:15 UTC (permalink / raw)
To: Jan Kiszka
Cc: Alexandre Courbot, Greg Kroah-Hartman, Linux Kernel Mailing List,
linux-serial@vger.kernel.org, linux-gpio@vger.kernel.org,
Sudip Mukherjee, Andy Shevchenko, Sascha Weisenberger
In-Reply-To: <eeae5567f93fe044828e572e336cc65464c0e1ea.1497033197.git.jan.kiszka@siemens.com>
On Fri, Jun 9, 2017 at 8:33 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> The UART driver already maps the resource for us. Trying to do this here
> only fails and leaves us with a non-working device.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
This patch does not apply to the GPIO tree.
I don't know why.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v6 03/10] gpio: exar: Allocate resources on behalf of the platform device
From: Linus Walleij @ 2017-06-20 8:14 UTC (permalink / raw)
To: Jan Kiszka
Cc: Alexandre Courbot, Greg Kroah-Hartman, Linux Kernel Mailing List,
linux-serial@vger.kernel.org, linux-gpio@vger.kernel.org,
Sudip Mukherjee, Andy Shevchenko, Sascha Weisenberger
In-Reply-To: <5e21502713a4a65b91a6366e67ab361f650d4b3c.1497033197.git.jan.kiszka@siemens.com>
On Fri, Jun 9, 2017 at 8:33 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> Do not allocate resources on behalf of the parent device but on our own.
> Otherwise, cleanup does not properly work if gpio-exar is removed but
> not the parent device.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v6 02/10] gpio-exar/8250-exar: Fix passing in of parent PCI device
From: Linus Walleij @ 2017-06-20 8:13 UTC (permalink / raw)
To: Jan Kiszka
Cc: Alexandre Courbot, Greg Kroah-Hartman, Linux Kernel Mailing List,
linux-serial@vger.kernel.org, linux-gpio@vger.kernel.org,
Sudip Mukherjee, Andy Shevchenko, Sascha Weisenberger
In-Reply-To: <6f2e19cfb8bcb9acf4b042e4db716e93286862d6.1497033197.git.jan.kiszka@siemens.com>
On Fri, Jun 9, 2017 at 8:33 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> This fixes reloading of the GPIO driver for the same platform device
> instance as created by the exar UART driver: First of all, the driver
> sets drvdata to its own value during probing and does not restore the
> original value on exit. But this won't help anyway as the core clears
> drvdata after the driver left.
>
> Set the platform device parent instead.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Patch applied to the GPIO tree so we advance this series.
Patch 1 does not apply.
Let's see how it goes.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2] serial: 8250: 8250_omap: Fix race b/w dma completion and RX timeout
From: Vignesh R @ 2017-06-20 5:42 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Jiri Slaby, Peter Hurley, Vignesh R, Andy Shevchenko,
linux-serial, linux-omap, linux-kernel, Tony Lindgren
DMA RX completion handler for UART is called from a tasklet and hence
may be delayed depending on the system load. In meanwhile, there may be
RX timeout interrupt which can get serviced first before DMA RX
completion handler is executed for the completed transfer.
omap_8250_rx_dma_flush() which is called on RX timeout interrupt makes
sure that the DMA RX buffer is pushed and then the FIFO is drained and
also queues a new DMA request. But, when DMA RX completion handler
executes, it will erroneously flush the currently queued DMA transfer
which sometimes results in data corruption and double queueing of DMA RX
requests.
Fix this by checking whether RX completion is for the currently queued
transfer or not. And also hold port lock when in DMA completion to avoid
race wrt RX timeout handler preempting it.
Signed-off-by: Vignesh R <vigneshr@ti.com>
---
v2: use dmaengine_tx_status() API to know completion status.
drivers/tty/serial/8250/8250_omap.c | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
index d81bac98d190..833771bca0a5 100644
--- a/drivers/tty/serial/8250/8250_omap.c
+++ b/drivers/tty/serial/8250/8250_omap.c
@@ -786,8 +786,27 @@ static void __dma_rx_do_complete(struct uart_8250_port *p)
static void __dma_rx_complete(void *param)
{
- __dma_rx_do_complete(param);
- omap_8250_rx_dma(param);
+ struct uart_8250_port *p = param;
+ struct uart_8250_dma *dma = p->dma;
+ struct dma_tx_state state;
+ unsigned long flags;
+
+ spin_lock_irqsave(&p->port.lock, flags);
+
+ /*
+ * If the tx status is not DMA_COMPLETE, then this is a delayed
+ * completion callback. A previous RX timeout flush would have
+ * already pushed the data, so exit.
+ */
+ if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) !=
+ DMA_COMPLETE) {
+ spin_unlock_irqrestore(&p->port.lock, flags);
+ return;
+ }
+ __dma_rx_do_complete(p);
+ omap_8250_rx_dma(p);
+
+ spin_unlock_irqrestore(&p->port.lock, flags);
}
static void omap_8250_rx_dma_flush(struct uart_8250_port *p)
--
2.13.0
^ permalink raw reply related
* Re: [PATCH v5 0/4] tty/serial: meson_uart: add support for core clock handling
From: Greg KH @ 2017-06-20 2:51 UTC (permalink / raw)
To: Neil Armstrong
Cc: khilman-rdvid1DuHRBWk0Htik3J/w, hgkr.klein-Re5JQEeQqe8AvxtiuMwx3w,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <f4179b26-54fc-30ee-2d8d-7659349ccb74-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
On Mon, Jun 19, 2017 at 10:43:05AM +0200, Neil Armstrong wrote:
> On 06/14/2017 10:29 AM, Neil Armstrong wrote:
> > This patchset is a re-spin of Helmut Klein's v3 patchset at [0] and the v4 patchset at [1].
> >
> > Initially, the original patchset was made to enable usage on the non-AO UARTS
> > not enabled by the Bootloader (uart_B and uart_C), but the patchset needed
> > an overall change to have clean and stable DT bindings.
> >
> > The Amlogic Meson UART Driver did not have stable DT bindings and mismatched
> > clock handling on non-AO UARTs since these "EE" UARTs needs a clock gate to
> > be ungated to works correctly.
> > In the same way, the AO UARTs does not need gating and can be used as
> > Early Consoles.
> >
> > In the same time, the UART Interfaces can take clock input for the baudrate
> > generate from either the external Xtal or the internal Bus Clock (clk81).
> >
> > So new bindings was necessary to meet these requirements and the DT
> > maintainers requirements.
> >
> > The "legacy" binding actually used in the driver is left until all the DT
> > files are switched to the new bindings.
> >
> > The GX DT has been tested, but the last 4 Meson6/Meson8/b are only
> > compile-tested, and testing is welcome.
> > Thus only the first 3 patches can be merged until the Meson6/Meson8/b are
> > formally tested.
> >
> > It must be noted that the meson6 cannot work today except using an early
> > console since the UART driver could not probe without a clocks property.
> >
> > Changes since v4 at [1]:
> > - Droped meson8/meson8b DT patches
> > - Fixes copy/paste error in patch 2
> > - Refactored clock probing in patch 2
> > - merged meson6 patches together to avoid breaking bisect
> >
> > [0] http://lkml.kernel.org/r/20170331165437.26227-1-hgkr.klein-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> > [1] http://lkml.kernel.org/r/1497001756-942-1-git-send-email-narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org
> >
> > Helmut Klein (3):
> > dt-bindings: serial: Add bindings for the Amlogic Meson UARTs
> > tty/serial: meson_uart: update to stable bindings
> > ARM64: dts: meson-gx: use stable UART bindings with correct gate clock
> >
> > Neil Armstrong (1):
> > ARM: dts: meson6: use stable UART bindings
> >
> > .../bindings/serial/amlogic,meson-uart.txt | 38 +++++++++
> > arch/arm/boot/dts/meson.dtsi | 8 +-
> > arch/arm/boot/dts/meson6.dtsi | 28 +++++++
> > arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 12 ++-
> > arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 25 ++++++
> > arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 25 ++++++
> > drivers/tty/serial/meson_uart.c | 90 ++++++++++++++++++++--
> > 7 files changed, 209 insertions(+), 17 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt
> >
>
>
> Hi Greg,
>
> Patches 3 & 4 will need a respin to avoid breaking compatibility with old kernel
> like the tty patch does by keeping the legacy compatible string.
> I will re-send then in a separate thread and Kevin will handle them.
>
> Patches 1 & 2 can be taken if they are OK for you.
Looks good, now applied, thanks.
Feel free to resend the other two whenever you have them ready.
greg k-h
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^ permalink raw reply
* Re: [PATCH 03/11] au1100fb: remove a bogus dma_free_nonconsistent call
From: Bartlomiej Zolnierkiewicz @ 2017-06-19 11:15 UTC (permalink / raw)
To: Christoph Hellwig
Cc: linux-scsi, linux-serial, netdev, linux-metag, nios2-dev,
linux-fbdev, alsa-devel, linux-kernel
In-Reply-To: <20170616071716.17321-4-hch@lst.de>
On Friday, June 16, 2017 09:17:08 AM Christoph Hellwig wrote:
> au1100fb is using managed dma allocations, so it doesn't need to
> explicitly free the dma memory in the error path (and if it did
> it would have to use the managed version).
>
> Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
^ permalink raw reply
* Re: [PATCH v5 0/4] tty/serial: meson_uart: add support for core clock handling
From: Neil Armstrong @ 2017-06-19 8:43 UTC (permalink / raw)
To: gregkh, khilman
Cc: hgkr.klein, linux-serial, linux-amlogic, linux-arm-kernel,
linux-kernel, devicetree
In-Reply-To: <1497428957-19942-1-git-send-email-narmstrong@baylibre.com>
On 06/14/2017 10:29 AM, Neil Armstrong wrote:
> This patchset is a re-spin of Helmut Klein's v3 patchset at [0] and the v4 patchset at [1].
>
> Initially, the original patchset was made to enable usage on the non-AO UARTS
> not enabled by the Bootloader (uart_B and uart_C), but the patchset needed
> an overall change to have clean and stable DT bindings.
>
> The Amlogic Meson UART Driver did not have stable DT bindings and mismatched
> clock handling on non-AO UARTs since these "EE" UARTs needs a clock gate to
> be ungated to works correctly.
> In the same way, the AO UARTs does not need gating and can be used as
> Early Consoles.
>
> In the same time, the UART Interfaces can take clock input for the baudrate
> generate from either the external Xtal or the internal Bus Clock (clk81).
>
> So new bindings was necessary to meet these requirements and the DT
> maintainers requirements.
>
> The "legacy" binding actually used in the driver is left until all the DT
> files are switched to the new bindings.
>
> The GX DT has been tested, but the last 4 Meson6/Meson8/b are only
> compile-tested, and testing is welcome.
> Thus only the first 3 patches can be merged until the Meson6/Meson8/b are
> formally tested.
>
> It must be noted that the meson6 cannot work today except using an early
> console since the UART driver could not probe without a clocks property.
>
> Changes since v4 at [1]:
> - Droped meson8/meson8b DT patches
> - Fixes copy/paste error in patch 2
> - Refactored clock probing in patch 2
> - merged meson6 patches together to avoid breaking bisect
>
> [0] http://lkml.kernel.org/r/20170331165437.26227-1-hgkr.klein@gmail.com
> [1] http://lkml.kernel.org/r/1497001756-942-1-git-send-email-narmstrong@baylibre.com
>
> Helmut Klein (3):
> dt-bindings: serial: Add bindings for the Amlogic Meson UARTs
> tty/serial: meson_uart: update to stable bindings
> ARM64: dts: meson-gx: use stable UART bindings with correct gate clock
>
> Neil Armstrong (1):
> ARM: dts: meson6: use stable UART bindings
>
> .../bindings/serial/amlogic,meson-uart.txt | 38 +++++++++
> arch/arm/boot/dts/meson.dtsi | 8 +-
> arch/arm/boot/dts/meson6.dtsi | 28 +++++++
> arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 12 ++-
> arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 25 ++++++
> arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 25 ++++++
> drivers/tty/serial/meson_uart.c | 90 ++++++++++++++++++++--
> 7 files changed, 209 insertions(+), 17 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt
>
Hi Greg,
Patches 3 & 4 will need a respin to avoid breaking compatibility with old kernel
like the tty patch does by keeping the legacy compatible string.
I will re-send then in a separate thread and Kevin will handle them.
Patches 1 & 2 can be taken if they are OK for you.
Thanks,
Neil
^ permalink raw reply
* Re: [PATCH v5 3/4] ARM64: dts: meson-gx: use stable UART bindings with correct gate clock
From: Neil Armstrong @ 2017-06-19 8:40 UTC (permalink / raw)
To: Kevin Hilman
Cc: gregkh, Helmut Klein, linux-serial, linux-amlogic,
linux-arm-kernel, linux-kernel, devicetree
In-Reply-To: <m2vanvejlc.fsf@baylibre.com>
On 06/16/2017 10:57 PM, Kevin Hilman wrote:
> Neil Armstrong <narmstrong@baylibre.com> writes:
>
>> From: Helmut Klein <hgkr.klein@gmail.com>
>>
>> This patch switches to the stable UART bindings but also add the correct
>> gate clock to the non-AO UART nodes for GXBB and GXL SoCs.
>>
>> Acked-by: Jerome Brunet <jbrunet@baylibre.com>
>> Signed-off-by: Helmut Klein <hgkr.klein@gmail.com>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>> arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 12 +++++-------
>> arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 25 +++++++++++++++++++++++++
>> arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 25 +++++++++++++++++++++++++
>> 3 files changed, 55 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> index 603491d..86a4018 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> @@ -225,7 +225,7 @@
>> };
>>
>> uart_A: serial@84c0 {
>> - compatible = "amlogic,meson-uart";
>> + compatible = "amlogic,meson-gx-uart";
>
> IMO, we should keep both compatibles (the more specific one first.)
> That would allow new DTs to continue to run on older kernels.
>
> It would also allow this DT change to be completely independent of the
> driver changes. Otherwise, if I merge this before the driver change are
> merged, we'll have a bunch of boards with no more serial console output.
>
> Kevin
>
Hi Kevin,
Sure, no problem with that.
I'll push an update when the bindings + tty fixes are merged somewhere.
Neil
^ permalink raw reply
* Re: [PATCH] serial: 8250: 8250_omap: Fix race b/w dma completion and RX timeout
From: Vignesh R @ 2017-06-19 5:12 UTC (permalink / raw)
To: Andy Shevchenko, Greg Kroah-Hartman
Cc: Jiri Slaby, Peter Hurley, linux-serial, linux-omap, linux-kernel,
Tony Lindgren
In-Reply-To: <1497710243.22624.150.camel@linux.intel.com>
On Saturday 17 June 2017 08:07 PM, Andy Shevchenko wrote:
> On Sat, 2017-06-17 at 19:22 +0530, Vignesh R wrote:
>> DMA RX completion handler for UART is called from a tasklet and hence
>> may be delayed depending on the system load. In meanwhile, there may
>> be
>> RX timeout interrupt which can get serviced first before DMA RX
>> completion handler is executed for the completed transfer.
>> omap_8250_rx_dma_flush() which is called on RX timeout interrupt makes
>> sure that the DMA RX buffer is pushed and then the FIFO is drained and
>> also queues a new DMA request. But, when DMA RX completion handler
>> executes, it will erroneously flush the currently queued DMA transfer
>> which sometimes results in data corruption and double queueing of DMA
>> RX
>> requests.
>>
>> Fix this by checking whether RX completion is for the currently queued
>> transfer or not. And also hold port lock when in DMA completion to
>> avoid
>> race wrt RX timeout handler preempting it.
>
>
>> static void __dma_rx_complete(void *param)
>> {
>> - __dma_rx_do_complete(param);
>> - omap_8250_rx_dma(param);
>> + struct uart_8250_port *p = param;
>> + struct uart_8250_dma *dma = p->dma;
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&p->port.lock, flags);
>> +
>> + /*
>> + * If the completion is for the current cookie then handle
>> it,
>> + * else a previous RX timeout flush would have already pushed
>> + * data from DMA buffers, so exit.
>> + */
>
>> + if (dma->rx_cookie != dma->rxchan->completed_cookie) {
>
> Wouldn't be better to call DMAEngine API for that?
> dmaengine_tx_status() I suppose
Yeah, will update the patch. Thanks!
--
Regards
Vignesh
^ permalink raw reply
* Re: [PATCH v4 09/28] tty: serial: Add Actions Semi Owl UART earlycon
From: Andreas Färber @ 2017-06-19 2:26 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-arm-kernel, support, 张天益, 96boards,
linux-kernel, Thomas Liau, mp-cs, linux-serial, 刘炜,
Jiri Slaby, 张东风, Arnd Bergmann,
Olof Johansson, Alan Cox, Andy Shevchenko
In-Reply-To: <20170619021212.GA3195@kroah.com>
Am 19.06.2017 um 04:12 schrieb Greg Kroah-Hartman:
> On Mon, Jun 19, 2017 at 03:24:44AM +0200, Andreas Färber wrote:
>> Am 19.06.2017 um 03:16 schrieb Greg Kroah-Hartman:
>>> On Sun, Jun 18, 2017 at 11:45:28PM +0200, Andreas Färber wrote:
>>>> Am 06.06.2017 um 02:54 schrieb Andreas Färber:
>>>>> This implements an earlycon for Actions Semi S500/S900 SoCs.
>>>>>
>>>>> Based on LeMaker linux-actions tree.
>>>>>
>>>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>>>
>>>> The DT vendor prefix is applied to my linux-actions.git tree now, and
>>>> the serial binding has been ack'ed by Rob.
>>>>
>>>> Is there anything keeping you from adding this patch, the preceding DT
>>>> binding (08/28) and the following documentation patch (10/28) to your
>>>> tree for 4.13?
>>>
>>> Yeah, I don't have it in my queue anymore :)
>>>
>>> Can you resend it just as a single patch?
>>
>> Do you mean squash the documentation into this tty patch? As you wish.
>> But the DT binding is supposed to be a separate patch - I can queue it
>> in my tree if you prefer.
>
> No, just send me what ever you want me to apply to my tree. If you want
> me to pick some random patch out of the middle of a series, um, that's a
> bit hard for me to know what to do, right?
Well, I thought that would be obvious from subject, diff stat and CC...
Only dependencies were ARCH_ACTIONS and actions vendor prefix, which
should be in linux-next by tomorrow.
>
> Make it very very obvious please :)
I already resent the now two patches as v5 with you as only To.
Thanks,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply
* Re: [PATCH v4 09/28] tty: serial: Add Actions Semi Owl UART earlycon
From: Greg Kroah-Hartman @ 2017-06-19 2:12 UTC (permalink / raw)
To: Andreas Färber
Cc: linux-arm-kernel, support, 张天益, 96boards,
linux-kernel, Thomas Liau, mp-cs, linux-serial, 刘炜,
Jiri Slaby, 张东风, Arnd Bergmann,
Olof Johansson, Alan Cox, Andy Shevchenko
In-Reply-To: <7fff8813-cea4-0530-bf7b-3d0ad50d6e93@suse.de>
On Mon, Jun 19, 2017 at 03:24:44AM +0200, Andreas Färber wrote:
> Am 19.06.2017 um 03:16 schrieb Greg Kroah-Hartman:
> > On Sun, Jun 18, 2017 at 11:45:28PM +0200, Andreas Färber wrote:
> >> Greg,
> >>
> >> Am 06.06.2017 um 02:54 schrieb Andreas Färber:
> >>> This implements an earlycon for Actions Semi S500/S900 SoCs.
> >>>
> >>> Based on LeMaker linux-actions tree.
> >>>
> >>> Signed-off-by: Andreas Färber <afaerber@suse.de>
> >>
> >> The DT vendor prefix is applied to my linux-actions.git tree now, and
> >> the serial binding has been ack'ed by Rob.
> >>
> >> Is there anything keeping you from adding this patch, the preceding DT
> >> binding (08/28) and the following documentation patch (10/28) to your
> >> tree for 4.13?
> >
> > Yeah, I don't have it in my queue anymore :)
> >
> > Can you resend it just as a single patch?
>
> Do you mean squash the documentation into this tty patch? As you wish.
> But the DT binding is supposed to be a separate patch - I can queue it
> in my tree if you prefer.
No, just send me what ever you want me to apply to my tree. If you want
me to pick some random patch out of the middle of a series, um, that's a
bit hard for me to know what to do, right?
Make it very very obvious please :)
thanks,
greg k-h
^ permalink raw reply
* [PATCH v5 08/26] tty: serial: Add Actions Semi Owl UART earlycon
From: Andreas Färber @ 2017-06-19 1:46 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-arm-kernel, mp-cs, Thomas Liau, 张东风,
刘炜, 张天益, 96boards, support,
linux-kernel, Andreas Färber, Jonathan Corbet, Jiri Slaby,
linux-doc, linux-serial
In-Reply-To: <20170619014640.6829-1-afaerber@suse.de>
This implements an earlycon for Actions Semi S500/S900 SoCs.
Based on LeMaker linux-actions tree.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
v4 -> v5:
* Squashed documentation (Greg)
v3 -> v4: Unchanged
v2 -> v3:
* Adopted BIT() macro
v1 -> v2:
* Extended Kconfig help to mention earlycon (Arnd)
* Spelled out Actions Semiconductor in Kconfig help
* Adopted "actions" vendor prefix
Documentation/admin-guide/kernel-parameters.txt | 6 ++
drivers/tty/serial/Kconfig | 19 ++++
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/owl-uart.c | 135 ++++++++++++++++++++++++
4 files changed, 161 insertions(+)
create mode 100644 drivers/tty/serial/owl-uart.c
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index fb311bdccb7b..cc8a6bfcb299 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -961,6 +961,12 @@
must already be setup and configured. Options are not
yet supported.
+ owl,<addr>
+ Start an early, polled-mode console on a serial port
+ of an Actions Semi SoC, such as S500 or S900, at the
+ specified address. The serial port must already be
+ setup and configured. Options are not yet supported.
+
smh Use ARM semihosting calls for early console.
s3c2410,<addr>
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 07812a7ea2a4..1f096e2bb398 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1688,6 +1688,25 @@ config SERIAL_MVEBU_CONSOLE
and warnings and which allows logins in single user mode)
Otherwise, say 'N'.
+config SERIAL_OWL
+ bool "Actions Semi Owl serial port support"
+ depends on ARCH_ACTIONS || COMPILE_TEST
+ select SERIAL_CORE
+ help
+ This driver is for Actions Semiconductor S500/S900 SoC's UART.
+ Say 'Y' here if you wish to use the on-board serial port.
+ Otherwise, say 'N'.
+
+config SERIAL_OWL_CONSOLE
+ bool "Console on Actions Semi Owl serial port"
+ depends on SERIAL_OWL=y
+ select SERIAL_CORE_CONSOLE
+ select SERIAL_EARLYCON
+ default y
+ help
+ Say 'Y' here if you wish to use Actions Semiconductor S500/S900 UART
+ as the system console. Only earlycon is implemented currently.
+
endmenu
config SERIAL_MCTRL_GPIO
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index 53c03e005132..fe88a75d9a59 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -92,6 +92,7 @@ obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
obj-$(CONFIG_SERIAL_PIC32) += pic32_uart.o
obj-$(CONFIG_SERIAL_MPS2_UART) += mps2-uart.o
+obj-$(CONFIG_SERIAL_OWL) += owl-uart.o
# GPIOLIB helpers for modem control lines
obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
diff --git a/drivers/tty/serial/owl-uart.c b/drivers/tty/serial/owl-uart.c
new file mode 100644
index 000000000000..1b8008797a1b
--- /dev/null
+++ b/drivers/tty/serial/owl-uart.c
@@ -0,0 +1,135 @@
+/*
+ * Actions Semi Owl family serial console
+ *
+ * Copyright 2013 Actions Semi Inc.
+ * Author: Actions Semi, Inc.
+ *
+ * Copyright (c) 2016-2017 Andreas Färber
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+
+#define OWL_UART_CTL 0x000
+#define OWL_UART_TXDAT 0x008
+#define OWL_UART_STAT 0x00c
+
+#define OWL_UART_CTL_TRFS_TX BIT(14)
+#define OWL_UART_CTL_EN BIT(15)
+#define OWL_UART_CTL_RXIE BIT(18)
+#define OWL_UART_CTL_TXIE BIT(19)
+
+#define OWL_UART_STAT_RIP BIT(0)
+#define OWL_UART_STAT_TIP BIT(1)
+#define OWL_UART_STAT_TFFU BIT(6)
+#define OWL_UART_STAT_TRFL_MASK (0x1f << 11)
+#define OWL_UART_STAT_UTBB BIT(17)
+
+static inline void owl_uart_write(struct uart_port *port, u32 val, unsigned int off)
+{
+ writel(val, port->membase + off);
+}
+
+static inline u32 owl_uart_read(struct uart_port *port, unsigned int off)
+{
+ return readl(port->membase + off);
+}
+
+#ifdef CONFIG_SERIAL_OWL_CONSOLE
+
+static void owl_console_putchar(struct uart_port *port, int ch)
+{
+ if (!port->membase)
+ return;
+
+ while (owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TFFU)
+ cpu_relax();
+
+ owl_uart_write(port, ch, OWL_UART_TXDAT);
+}
+
+static void owl_uart_port_write(struct uart_port *port, const char *s,
+ u_int count)
+{
+ u32 old_ctl, val;
+ unsigned long flags;
+ int locked;
+
+ local_irq_save(flags);
+
+ if (port->sysrq)
+ locked = 0;
+ else if (oops_in_progress)
+ locked = spin_trylock(&port->lock);
+ else {
+ spin_lock(&port->lock);
+ locked = 1;
+ }
+
+ old_ctl = owl_uart_read(port, OWL_UART_CTL);
+ val = old_ctl | OWL_UART_CTL_TRFS_TX;
+ /* disable IRQ */
+ val &= ~(OWL_UART_CTL_RXIE | OWL_UART_CTL_TXIE);
+ owl_uart_write(port, val, OWL_UART_CTL);
+
+ uart_console_write(port, s, count, owl_console_putchar);
+
+ /* wait until all contents have been sent out */
+ while (owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TRFL_MASK)
+ cpu_relax();
+
+ /* clear IRQ pending */
+ val = owl_uart_read(port, OWL_UART_STAT);
+ val |= OWL_UART_STAT_TIP | OWL_UART_STAT_RIP;
+ owl_uart_write(port, val, OWL_UART_STAT);
+
+ owl_uart_write(port, old_ctl, OWL_UART_CTL);
+
+ if (locked)
+ spin_unlock(&port->lock);
+
+ local_irq_restore(flags);
+}
+
+static void owl_uart_early_console_write(struct console *co,
+ const char *s,
+ u_int count)
+{
+ struct earlycon_device *dev = co->data;
+
+ owl_uart_port_write(&dev->port, s, count);
+}
+
+static int __init
+owl_uart_early_console_setup(struct earlycon_device *device, const char *opt)
+{
+ if (!device->port.membase)
+ return -ENODEV;
+
+ device->con->write = owl_uart_early_console_write;
+
+ return 0;
+}
+OF_EARLYCON_DECLARE(owl, "actions,owl-uart",
+ owl_uart_early_console_setup);
+
+#endif /* CONFIG_SERIAL_OWL_CONSOLE */
--
2.12.3
^ permalink raw reply related
* [PATCH v5 07/26] dt-bindings: serial: Document Actions Semi Owl UARTs
From: Andreas Färber @ 2017-06-19 1:46 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
mp-cs-/sSyCTpAT0ql5r2w9Jh5Rg, Thomas Liau,
张东风, 刘炜,
张天益, 96boards-Ty1hIZOCd2XuufBYgWm87A,
support-8Vy/tIz7429AfugRpC6u6w,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Andreas Färber,
Rob Herring, Mark Rutland, linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <7fff8813-cea4-0530-bf7b-3d0ad50d6e93-l3A5Bk7waGM@public.gmane.org>
This UART is found on S500 and S900 SoCs.
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Signed-off-by: Andreas Färber <afaerber-l3A5Bk7waGM@public.gmane.org>
---
v2 -> v3 -> v4 -> v5: Unchanged
v1 -> v2:
* Adopted "actions" vendor prefix
.../devicetree/bindings/serial/actions,owl-uart.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/actions,owl-uart.txt
diff --git a/Documentation/devicetree/bindings/serial/actions,owl-uart.txt b/Documentation/devicetree/bindings/serial/actions,owl-uart.txt
new file mode 100644
index 000000000000..aa873eada02d
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/actions,owl-uart.txt
@@ -0,0 +1,16 @@
+Actions Semi Owl UART
+
+Required properties:
+- compatible : "actions,s500-uart", "actions,owl-uart" for S500
+ "actions,s900-uart", "actions,owl-uart" for S900
+- reg : Offset and length of the register set for the device.
+- interrupts : Should contain UART interrupt.
+
+
+Example:
+
+ uart3: serial@b0126000 {
+ compatible = "actions,s500-uart", "actions,owl-uart";
+ reg = <0xb0126000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.12.3
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* Re: [PATCH v4 09/28] tty: serial: Add Actions Semi Owl UART earlycon
From: Andreas Färber @ 2017-06-19 1:24 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-arm-kernel, support, 张天益, 96boards,
linux-kernel, Thomas Liau, mp-cs, linux-serial, 刘炜,
Jiri Slaby, 张东风, Arnd Bergmann,
Olof Johansson, Alan Cox, Andy Shevchenko
In-Reply-To: <20170619011627.GB11287@kroah.com>
Am 19.06.2017 um 03:16 schrieb Greg Kroah-Hartman:
> On Sun, Jun 18, 2017 at 11:45:28PM +0200, Andreas Färber wrote:
>> Greg,
>>
>> Am 06.06.2017 um 02:54 schrieb Andreas Färber:
>>> This implements an earlycon for Actions Semi S500/S900 SoCs.
>>>
>>> Based on LeMaker linux-actions tree.
>>>
>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>
>> The DT vendor prefix is applied to my linux-actions.git tree now, and
>> the serial binding has been ack'ed by Rob.
>>
>> Is there anything keeping you from adding this patch, the preceding DT
>> binding (08/28) and the following documentation patch (10/28) to your
>> tree for 4.13?
>
> Yeah, I don't have it in my queue anymore :)
>
> Can you resend it just as a single patch?
Do you mean squash the documentation into this tty patch? As you wish.
But the DT binding is supposed to be a separate patch - I can queue it
in my tree if you prefer.
Cheers,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply
* Re: [PATCH v4 09/28] tty: serial: Add Actions Semi Owl UART earlycon
From: Greg Kroah-Hartman @ 2017-06-19 1:16 UTC (permalink / raw)
To: Andreas Färber
Cc: linux-arm-kernel, support, 张天益, 96boards,
linux-kernel, Thomas Liau, mp-cs, linux-serial, 刘炜,
Jiri Slaby, 张东风, Arnd Bergmann,
Olof Johansson, Alan Cox, Andy Shevchenko
In-Reply-To: <55059fdd-5c54-ee6c-3e63-b5a9035c1745@suse.de>
On Sun, Jun 18, 2017 at 11:45:28PM +0200, Andreas Färber wrote:
> Greg,
>
> Am 06.06.2017 um 02:54 schrieb Andreas Färber:
> > This implements an earlycon for Actions Semi S500/S900 SoCs.
> >
> > Based on LeMaker linux-actions tree.
> >
> > Signed-off-by: Andreas Färber <afaerber@suse.de>
> > ---
> > v3 -> v4: Unchanged
> >
> > v2 -> v3:
> > * Adopted BIT() macro
> >
> > v1 -> v2:
> > * Extended Kconfig help to mention earlycon (Arnd)
> > * Spelled out Actions Semiconductor in Kconfig help
> > * Adopted "actions" vendor prefix
> >
> > drivers/tty/serial/Kconfig | 19 ++++++
> > drivers/tty/serial/Makefile | 1 +
> > drivers/tty/serial/owl-uart.c | 135 ++++++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 155 insertions(+)
> > create mode 100644 drivers/tty/serial/owl-uart.c
>
> The DT vendor prefix is applied to my linux-actions.git tree now, and
> the serial binding has been ack'ed by Rob.
>
> Is there anything keeping you from adding this patch, the preceding DT
> binding (08/28) and the following documentation patch (10/28) to your
> tree for 4.13?
Yeah, I don't have it in my queue anymore :)
Can you resend it just as a single patch?
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH v4 09/28] tty: serial: Add Actions Semi Owl UART earlycon
From: Andreas Färber @ 2017-06-18 21:45 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-arm-kernel, support, 张天益, 96boards,
linux-kernel, Thomas Liau, mp-cs, linux-serial, 刘炜,
Jiri Slaby, 张东风, Arnd Bergmann,
Olof Johansson, Alan Cox, Andy Shevchenko
In-Reply-To: <20170606005426.26446-10-afaerber@suse.de>
Greg,
Am 06.06.2017 um 02:54 schrieb Andreas Färber:
> This implements an earlycon for Actions Semi S500/S900 SoCs.
>
> Based on LeMaker linux-actions tree.
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
> v3 -> v4: Unchanged
>
> v2 -> v3:
> * Adopted BIT() macro
>
> v1 -> v2:
> * Extended Kconfig help to mention earlycon (Arnd)
> * Spelled out Actions Semiconductor in Kconfig help
> * Adopted "actions" vendor prefix
>
> drivers/tty/serial/Kconfig | 19 ++++++
> drivers/tty/serial/Makefile | 1 +
> drivers/tty/serial/owl-uart.c | 135 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 155 insertions(+)
> create mode 100644 drivers/tty/serial/owl-uart.c
The DT vendor prefix is applied to my linux-actions.git tree now, and
the serial binding has been ack'ed by Rob.
Is there anything keeping you from adding this patch, the preceding DT
binding (08/28) and the following documentation patch (10/28) to your
tree for 4.13?
The full serial driver (16/28) needs another spin and may miss 4.13, but
earlycon would prove the rest is working.
Thanks,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply
* Re: [PATCH v5 1/4] dt-bindings: serial: Add bindings for the Amlogic Meson UARTs
From: Rob Herring @ 2017-06-18 14:05 UTC (permalink / raw)
To: Neil Armstrong
Cc: gregkh, khilman, Helmut Klein, linux-serial, linux-amlogic,
linux-arm-kernel, linux-kernel, devicetree
In-Reply-To: <1497428957-19942-2-git-send-email-narmstrong@baylibre.com>
On Wed, Jun 14, 2017 at 10:29:14AM +0200, Neil Armstrong wrote:
> From: Helmut Klein <hgkr.klein@gmail.com>
>
> Add the documentation for the device tree binding of Amlogic Meson Serial UART.
>
> Signed-off-by: Helmut Klein <hgkr.klein@gmail.com>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> .../bindings/serial/amlogic,meson-uart.txt | 38 ++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH] serial: 8250: 8250_omap: Fix race b/w dma completion and RX timeout
From: Andy Shevchenko @ 2017-06-17 14:37 UTC (permalink / raw)
To: Vignesh R, Greg Kroah-Hartman
Cc: Jiri Slaby, Peter Hurley, linux-serial, linux-omap, linux-kernel,
Tony Lindgren
In-Reply-To: <20170617135224.31675-1-vigneshr@ti.com>
On Sat, 2017-06-17 at 19:22 +0530, Vignesh R wrote:
> DMA RX completion handler for UART is called from a tasklet and hence
> may be delayed depending on the system load. In meanwhile, there may
> be
> RX timeout interrupt which can get serviced first before DMA RX
> completion handler is executed for the completed transfer.
> omap_8250_rx_dma_flush() which is called on RX timeout interrupt makes
> sure that the DMA RX buffer is pushed and then the FIFO is drained and
> also queues a new DMA request. But, when DMA RX completion handler
> executes, it will erroneously flush the currently queued DMA transfer
> which sometimes results in data corruption and double queueing of DMA
> RX
> requests.
>
> Fix this by checking whether RX completion is for the currently queued
> transfer or not. And also hold port lock when in DMA completion to
> avoid
> race wrt RX timeout handler preempting it.
> static void __dma_rx_complete(void *param)
> {
> - __dma_rx_do_complete(param);
> - omap_8250_rx_dma(param);
> + struct uart_8250_port *p = param;
> + struct uart_8250_dma *dma = p->dma;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&p->port.lock, flags);
> +
> + /*
> + * If the completion is for the current cookie then handle
> it,
> + * else a previous RX timeout flush would have already pushed
> + * data from DMA buffers, so exit.
> + */
> + if (dma->rx_cookie != dma->rxchan->completed_cookie) {
Wouldn't be better to call DMAEngine API for that?
dmaengine_tx_status() I suppose
> + spin_unlock_irqrestore(&p->port.lock, flags);
> + return;
> + }
> + __dma_rx_do_complete(p);
> + omap_8250_rx_dma(p);
> +
> + spin_unlock_irqrestore(&p->port.lock, flags);
> }
>
> static void omap_8250_rx_dma_flush(struct uart_8250_port *p)
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
^ permalink raw reply
* [PATCH] serial: 8250: 8250_omap: Fix race b/w dma completion and RX timeout
From: Vignesh R @ 2017-06-17 13:52 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Jiri Slaby, Peter Hurley, Vignesh R, Andy Shevchenko,
linux-serial, linux-omap, linux-kernel, Tony Lindgren
DMA RX completion handler for UART is called from a tasklet and hence
may be delayed depending on the system load. In meanwhile, there may be
RX timeout interrupt which can get serviced first before DMA RX
completion handler is executed for the completed transfer.
omap_8250_rx_dma_flush() which is called on RX timeout interrupt makes
sure that the DMA RX buffer is pushed and then the FIFO is drained and
also queues a new DMA request. But, when DMA RX completion handler
executes, it will erroneously flush the currently queued DMA transfer
which sometimes results in data corruption and double queueing of DMA RX
requests.
Fix this by checking whether RX completion is for the currently queued
transfer or not. And also hold port lock when in DMA completion to avoid
race wrt RX timeout handler preempting it.
Signed-off-by: Vignesh R <vigneshr@ti.com>
---
Tested on AM335x, AM437x, DRA74x EVM with lockdep enabled.
drivers/tty/serial/8250/8250_omap.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
index d81bac98d190..f418808a2062 100644
--- a/drivers/tty/serial/8250/8250_omap.c
+++ b/drivers/tty/serial/8250/8250_omap.c
@@ -786,8 +786,25 @@ static void __dma_rx_do_complete(struct uart_8250_port *p)
static void __dma_rx_complete(void *param)
{
- __dma_rx_do_complete(param);
- omap_8250_rx_dma(param);
+ struct uart_8250_port *p = param;
+ struct uart_8250_dma *dma = p->dma;
+ unsigned long flags;
+
+ spin_lock_irqsave(&p->port.lock, flags);
+
+ /*
+ * If the completion is for the current cookie then handle it,
+ * else a previous RX timeout flush would have already pushed
+ * data from DMA buffers, so exit.
+ */
+ if (dma->rx_cookie != dma->rxchan->completed_cookie) {
+ spin_unlock_irqrestore(&p->port.lock, flags);
+ return;
+ }
+ __dma_rx_do_complete(p);
+ omap_8250_rx_dma(p);
+
+ spin_unlock_irqrestore(&p->port.lock, flags);
}
static void omap_8250_rx_dma_flush(struct uart_8250_port *p)
--
2.13.0
^ permalink raw reply related
* Re: [PATCH v5 3/4] ARM64: dts: meson-gx: use stable UART bindings with correct gate clock
From: Kevin Hilman @ 2017-06-16 20:57 UTC (permalink / raw)
To: Neil Armstrong
Cc: gregkh, Helmut Klein, linux-serial, linux-amlogic,
linux-arm-kernel, linux-kernel, devicetree
In-Reply-To: <1497428957-19942-4-git-send-email-narmstrong@baylibre.com>
Neil Armstrong <narmstrong@baylibre.com> writes:
> From: Helmut Klein <hgkr.klein@gmail.com>
>
> This patch switches to the stable UART bindings but also add the correct
> gate clock to the non-AO UART nodes for GXBB and GXL SoCs.
>
> Acked-by: Jerome Brunet <jbrunet@baylibre.com>
> Signed-off-by: Helmut Klein <hgkr.klein@gmail.com>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 12 +++++-------
> arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 25 +++++++++++++++++++++++++
> arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 25 +++++++++++++++++++++++++
> 3 files changed, 55 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> index 603491d..86a4018 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> @@ -225,7 +225,7 @@
> };
>
> uart_A: serial@84c0 {
> - compatible = "amlogic,meson-uart";
> + compatible = "amlogic,meson-gx-uart";
IMO, we should keep both compatibles (the more specific one first.)
That would allow new DTs to continue to run on older kernels.
It would also allow this DT change to be completely independent of the
driver changes. Otherwise, if I merge this before the driver change are
merged, we'll have a bunch of boards with no more serial console output.
Kevin
^ permalink raw reply
* Re: [PATCH v2] serial: Delete dead code for CIR serial ports
From: Andy Shevchenko @ 2017-06-16 17:39 UTC (permalink / raw)
To: Matthias Brugger
Cc: Greg Kroah-Hartman, Jiri Slaby, Andy Shevchenko, Ed Blake,
Vignesh R, Alexander Sverdlin, Yegor Yefremov, David Howells,
linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <20170616151714.30835-1-mbrugger@suse.com>
On Fri, Jun 16, 2017 at 6:17 PM, Matthias Brugger <mbrugger@suse.com> wrote:
> Commit e4fda3a04275 ("serial: don't register CIR serial ports") adds a
> check for PORT_8250_CIR to serial8250_register_8250_port(). But the code
> isn't needed as the function never takes the branch when the port is CIR
> serial port.
>
> This patch deletes the dead code.
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
One comment below.
>
> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
> ---
> drivers/tty/serial/8250/8250_core.c | 23 ++++++-----------------
> 1 file changed, 6 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
> index 1aab3010fbfa..b5def356af63 100644
> --- a/drivers/tty/serial/8250/8250_core.c
> +++ b/drivers/tty/serial/8250/8250_core.c
> @@ -1043,24 +1043,13 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
> if (up->dl_write)
> uart->dl_write = up->dl_write;
>
> - if (uart->port.type != PORT_8250_CIR) {
> - if (serial8250_isa_config != NULL)
> - serial8250_isa_config(0, &uart->port,
> - &uart->capabilities);
> -
> - ret = uart_add_one_port(&serial8250_reg,
> - &uart->port);
> - if (ret == 0)
> - ret = uart->port.line;
> - } else {
> - dev_info(uart->port.dev,
> - "skipping CIR port at 0x%lx / 0x%llx, IRQ %d\n",
> - uart->port.iobase,
> - (unsigned long long)uart->port.mapbase,
> - uart->port.irq);
> + if (serial8250_isa_config != NULL)
> + serial8250_isa_config(0, &uart->port,
> + &uart->capabilities);
If it exceeds 80 by ~3 characters it's still okay from my p.o.v.
Nevertheless, it's your choice.
>
> - ret = 0;
> - }
> + ret = uart_add_one_port(&serial8250_reg, &uart->port);
> + if (ret == 0)
> + ret = uart->port.line;
> }
> mutex_unlock(&serial_mutex);
>
> --
> 2.12.3
>
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v2] serial: Delete dead code for CIR serial ports
From: Matthias Brugger @ 2017-06-16 15:17 UTC (permalink / raw)
To: gregkh, jslaby
Cc: andriy.shevchenko, ed.blake, vigneshr, alexander.sverdlin,
yegorslists, mbrugger, dhowells, linux-serial, linux-kernel
Commit e4fda3a04275 ("serial: don't register CIR serial ports") adds a
check for PORT_8250_CIR to serial8250_register_8250_port(). But the code
isn't needed as the function never takes the branch when the port is CIR
serial port.
This patch deletes the dead code.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
drivers/tty/serial/8250/8250_core.c | 23 ++++++-----------------
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 1aab3010fbfa..b5def356af63 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -1043,24 +1043,13 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
if (up->dl_write)
uart->dl_write = up->dl_write;
- if (uart->port.type != PORT_8250_CIR) {
- if (serial8250_isa_config != NULL)
- serial8250_isa_config(0, &uart->port,
- &uart->capabilities);
-
- ret = uart_add_one_port(&serial8250_reg,
- &uart->port);
- if (ret == 0)
- ret = uart->port.line;
- } else {
- dev_info(uart->port.dev,
- "skipping CIR port at 0x%lx / 0x%llx, IRQ %d\n",
- uart->port.iobase,
- (unsigned long long)uart->port.mapbase,
- uart->port.irq);
+ if (serial8250_isa_config != NULL)
+ serial8250_isa_config(0, &uart->port,
+ &uart->capabilities);
- ret = 0;
- }
+ ret = uart_add_one_port(&serial8250_reg, &uart->port);
+ if (ret == 0)
+ ret = uart->port.line;
}
mutex_unlock(&serial_mutex);
--
2.12.3
^ permalink raw reply related
* Re: [PATCH] serial: Delete dead code for CIR serial ports
From: Matthias Brugger @ 2017-06-16 15:13 UTC (permalink / raw)
To: Andy Shevchenko, gregkh, jslaby
Cc: ed.blake, vigneshr, alexander.sverdlin, yegorslists, dhowells,
linux-serial, linux-kernel
In-Reply-To: <1497613434.22624.145.camel@linux.intel.com>
On 16/06/17 13:43, Andy Shevchenko wrote:
> On Thu, 2017-06-15 at 17:54 +0200, Matthias Brugger wrote:
>> Commit e4fda3a04275 ("serial: don't register CIR serial ports") adds a
>> check for PORT_8250_CIR to serial8250_register_8250_port(). But the
>> code
>> isn't needed as the function never takes the branch when the port is
>> CIR
>> serial port.
>
>> + if (serial8250_isa_config != NULL)
>
>> + serial8250_isa_config(0, &uart->port,
>> + &uart->capabilities);
>
> Can't it be one line after all?
>
No, that will exceed the 80 characters by line.
>>
>
>> + ret = uart_add_one_port(&serial8250_reg,
>> + &uart->port);
>
> Ditto.
>
Yes, I'll fix this in v2.
Thanks,
Matthias
^ permalink raw reply
* Re: [PATCH v3 2/2] arm64: dts: Add Mediatek SoC MT2712 and evaluation board dts and Makefile
From: Matthias Brugger @ 2017-06-16 14:33 UTC (permalink / raw)
To: YT Shen, Rob Herring
Cc: Mark Rutland, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Greg Kroah-Hartman, Catalin Marinas, Will Deacon, Mars Cheng,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w
In-Reply-To: <1497620721-61444-3-git-send-email-yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
On 16/06/17 15:45, YT Shen wrote:
> This adds basic chip support for Mediatek 2712
>
> Signed-off-by: YT Shen <yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 32 ++++++
> arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 166 ++++++++++++++++++++++++++++
> 3 files changed, 199 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt2712-evb.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt2712e.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> index 9fbfd32..fcc0604 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -1,3 +1,4 @@
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
> new file mode 100644
> index 0000000..8c804df
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
> @@ -0,0 +1,32 @@
> +/*
> + * Copyright (c) 2017 MediaTek Inc.
> + * Author: YT Shen <yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> + *
> + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
> + */
> +
> +/dts-v1/;
> +#include "mt2712e.dtsi"
> +
> +/ {
> + model = "MediaTek MT2712 evaluation board";
> + compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0 0x40000000 0 0x80000000>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:921600n8";
> + };
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> new file mode 100644
> index 0000000..65cdd4a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> @@ -0,0 +1,166 @@
[...]
> +
> + uart_clk: dummy26m {
> + compatible = "fixed-clock";
> + clock-frequency = <26000000>;
> + #clock-cells = <0>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13
> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14
> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11
> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10
> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges;
> +
> + uart5: serial@1000f000 {
> + compatible = "mediatek,mt2712-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x1000f000 0 0x400>;
> + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
uart has two clocks, baud and bus clock. Please refer to the bindings
descrption for more information, that's what they are for.
Please define the two dummy clocks with the correct frequency and use them.
Regards,
Matthias
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^ permalink raw reply
* [PATCH v3 2/2] arm64: dts: Add Mediatek SoC MT2712 and evaluation board dts and Makefile
From: YT Shen @ 2017-06-16 13:45 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger
Cc: Mark Rutland, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Greg Kroah-Hartman, Catalin Marinas, Will Deacon, Mars Cheng,
YT Shen, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w
In-Reply-To: <1497620721-61444-1-git-send-email-yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
This adds basic chip support for Mediatek 2712
Signed-off-by: YT Shen <yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 32 ++++++
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 166 ++++++++++++++++++++++++++++
3 files changed, 199 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt2712-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt2712e.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index 9fbfd32..fcc0604 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -1,3 +1,4 @@
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
new file mode 100644
index 0000000..8c804df
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: YT Shen <yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
+ *
+ * SPDX-License-Identifier: (GPL-2.0 OR MIT)
+ */
+
+/dts-v1/;
+#include "mt2712e.dtsi"
+
+/ {
+ model = "MediaTek MT2712 evaluation board";
+ compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0x80000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
new file mode 100644
index 0000000..65cdd4a
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -0,0 +1,166 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: YT Shen <yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
+ *
+ * SPDX-License-Identifier: (GPL-2.0 OR MIT)
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "mediatek,mt2712";
+ interrupt-parent = <&sysirq>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&cpu2>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x000>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x200>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ uart_clk: dummy26m {
+ compatible = "fixed-clock";
+ clock-frequency = <26000000>;
+ #clock-cells = <0>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges;
+
+ uart5: serial@1000f000 {
+ compatible = "mediatek,mt2712-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x1000f000 0 0x400>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ status = "disabled";
+ };
+
+ sysirq: interrupt-controller@10220a80 {
+ compatible = "mediatek,mt2712-sysirq",
+ "mediatek,mt6577-sysirq";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ reg = <0 0x10220a80 0 0x40>;
+ };
+
+ gic: interrupt-controller@10510000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ reg = <0 0x10510000 0 0x10000>,
+ <0 0x10520000 0 0x20000>,
+ <0 0x10540000 0 0x20000>,
+ <0 0x10560000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ uart0: serial@11002000 {
+ compatible = "mediatek,mt2712-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11002000 0 0x400>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ status = "disabled";
+ };
+
+ uart1: serial@11003000 {
+ compatible = "mediatek,mt2712-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11003000 0 0x400>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ status = "disabled";
+ };
+
+ uart2: serial@11004000 {
+ compatible = "mediatek,mt2712-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11004000 0 0x400>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ status = "disabled";
+ };
+
+ uart3: serial@11005000 {
+ compatible = "mediatek,mt2712-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11005000 0 0x400>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ status = "disabled";
+ };
+
+ uart4: serial@11019000 {
+ compatible = "mediatek,mt2712-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11019000 0 0x400>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ status = "disabled";
+ };
+ };
+};
+
--
1.9.1
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