* Re: [PATCH v5 2/2] arm64: dts: Add Mediatek SoC MT2712 and evaluation board dts and Makefile
From: YT Shen @ 2017-08-04 11:49 UTC (permalink / raw)
To: Matthias Brugger
Cc: Yingjoe Chen, Rob Herring, Mark Rutland, devicetree, Jason Cooper,
srv_heupstream, Marc Zyngier, Catalin Marinas, Will Deacon,
linux-kernel, Mars Cheng, linux-serial, Greg Kroah-Hartman,
linux-mediatek, Thomas Gleixner, linux-arm-kernel
In-Reply-To: <85f5d713-a599-e4cc-f1b4-2e0dedf2797f@gmail.com>
On Tue, 2017-08-01 at 14:46 +0200, Matthias Brugger wrote:
>
> On 08/01/2017 10:51 AM, Yingjoe Chen wrote:
> > On Fri, 2017-07-28 at 19:37 +0800, YT Shen wrote:
> >> diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> >> new file mode 100644
> >> index 0000000..1e135af
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> >
> > <...>
> >
> >> + timer {
> >> + compatible = "arm,armv8-timer";
> >> + interrupt-parent = <&gic>;
> >> + interrupts = <GIC_PPI 13
> >> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> >> + <GIC_PPI 14
> >> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> >> + <GIC_PPI 11
> >> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> >> + <GIC_PPI 10
> >> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>;
> >> + };
> >> +
> >> + soc {
> >> + #address-cells = <2>;
> >> + #size-cells = <2>;
> >> + compatible = "simple-bus";
> >> + ranges;
> >
> > Matthias,
> >
> > I notice this have soc node.
> > Do we need to get rid of it?
> >
>
> Good catch. Yes please get rid of it. We should avoid artificial bus nodes. As
> soc is no real bus, we should get rid of it.
OK, we will remove the soc node and send a new version.
Thanks.
>
> Thanks,
> Matthias
^ permalink raw reply
* Re: [PATCH 3/3] tty/serial/8250: add DT bindings description for mctrl_gpio helpers
From: Rob Herring @ 2017-08-03 22:26 UTC (permalink / raw)
To: yegorslists-gM/Ye1E23mwN+BqQ9rBEUg
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA, jslaby-IBi9RG/b67k,
tony-4v6yS6AI5VpBDgjK7y7TUQ,
mika.westerberg-VuQAYsv1563Yd54FQh9/CA,
uwe-rXY34ruvC2xidJT2blvkqNi2O/JbrIOy,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1501161456-13367-4-git-send-email-yegorslists-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
On Thu, Jul 27, 2017 at 03:17:36PM +0200, yegorslists-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org wrote:
> From: Yegor Yefremov <yegorslists-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
>
> Describe {rts,cts,dtr,dsr,rng,dcd}-gpios usage.
>
> Cc: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> Signed-off-by: Yegor Yefremov <yegorslists-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
> ---
> Documentation/devicetree/bindings/serial/8250.txt | 26 +++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt
> index 419ff6c..1c09db2 100644
> --- a/Documentation/devicetree/bindings/serial/8250.txt
> +++ b/Documentation/devicetree/bindings/serial/8250.txt
> @@ -48,6 +48,16 @@ Optional properties:
> - tx-threshold: Specify the TX FIFO low water indication for parts with
> programmable TX FIFO thresholds.
> - resets : phandle + reset specifier pairs
> +- rts-gpios:
> +- cts-gpios:
> +- dtr-gpios:
> +- dsr-gpios:
> +- rng-gpios:
> +- dcd-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
> + line respectively. It will use specified GPIO instead of the peripheral
> + function pin for the UART feature. If unsure, don't specify this property.
These are already described in serial.txt.
> + If "wakeup-source" property is specified for the device this GPIO
> + initialization will be aborted.
Why? Many GPIOs can function as wake-up sources. You would need get the
IRQ for the GPIO. Also, some UARTs wake-up from the RX line. Not sure
about any 8250 flavors, but is probably implementation specific what is
the trigger for wake-up.
Rob
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^ permalink raw reply
* Re: [patch v1 0/2] JTAG driver introduction
From: Andrew Lunn @ 2017-08-03 17:48 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh@linuxfoundation.org, arnd@arndb.de,
devicetree@vger.kernel.org, jiri@resnulli.us, system-sw-low-level,
openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org,
mec@shout.net, joel@jms.id.au, linux-serial@vger.kernel.org,
vadimp@maellanox.com, tklauser@distanz.ch,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <AM4PR0501MB2194E6B8D14EC15356C1C0BFB1B10@AM4PR0501MB2194.eurprd05.prod.outlook.com>
> Hi Andrew
>
> Thanks a lot for review.
>
> We used user space tool for that, which is an adaptation of some
> Lattice tools, which allows programming of SVF files. We are using
> it for Lattice CPLD burning, since we have for such devices on our
> system, but this tool could be used for programming other devices
> from other vendors as well.
> https://github.com/mellanoxbmc/mellanox-bmc-tools
Since you are defining a new Kernel ABI here, it would be good to get
some buy-in from potential users for the ABI. Maybe for the next
version of the patchset you can cross post to the OpenOCD-devel list?
Andrew
^ permalink raw reply
* RE: [patch v1 0/2] JTAG driver introduction
From: Oleksandr Shamray @ 2017-08-03 15:26 UTC (permalink / raw)
To: Andrew Lunn
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
arnd-r2nGTMty4D4@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
jiri-rHqAuBHg3fBzbRFIqnYvSA@public.gmane.org, system-sw-low-level,
openbmc-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
mec-WqBc5aa1uDFeoWH0uzbU5w@public.gmane.org,
joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org,
linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
vadimp-45czdsxZ+A5DPfheJLI6IQ@public.gmane.org,
tklauser-93Khv+1bN0NyDzI6CaY1VQ@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
In-Reply-To: <20170802141209.GB25781-g2DYL2Zd6BY@public.gmane.org>
> -----Original Message-----
> From: Andrew Lunn [mailto:andrew-g2DYL2Zd6BY@public.gmane.org]
> Sent: Wednesday, August 2, 2017 5:12 PM
> To: Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org; arnd-r2nGTMty4D4@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org;
> jiri-rHqAuBHg3fBzbRFIqnYvSA@public.gmane.org; system-sw-low-level <system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>;
> openbmc-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org; linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; mec-WqBc5aa1uDFeoWH0uzbU5w@public.gmane.org;
> joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org; linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; vadimp-45czdsxZ+A5DPfheJLI6IQ@public.gmane.org;
> tklauser-93Khv+1bN0NyDzI6CaY1VQ@public.gmane.org; linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Subject: Re: [patch v1 0/2] JTAG driver introduction
>
> On Wed, Aug 02, 2017 at 04:18:36PM +0300, Oleksandr Shamray wrote:
> > When a need raise up to use JTAG interface for system's devices
> > programming or CPU debugging, it could be done from the external JTAG
> > master controller.
> >
> > For such purpose, usually the user layer application implements jtag
> > protocol or using a proprietary connection to vendor hardware.
> > This method is slow and not generic.
> >
> > We propose to implement general JTAG interface and infrastructure to
> > communicate with user layer application. In such way, we can have the
> > standard JTAG interface core part and separation from specific HW
> > implementation.
> > This allow new capability to debug the CPU or program system's device
> > via BMC without additional devices nor cost.
>
> Hi Oleksandr
>
> Do you have patches for OpenOCD? Or maybe i should ask it another way, what
> user space tools are you using?
>
> Thanks
> Andrew
Hi Andrew
Thanks a lot for review.
We used user space tool for that, which is an adaptation of some Lattice tools, which allows programming of SVF files. We are using it for Lattice CPLD burning, since we have for such devices on our system, but this tool could be used for programming other devices from other vendors as well.
https://github.com/mellanoxbmc/mellanox-bmc-tools
Thanks
Oleksandr
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^ permalink raw reply
* RE: [PATCH] drivers: jtag: fix resource_size.cocci warnings
From: Oleksandr Shamray @ 2017-08-03 14:48 UTC (permalink / raw)
To: kbuild test robot
Cc: kbuild-all@01.org, gregkh@linuxfoundation.org, arnd@arndb.de,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
openbmc@lists.ozlabs.org, joel@jms.id.au, jiri@resnulli.us,
tklauser@distanz.ch, linux-serial@vger.kernel.org, mec@shout.net,
vadimp@maellanox.com, system-sw-low-level, Jiri Pirko
In-Reply-To: <20170803143544.GA34229@lkp-ib03.lkp.intel.com>
> -----Original Message-----
> From: kbuild test robot [mailto:lkp@intel.com]
> Sent: Thursday, August 3, 2017 5:36 PM
> To: Oleksandr Shamray <oleksandrs@mellanox.com>
> Cc: kbuild-all@01.org; gregkh@linuxfoundation.org; arnd@arndb.de; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; openbmc@lists.ozlabs.org; joel@jms.id.au;
> jiri@resnulli.us; tklauser@distanz.ch; linux-serial@vger.kernel.org;
> mec@shout.net; vadimp@maellanox.com; system-sw-low-level <system-sw-
> low-level@mellanox.com>; Oleksandr Shamray <oleksandrs@mellanox.com>;
> Jiri Pirko <jiri@mellanox.com>
> Subject: [PATCH] drivers: jtag: fix resource_size.cocci warnings
>
> drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
>
>
> Use resource_size function on resource object instead of explicit computation.
>
> Generated by: scripts/coccinelle/api/resource_size.cocci
>
> Fixes: acf0c42bb646 ("drivers: jtag: Add Aspeed SoC 24xx and 25xx families
> JTAG master driver")
> CC: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> ---
>
> jtag-aspeed.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> --- a/drivers/jtag/jtag-aspeed.c
> +++ b/drivers/jtag/jtag-aspeed.c
> @@ -721,7 +721,7 @@ int aspeed_jtag_init(struct platform_dev
> return 0;
>
> out_region:
> - release_mem_region(res->start, res->end - res->start + 1);
> + release_mem_region(res->start, resource_size(res));
> return err;
> }
>
^ permalink raw reply
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
From: kbuild test robot @ 2017-08-03 14:35 UTC (permalink / raw)
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Oleksandr Shamray, Jiri Pirko
In-Reply-To: <1501679918-20486-3-git-send-email-oleksandrs@mellanox.com>
Hi Oleksandr,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.13-rc3 next-20170803]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Oleksandr-Shamray/JTAG-driver-introduction/20170803-110721
coccinelle warnings: (new ones prefixed by >>)
>> drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
Please review and possibly fold the followup patch.
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
^ permalink raw reply
* [PATCH] drivers: jtag: fix resource_size.cocci warnings
From: kbuild test robot @ 2017-08-03 14:35 UTC (permalink / raw)
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Oleksandr Shamray, Jiri Pirko
In-Reply-To: <1501679918-20486-3-git-send-email-oleksandrs@mellanox.com>
drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
Use resource_size function on resource object
instead of explicit computation.
Generated by: scripts/coccinelle/api/resource_size.cocci
Fixes: acf0c42bb646 ("drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver")
CC: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---
jtag-aspeed.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/jtag/jtag-aspeed.c
+++ b/drivers/jtag/jtag-aspeed.c
@@ -721,7 +721,7 @@ int aspeed_jtag_init(struct platform_dev
return 0;
out_region:
- release_mem_region(res->start, res->end - res->start + 1);
+ release_mem_region(res->start, resource_size(res));
return err;
}
^ permalink raw reply
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
From: kbuild test robot @ 2017-08-03 12:12 UTC (permalink / raw)
Cc: devicetree, jiri, arnd, system-sw-low-level, gregkh, openbmc,
linux-kernel, mec, Jiri Pirko, kbuild-all, linux-serial, vadimp,
Oleksandr Shamray, tklauser, linux-arm-kernel, joel
In-Reply-To: <1501679918-20486-3-git-send-email-oleksandrs@mellanox.com>
[-- Attachment #1: Type: text/plain, Size: 1508 bytes --]
Hi Oleksandr,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.13-rc3 next-20170802]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Oleksandr-Shamray/JTAG-driver-introduction/20170803-110721
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64
All errors (new ones prefixed by >>):
>> drivers/jtag/jtag-aspeed.c:34:28: fatal error: asm/mach-types.h: No such file or directory
#include <asm/mach-types.h>
^
compilation terminated.
vim +34 drivers/jtag/jtag-aspeed.c
> 34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36 #include <linux/clk.h>
37 #include <linux/device.h>
38 #include <linux/interrupt.h>
39 #include <linux/jtag.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/of_address.h>
43 #include <linux/platform_device.h>
44 #include <linux/slab.h>
45 #include <uapi/linux/jtag.h>
46
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 56842 bytes --]
[-- Attachment #3: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
From: Tobias Klauser @ 2017-08-03 9:28 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, arnd, linux-kernel, linux-arm-kernel, devicetree, openbmc,
joel, jiri, linux-serial, mec, vadimp, system-sw-low-level,
Jiri Pirko
In-Reply-To: <1501679918-20486-2-git-send-email-oleksandrs@mellanox.com>
Nice work!
On 2017-08-02 at 15:18:37 +0200, Oleksandr Shamray <oleksandrs@mellanox.com> wrote:
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
[...]
> +static int jtag_run_test_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *idle)
Both the function and the struct it takes have the same name, which of
course is perfectly valid C. However, IMO it would be easier to grep for
the function/struct individually if they had different names.
> +{
> + if (jtag->ops->idle)
> + return jtag->ops->idle(jtag, idle);
> + else
> + return -EOPNOTSUPP;
> +}
[...]
> --- /dev/null
> +++ b/include/uapi/linux/jtag.h
> @@ -0,0 +1,133 @@
[...]
> +/**
> + * struct jtag_run_test_idle - forces JTAG sm to
> + * RUN_TEST/IDLE state *
I guess a newline is needed here to make this a valid kerneldoc comment
(the trailing '*' indicates that one was actually intended here ;)
Also, 'sm' should probably be spelled out as 'state machine'.
> + * @mode: access mode
> + * @reset: 0 - run IDEL/PAUSE from current state
> + * 1 - go trough TEST_LOGIC/RESET state before IDEL/PAUSE
Typos: s/trough/through/ and s/IDEL/IDLE/
> + * @end: completion flag
> + * @tck: clock counter
> + *
> + * Structure represents interface to JTAG device for jtag idle
> + * execution.
> + */
> +struct jtag_run_test_idle {
> + enum jtag_xfer_mode mode;
> + unsigned char reset;
> + enum jtag_endstate endstate;
> + unsigned char tck;
> +};
^ permalink raw reply
* Re: [PATCH] serial: 8250_of: Add basic PM runtime support
From: kbuild test robot @ 2017-08-03 7:43 UTC (permalink / raw)
Cc: kbuild-all, gregkh, linux-serial, linux-kernel, linux-arm-kernel,
Franklin S Cooper Jr
In-Reply-To: <20170802163218.14377-1-fcooper@ti.com>
[-- Attachment #1: Type: text/plain, Size: 2217 bytes --]
Hi Franklin,
[auto build test ERROR on tty/tty-testing]
[also build test ERROR on next-20170802]
[cannot apply to v4.13-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Franklin-S-Cooper-Jr/serial-8250_of-Add-basic-PM-runtime-support/20170803-151414
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-testing
config: sparc64-allmodconfig (attached as .config)
compiler: sparc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=sparc64
All errors (new ones prefixed by >>):
drivers/tty//serial/8250/8250_of.c: In function 'of_serial_suspend':
>> drivers/tty//serial/8250/8250_of.c:273:24: error: 'ofdev' undeclared (first use in this function)
pm_runtime_put_sync(&ofdev->dev);
^~~~~
drivers/tty//serial/8250/8250_of.c:273:24: note: each undeclared identifier is reported only once for each function it appears in
drivers/tty//serial/8250/8250_of.c: In function 'of_serial_resume':
drivers/tty//serial/8250/8250_of.c:286:24: error: 'ofdev' undeclared (first use in this function)
pm_runtime_get_sync(&ofdev->dev);
^~~~~
vim +/ofdev +273 drivers/tty//serial/8250/8250_of.c
262
263 #ifdef CONFIG_PM_SLEEP
264 static int of_serial_suspend(struct device *dev)
265 {
266 struct of_serial_info *info = dev_get_drvdata(dev);
267 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
268 struct uart_port *port = &port8250->port;
269
270 serial8250_suspend_port(info->line);
271
272 if ((!uart_console(port) || console_suspend_enabled)) {
> 273 pm_runtime_put_sync(&ofdev->dev);
274 clk_disable_unprepare(info->clk);
275 }
276 return 0;
277 }
278
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 51285 bytes --]
^ permalink raw reply
* Re: [PATCH 0/2] serial: 8250: add support for MediaTek BTIF controller
From: Sean Wang @ 2017-08-03 3:18 UTC (permalink / raw)
To: Andy Shevchenko
Cc: devicetree, heikki.krogerus, vigneshr, gregkh, jslaby, hpeter,
linux-kernel, robh+dt, linux-mediatek, linux-serial, jan.kiszka,
matthias.bgg, arnd.bergmann, linux-arm-kernel
In-Reply-To: <1501696935.29303.367.camel@linux.intel.com>
On Wed, 2017-08-02 at 21:02 +0300, Andy Shevchenko wrote:
> On Thu, 2017-08-03 at 01:37 +0800, Sean Wang wrote:
> > On Wed, 2017-08-02 at 20:14 +0300, Andy Shevchenko wrote:
> > > On Thu, 2017-08-03 at 01:05 +0800, sean.wang@mediatek.com wrote:
> > > > From: Sean Wang <sean.wang@mediatek.com>
> > > >
> > > > This patchset introduces the support for MediaTek BTIF controller.
> > > >
> > > > MediaTek BTIF controller is the serial interface similar to UART
> > > > but
> > > > it
> > > > works only as the digital device which is mainly used to
> > > > communicate
> > > > with
> > > > the connectivity module also called CONNSYS inside the SoC which
> > > > could
> > > > be
> > > > mostly found on those MediaTek SoCs with Bluetooth feature.
> > > >
> > > > And the controller is made as being compatible with the 8250
> > > > register
> > > > layout so it tends to be integrated with existing 8250 core driver
> > > > and
> > > > have no requirement for the modem configuration additionally such
> > > > as
> > > > the
> > > > baud rate calculation and assignment.
>
> +Cc: Arnd.
>
> > > Why it requires a separate driver?
> > >
> > > 8250_of is for DT enabled drivers.
> > >
> >
> > Hi, Andy
> >
> > thanks for your information
> >
> > the hardware is not completely identical to 8250 device,
> > it has extra registers belonged to platform control such as internal
> > loopback, dma disable/enable, sleep/wakeup setup and so on, so I
> > create
> > it as a separate driver.
>
> Over all 200+ LOCs I didn't see any of the above except loopback, which
> is one property that can be easily added to 8250_of.c.
>
> Moreover, if you have more code coming I would suggest you to split
> 8250_of to library and driver parts and re-use stuff from there.
>
> Arnd, what is your opinion about new 8250 OF based drivers?
>
Hi, Andy
many thanks for the detailed guidance.
I will turn into reusing 8250 OF stuff in the next version and look
forward to any idea from Arnd how to do with 8250 OF driver to add
specific programming/data for those devices using 8250 OF.
Sean
^ permalink raw reply
* Re: [PATCH 0/2] serial: 8250: add support for MediaTek BTIF controller
From: Andy Shevchenko @ 2017-08-02 18:02 UTC (permalink / raw)
To: Sean Wang, arnd.bergmann
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r, jslaby-IBi9RG/b67k,
jan.kiszka-kv7WeFo6aLtBDgjK7y7TUQ,
heikki.krogerus-VuQAYsv1563Yd54FQh9/CA,
hpeter-Re5JQEeQqe8AvxtiuMwx3w, vigneshr-l0cyMroinI0,
matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1501695470.25246.7.camel@mtkswgap22>
On Thu, 2017-08-03 at 01:37 +0800, Sean Wang wrote:
> On Wed, 2017-08-02 at 20:14 +0300, Andy Shevchenko wrote:
> > On Thu, 2017-08-03 at 01:05 +0800, sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org wrote:
> > > From: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > >
> > > This patchset introduces the support for MediaTek BTIF controller.
> > >
> > > MediaTek BTIF controller is the serial interface similar to UART
> > > but
> > > it
> > > works only as the digital device which is mainly used to
> > > communicate
> > > with
> > > the connectivity module also called CONNSYS inside the SoC which
> > > could
> > > be
> > > mostly found on those MediaTek SoCs with Bluetooth feature.
> > >
> > > And the controller is made as being compatible with the 8250
> > > register
> > > layout so it tends to be integrated with existing 8250 core driver
> > > and
> > > have no requirement for the modem configuration additionally such
> > > as
> > > the
> > > baud rate calculation and assignment.
+Cc: Arnd.
> > Why it requires a separate driver?
> >
> > 8250_of is for DT enabled drivers.
> >
>
> Hi, Andy
>
> thanks for your information
>
> the hardware is not completely identical to 8250 device,
> it has extra registers belonged to platform control such as internal
> loopback, dma disable/enable, sleep/wakeup setup and so on, so I
> create
> it as a separate driver.
Over all 200+ LOCs I didn't see any of the above except loopback, which
is one property that can be easily added to 8250_of.c.
Moreover, if you have more code coming I would suggest you to split
8250_of to library and driver parts and re-use stuff from there.
Arnd, what is your opinion about new 8250 OF based drivers?
--
Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Intel Finland Oy
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply
* Re: [PATCH 0/2] serial: 8250: add support for MediaTek BTIF controller
From: Sean Wang @ 2017-08-02 17:37 UTC (permalink / raw)
To: Andy Shevchenko
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r, jslaby-IBi9RG/b67k,
jan.kiszka-kv7WeFo6aLtBDgjK7y7TUQ,
heikki.krogerus-VuQAYsv1563Yd54FQh9/CA,
hpeter-Re5JQEeQqe8AvxtiuMwx3w, vigneshr-l0cyMroinI0,
matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1501694063.29303.361.camel-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
On Wed, 2017-08-02 at 20:14 +0300, Andy Shevchenko wrote:
> On Thu, 2017-08-03 at 01:05 +0800, sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org wrote:
> > From: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> >
> > This patchset introduces the support for MediaTek BTIF controller.
> >
> > MediaTek BTIF controller is the serial interface similar to UART but
> > it
> > works only as the digital device which is mainly used to communicate
> > with
> > the connectivity module also called CONNSYS inside the SoC which could
> > be
> > mostly found on those MediaTek SoCs with Bluetooth feature.
> >
> > And the controller is made as being compatible with the 8250 register
> > layout so it tends to be integrated with existing 8250 core driver and
> > have no requirement for the modem configuration additionally such as
> > the
> > baud rate calculation and assignment.
>
>
> Why it requires a separate driver?
>
> 8250_of is for DT enabled drivers.
>
Hi, Andy
thanks for your information
the hardware is not completely identical to 8250 device,
it has extra registers belonged to platform control such as internal
loopback, dma disable/enable, sleep/wakeup setup and so on, so I create
it as a separate driver.
Sean
> >
> > Sean Wang (2):
> > dt-bindings: serial: Add MediaTek BTIF controller bindings
> > tty: serial: 8250: Add MediaTek BTIF controller on MT7622 and MT7623
> > SoC
> >
> > .../devicetree/bindings/serial/mtk-btif.txt | 26 +++
> > drivers/tty/serial/8250/8250_btif.c | 224
> > +++++++++++++++++++++
> > drivers/tty/serial/8250/Kconfig | 9 +
> > drivers/tty/serial/8250/Makefile | 1 +
> > 4 files changed, 260 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/serial/mtk-
> > btif.txt
> > create mode 100644 drivers/tty/serial/8250/8250_btif.c
> >
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply
* Re: [PATCH 0/2] serial: 8250: add support for MediaTek BTIF controller
From: Andy Shevchenko @ 2017-08-02 17:14 UTC (permalink / raw)
To: sean.wang, robh+dt, gregkh, jslaby, jan.kiszka, heikki.krogerus,
hpeter, vigneshr, matthias.bgg
Cc: devicetree, linux-mediatek, linux-serial, linux-arm-kernel,
linux-kernel
In-Reply-To: <cover.1501692369.git.sean.wang@mediatek.com>
On Thu, 2017-08-03 at 01:05 +0800, sean.wang@mediatek.com wrote:
> From: Sean Wang <sean.wang@mediatek.com>
>
> This patchset introduces the support for MediaTek BTIF controller.
>
> MediaTek BTIF controller is the serial interface similar to UART but
> it
> works only as the digital device which is mainly used to communicate
> with
> the connectivity module also called CONNSYS inside the SoC which could
> be
> mostly found on those MediaTek SoCs with Bluetooth feature.
>
> And the controller is made as being compatible with the 8250 register
> layout so it tends to be integrated with existing 8250 core driver and
> have no requirement for the modem configuration additionally such as
> the
> baud rate calculation and assignment.
Why it requires a separate driver?
8250_of is for DT enabled drivers.
>
> Sean Wang (2):
> dt-bindings: serial: Add MediaTek BTIF controller bindings
> tty: serial: 8250: Add MediaTek BTIF controller on MT7622 and MT7623
> SoC
>
> .../devicetree/bindings/serial/mtk-btif.txt | 26 +++
> drivers/tty/serial/8250/8250_btif.c | 224
> +++++++++++++++++++++
> drivers/tty/serial/8250/Kconfig | 9 +
> drivers/tty/serial/8250/Makefile | 1 +
> 4 files changed, 260 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/serial/mtk-
> btif.txt
> create mode 100644 drivers/tty/serial/8250/8250_btif.c
>
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
^ permalink raw reply
* [PATCH 2/2] tty: serial: 8250: Add MediaTek BTIF controller on MT7622 and MT7623 SoC
From: sean.wang @ 2017-08-02 17:05 UTC (permalink / raw)
To: robh+dt, gregkh, jslaby, andriy.shevchenko, jan.kiszka,
heikki.krogerus, hpeter, vigneshr, matthias.bgg
Cc: devicetree, linux-mediatek, linux-serial, linux-arm-kernel,
linux-kernel, Sean Wang
In-Reply-To: <cover.1501692369.git.sean.wang@mediatek.com>
From: Sean Wang <sean.wang@mediatek.com>
MediaTek BTIF controller is the serial interface similar to UART but it
works only as the digital device which is mainly used to communicate with
the connectivity module also called CONNSYS inside the SoC which could be
mostly found on those MediaTek SoCs with Bluetooth feature.
And the controller is made as being compatible with the 8250 register
layout so it tends to be integrated with existing 8250 core driver and
have no requirement for the modem configuration additionally such as the
baud rate calculation and assignment.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
drivers/tty/serial/8250/8250_btif.c | 224 ++++++++++++++++++++++++++++++++++++
drivers/tty/serial/8250/Kconfig | 9 ++
drivers/tty/serial/8250/Makefile | 1 +
3 files changed, 234 insertions(+)
create mode 100644 drivers/tty/serial/8250/8250_btif.c
diff --git a/drivers/tty/serial/8250/8250_btif.c b/drivers/tty/serial/8250/8250_btif.c
new file mode 100644
index 0000000..06433e9
--- /dev/null
+++ b/drivers/tty/serial/8250/8250_btif.c
@@ -0,0 +1,224 @@
+/*
+ * Driver for MediaTek BTIF Controller
+ *
+ * Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_reg.h>
+
+#include "8250.h"
+
+#define MTK_BTIF_TRI_LVL 0x60
+#define BTIF_LOOP BIT(7)
+
+struct mtk_btif_data {
+ int line;
+ struct clk *main_clk;
+};
+
+static void
+mtk_btif_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
+{
+ if (!state)
+ pm_runtime_get_sync(port->dev);
+
+ serial8250_do_pm(port, state, old);
+
+ if (state)
+ pm_runtime_put_sync_suspend(port->dev);
+}
+
+static int mtk_btif_probe_of(struct platform_device *pdev, struct uart_port *p,
+ struct mtk_btif_data *data)
+{
+ int err;
+
+ data->main_clk = devm_clk_get(&pdev->dev, "main");
+ if (IS_ERR(data->main_clk)) {
+ dev_warn(&pdev->dev, "Can't get main clock\n");
+ return PTR_ERR(data->main_clk);
+ }
+
+ err = clk_prepare_enable(data->main_clk);
+ if (err) {
+ dev_warn(&pdev->dev, "Can't prepare main_clk\n");
+ clk_put(data->main_clk);
+ return err;
+ }
+
+ p->uartclk = clk_get_rate(data->main_clk);
+
+ return 0;
+}
+
+static int mtk_btif_runtime_suspend(struct device *dev)
+{
+ struct mtk_btif_data *data = dev_get_drvdata(dev);
+
+ clk_disable_unprepare(data->main_clk);
+
+ return 0;
+}
+
+static int mtk_btif_runtime_resume(struct device *dev)
+{
+ struct mtk_btif_data *data = dev_get_drvdata(dev);
+ int err;
+
+ err = clk_prepare_enable(data->main_clk);
+ if (err) {
+ dev_warn(dev, "Can't enable main clock\n");
+ return err;
+ }
+
+ return 0;
+}
+
+static int mtk_btif_probe(struct platform_device *pdev)
+{
+ struct uart_8250_port uart = {};
+ struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct mtk_btif_data *data;
+ int err;
+ u32 tmp;
+
+ if (!regs || !irq) {
+ dev_err(&pdev->dev, "no registers/irq defined\n");
+ return -EINVAL;
+ }
+
+ uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
+ resource_size(regs));
+ if (!uart.port.membase)
+ return -ENOMEM;
+
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ if (pdev->dev.of_node) {
+ err = mtk_btif_probe_of(pdev, &uart.port, data);
+ if (err)
+ return err;
+ } else {
+ return -ENODEV;
+ }
+
+ spin_lock_init(&uart.port.lock);
+ uart.port.mapbase = regs->start;
+ uart.port.irq = irq->start;
+ uart.port.pm = mtk_btif_do_pm;
+ uart.port.type = PORT_8250;
+ uart.port.flags = UPF_FIXED_TYPE;
+ uart.port.dev = &pdev->dev;
+ uart.port.iotype = UPIO_MEM32;
+ uart.port.regshift = 2;
+ uart.port.private_data = data;
+
+ platform_set_drvdata(pdev, data);
+
+ pm_runtime_enable(&pdev->dev);
+
+ if (!pm_runtime_enabled(&pdev->dev)) {
+ err = mtk_btif_runtime_resume(&pdev->dev);
+ if (err)
+ return err;
+ }
+
+ if (of_property_read_bool(pdev->dev.of_node, "mediatek,loopback")) {
+ dev_info(&pdev->dev, "btif is entering loopback mode\n");
+ tmp = readl(uart.port.membase + MTK_BTIF_TRI_LVL);
+ tmp |= BTIF_LOOP;
+ writel(tmp, uart.port.membase + MTK_BTIF_TRI_LVL);
+ }
+
+ data->line = serial8250_register_8250_port(&uart);
+ if (data->line < 0)
+ return data->line;
+
+ return 0;
+}
+
+static int mtk_btif_remove(struct platform_device *pdev)
+{
+ struct mtk_btif_data *data = platform_get_drvdata(pdev);
+
+ pm_runtime_get_sync(&pdev->dev);
+
+ serial8250_unregister_port(data->line);
+
+ pm_runtime_disable(&pdev->dev);
+ pm_runtime_put_noidle(&pdev->dev);
+
+ if (!pm_runtime_status_suspended(&pdev->dev))
+ mtk_btif_runtime_suspend(&pdev->dev);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int mtk_btif_suspend(struct device *dev)
+{
+ struct mtk_btif_data *data = dev_get_drvdata(dev);
+
+ serial8250_suspend_port(data->line);
+
+ return 0;
+}
+
+static int mtk_btif_resume(struct device *dev)
+{
+ struct mtk_btif_data *data = dev_get_drvdata(dev);
+
+ serial8250_resume_port(data->line);
+
+ return 0;
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static const struct dev_pm_ops mtk_btif_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(mtk_btif_suspend, mtk_btif_resume)
+ SET_RUNTIME_PM_OPS(mtk_btif_runtime_suspend, mtk_btif_runtime_resume,
+ NULL)
+};
+
+static const struct of_device_id mtk_btif_of_match[] = {
+ { .compatible = "mediatek,mt7622-btif" },
+ { .compatible = "mediatek,mt7623-btif" },
+ { /* Sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mtk_btif_of_match);
+
+static struct platform_driver mtk_btif_platform_driver = {
+ .driver = {
+ .name = "mediatek-btif",
+ .pm = &mtk_btif_pm_ops,
+ .of_match_table = mtk_btif_of_match,
+ },
+ .probe = mtk_btif_probe,
+ .remove = mtk_btif_remove,
+};
+module_platform_driver(mtk_btif_platform_driver);
+
+MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MediaTek BTIF controller driver");
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
index a1161ec..0e18cfc 100644
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
@@ -403,6 +403,15 @@ config SERIAL_8250_MT6577
If you have a Mediatek based board and want to use the
serial port, say Y to this option. If unsure, say N.
+config SERIAL_8250_BTIF
+ tristate "MediaTek BTIF controller support"
+ depends on SERIAL_8250 && ARCH_MEDIATEK
+ help
+ Selecting this option will enable BTIF controller used by MediaTek
+ Bluetooth to communicate with internal hardware module inside the
+ SoC also being called CONNSYS which could be found on MediaTek SoCs
+ with Bluetooth feature, say Y to this option. If unsure, say N.
+
config SERIAL_8250_UNIPHIER
tristate "Support for UniPhier on-chip UART"
depends on SERIAL_8250
diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile
index a44a99a..2fc73ce 100644
--- a/drivers/tty/serial/8250/Makefile
+++ b/drivers/tty/serial/8250/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
obj-$(CONFIG_SERIAL_8250_OMAP) += 8250_omap.o
obj-$(CONFIG_SERIAL_8250_LPC18XX) += 8250_lpc18xx.o
obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o
+obj-$(CONFIG_SERIAL_8250_BTIF) += 8250_btif.o
obj-$(CONFIG_SERIAL_8250_UNIPHIER) += 8250_uniphier.o
obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o
obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o
--
2.7.4
^ permalink raw reply related
* [PATCH 1/2] dt-bindings: serial: Add MediaTek BTIF controller bindings
From: sean.wang @ 2017-08-02 17:05 UTC (permalink / raw)
To: robh+dt, gregkh, jslaby, andriy.shevchenko, jan.kiszka,
heikki.krogerus, hpeter, vigneshr, matthias.bgg
Cc: devicetree, Sean Wang, linux-kernel, linux-mediatek, linux-serial,
linux-arm-kernel
In-Reply-To: <cover.1501692369.git.sean.wang@mediatek.com>
From: Sean Wang <sean.wang@mediatek.com>
Document the devicetree bindings for MediaTek BTIF controller
which could be found on MT7622 and MT7623 SoC.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
.../devicetree/bindings/serial/mtk-btif.txt | 26 ++++++++++++++++++++++
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/mtk-btif.txt
diff --git a/Documentation/devicetree/bindings/serial/mtk-btif.txt b/Documentation/devicetree/bindings/serial/mtk-btif.txt
new file mode 100644
index 0000000..80c1f5a
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/mtk-btif.txt
@@ -0,0 +1,26 @@
+Device-Tree bindings for MediaTek BTIF controller found on those
+MediaTek SoCs with Bluetooth feature
+
+Required properties:
+- compatible: Should be one of:
+ - "mediatek,mt7622-btif" : for MT7622 SoC
+ - "mediatek,mt7623-btif" : for MT7623 SoC
+- reg: The base address of the BTIF register bank;
+- interrupts: A single interrupt specifier;
+- clocks: list of clock specifiers, corresponding to
+ entries in clock-names property;
+- clock-names: should contain "main" entries.
+
+Optional properties:
+- mediatek,loopback: Boolean; if defined, indicates that BTIF controller
+ running on the loopback mode.
+
+Example:
+
+ btif: btif@1100c000 {
+ compatible = "mediatek,mt7623-btif";
+ reg = <0 0x1100c000 0 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_BTIF>;
+ clock-names = "main";
+ };
--
2.7.4
^ permalink raw reply related
* [PATCH 0/2] serial: 8250: add support for MediaTek BTIF controller
From: sean.wang @ 2017-08-02 17:05 UTC (permalink / raw)
To: robh+dt, gregkh, jslaby, andriy.shevchenko, jan.kiszka,
heikki.krogerus, hpeter, vigneshr, matthias.bgg
Cc: devicetree, linux-mediatek, linux-serial, linux-arm-kernel,
linux-kernel, Sean Wang
From: Sean Wang <sean.wang@mediatek.com>
This patchset introduces the support for MediaTek BTIF controller.
MediaTek BTIF controller is the serial interface similar to UART but it
works only as the digital device which is mainly used to communicate with
the connectivity module also called CONNSYS inside the SoC which could be
mostly found on those MediaTek SoCs with Bluetooth feature.
And the controller is made as being compatible with the 8250 register
layout so it tends to be integrated with existing 8250 core driver and
have no requirement for the modem configuration additionally such as the
baud rate calculation and assignment.
Sean Wang (2):
dt-bindings: serial: Add MediaTek BTIF controller bindings
tty: serial: 8250: Add MediaTek BTIF controller on MT7622 and MT7623
SoC
.../devicetree/bindings/serial/mtk-btif.txt | 26 +++
drivers/tty/serial/8250/8250_btif.c | 224 +++++++++++++++++++++
drivers/tty/serial/8250/Kconfig | 9 +
drivers/tty/serial/8250/Makefile | 1 +
4 files changed, 260 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/mtk-btif.txt
create mode 100644 drivers/tty/serial/8250/8250_btif.c
--
2.7.4
^ permalink raw reply
* [PATCH] serial: 8250_of: Add basic PM runtime support
From: Franklin S Cooper Jr @ 2017-08-02 16:32 UTC (permalink / raw)
To: gregkh, linux-serial, linux-kernel, linux-arm-kernel; +Cc: Franklin S Cooper Jr
Add basic PM Runtime support.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
---
drivers/tty/serial/8250/8250_of.c | 35 ++++++++++++++++++++++++-----------
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
index 6c5a8ca..94e7c93 100644
--- a/drivers/tty/serial/8250/8250_of.c
+++ b/drivers/tty/serial/8250/8250_of.c
@@ -18,6 +18,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <linux/pm_runtime.h>
#include <linux/clk.h>
#include <linux/reset.h>
@@ -65,6 +66,10 @@ static int of_platform_serial_setup(struct platform_device *ofdev,
int ret;
memset(port, 0, sizeof *port);
+
+ pm_runtime_enable(&ofdev->dev);
+ pm_runtime_get_sync(&ofdev->dev);
+
if (of_property_read_u32(np, "clock-frequency", &clk)) {
/* Get clk rate through clk driver if present */
@@ -72,12 +77,13 @@ static int of_platform_serial_setup(struct platform_device *ofdev,
if (IS_ERR(info->clk)) {
dev_warn(&ofdev->dev,
"clk or clock-frequency not defined\n");
- return PTR_ERR(info->clk);
+ ret = PTR_ERR(info->clk);
+ goto err_pmruntime;
}
ret = clk_prepare_enable(info->clk);
if (ret < 0)
- return ret;
+ goto err_pmruntime;
clk = clk_get_rate(info->clk);
}
@@ -170,8 +176,10 @@ static int of_platform_serial_setup(struct platform_device *ofdev,
err_dispose:
irq_dispose_mapping(port->irq);
err_unprepare:
- if (info->clk)
- clk_disable_unprepare(info->clk);
+ clk_disable_unprepare(info->clk);
+err_pmruntime:
+ pm_runtime_put_sync(&ofdev->dev);
+ pm_runtime_disable(&ofdev->dev);
return ret;
}
@@ -227,8 +235,9 @@ static int of_platform_serial_probe(struct platform_device *ofdev)
return 0;
err_dispose:
irq_dispose_mapping(port8250.port.irq);
- if (info->clk)
- clk_disable_unprepare(info->clk);
+ pm_runtime_put_sync(&ofdev->dev);
+ pm_runtime_disable(&ofdev->dev);
+ clk_disable_unprepare(info->clk);
err_free:
kfree(info);
return ret;
@@ -244,8 +253,9 @@ static int of_platform_serial_remove(struct platform_device *ofdev)
serial8250_unregister_port(info->line);
reset_control_assert(info->rst);
- if (info->clk)
- clk_disable_unprepare(info->clk);
+ pm_runtime_put_sync(&ofdev->dev);
+ pm_runtime_disable(&ofdev->dev);
+ clk_disable_unprepare(info->clk);
kfree(info);
return 0;
}
@@ -259,9 +269,10 @@ static int of_serial_suspend(struct device *dev)
serial8250_suspend_port(info->line);
- if (info->clk && (!uart_console(port) || console_suspend_enabled))
+ if ((!uart_console(port) || console_suspend_enabled)) {
+ pm_runtime_put_sync(&ofdev->dev);
clk_disable_unprepare(info->clk);
-
+ }
return 0;
}
@@ -271,8 +282,10 @@ static int of_serial_resume(struct device *dev)
struct uart_8250_port *port8250 = serial8250_get_port(info->line);
struct uart_port *port = &port8250->port;
- if (info->clk && (!uart_console(port) || console_suspend_enabled))
+ if ((!uart_console(port) || console_suspend_enabled)) {
+ pm_runtime_get_sync(&ofdev->dev);
clk_prepare_enable(info->clk);
+ }
serial8250_resume_port(info->line);
--
2.9.4.dirty
^ permalink raw reply related
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
From: Arnd Bergmann @ 2017-08-02 15:37 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, Linux Kernel Mailing List, Linux ARM, devicetree,
OpenBMC Maillist, Joel Stanley, Jiří Pírko,
Tobias Klauser, linux-serial, mec, vadimp, system-sw-low-level,
Jiri Pirko
In-Reply-To: <1501679918-20486-2-git-send-email-oleksandrs@mellanox.com>
On Wed, Aug 2, 2017 at 3:18 PM, Oleksandr Shamray
<oleksandrs@mellanox.com> wrote:
> +
> +static void *jtag_copy_from_user(void __user *udata, unsigned long bit_size)
> +{
> + void *kdata;
> + unsigned long size;
> + unsigned long err;
> +
> + size = DIV_ROUND_UP(bit_size, BITS_PER_BYTE);
> + kdata = kzalloc(size, GFP_KERNEL);
> + if (!kdata)
> + return NULL;
> +
> + err = copy_from_user(kdata, udata, size);
> + if (!err)
> + return kdata;
> +
> + kfree(kdata);
> + return NULL;
> +}
You can use memdup_user() here to simplify this, or just change the callers
to use that directly.
> +static long jtag_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
> +{
> + struct jtag *jtag = file->private_data;
> + struct jtag_run_test_idle idle;
> + struct jtag_xfer xfer;
> + void *user_tdio_data;
> + unsigned long value;
> + int err;
> +
> + switch (cmd) {
> + case JTAG_GIOCFREQ:
> + if (jtag->ops->freq_get)
> + err = jtag->ops->freq_get(jtag, &value);
> + else
> + err = -EOPNOTSUPP;
> + if (err)
> + break;
> +
> + err = __put_user(value, (unsigned long __user *)arg);
> + break;
Use put_user() instead of __put_user() everywhere please.
To avoid using so many casts, just use a temporary variable
that holds the pointer.
Also, you should never use 'unsigned long' pointers in the arguments,
use either '__u32' or '__u64', whichever makes more sense here.
I see that your command definition has 'unsigned int', so it's already
broken on 64-bit architectures.
> + case JTAG_IOCXFER:
> + if (copy_from_user(&xfer, (void __user *)arg,
> + sizeof(struct jtag_xfer)))
> + return -EFAULT;
> +
> + user_tdio_data = xfer.tdio;
> + xfer.tdio = jtag_copy_from_user((void __user *)user_tdio_data,
> + xfer.length);
> + if (!xfer.tdio)
> + return -ENOMEM;
You should enforce an upper bound for the length here,
to prevent users from draining kernel memory with giant
buffers.
> +static struct jtag *jtag_get_dev(int id)
> +{
> + struct jtag *jtag;
> +
> + mutex_lock(&jtag_mutex);
> + list_for_each_entry(jtag, &jtag_list, list) {
> + if (jtag->id == id)
> + goto found;
> + }
> + jtag = NULL;
> +found:
> + mutex_unlock(&jtag_mutex);
> + return jtag;
> +}
I'm pretty sure there is a better way to look up the data from the
chardev inode,
though I now forget how that is best done.
> +static const struct file_operations jtag_fops = {
> + .owner = THIS_MODULE,
> + .llseek = no_llseek,
> + .unlocked_ioctl = jtag_ioctl,
> + .open = jtag_open,
> + .release = jtag_release,
> +};
add a compat_ioctl pointer here, after ensuring that all ioctl commands
are compatible between 32-bit and 64-bit user space.
In turn, no_llseek is the default, you can drop that.
> +struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops)
> +{
> + struct jtag *jtag = kzalloc(sizeof(*jtag) + priv_size, GFP_KERNEL);
> +
> + if (!jtag)
> + return NULL;
> +
> + jtag->ops = ops;
> + return jtag;
> +}
> +EXPORT_SYMBOL_GPL(jtag_alloc);
Please add some padding behind 'struct jtag' to ensure
the private data is aligned to ARCH_DMA_MINALIGN,
Arnd
^ permalink raw reply
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
From: Randy Dunlap @ 2017-08-02 15:31 UTC (permalink / raw)
To: Oleksandr Shamray, gregkh, arnd
Cc: linux-kernel, linux-arm-kernel, devicetree, openbmc, joel, jiri,
tklauser, linux-serial, mec, vadimp, system-sw-low-level,
Jiri Pirko
In-Reply-To: <1501679918-20486-3-git-send-email-oleksandrs@mellanox.com>
On 08/02/2017 06:18 AM, Oleksandr Shamray wrote:
>
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> index a8d0149..7bf709c 100644
> --- a/drivers/jtag/Kconfig
> +++ b/drivers/jtag/Kconfig
> @@ -16,3 +16,16 @@ menuconfig JTAG
> To compile this driver as a module, choose M here: the module will
> be called jtag.
>
> +menuconfig JTAG_ASPEED
> + tristate "Aspeed SoC JTAG controller support"
> + depends on JTAG
> + ---help---
> + This provides a support for Aspeed JTAG device, equipped on
> + Aspeed SoC 24xx and 25xx families. Drivers allows programming
> + of hardware devices, connected to SoC through the JTAG interface.
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called aspeed_jtag.
In the Makefile, it looks like it is called jtag-aspeed.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> index e811330..e9fa7fa 100644
> --- a/drivers/jtag/Makefile
> +++ b/drivers/jtag/Makefile
> @@ -1,2 +1,3 @@
> obj-$(CONFIG_JTAG) += jtag.o
> +obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o
--
~Randy
^ permalink raw reply
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
From: Arnd Bergmann @ 2017-08-02 14:56 UTC (permalink / raw)
To: Neil Armstrong
Cc: Oleksandr Shamray, gregkh, devicetree-u79uwXL29TY76Z2rM5mHXA,
Jiří Pírko,
system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w, OpenBMC Maillist,
Linux Kernel Mailing List, mec-WqBc5aa1uDFeoWH0uzbU5w, Jiri Pirko,
Joel Stanley, linux-serial-u79uwXL29TY76Z2rM5mHXA,
vadimp-45czdsxZ+A5DPfheJLI6IQ, Tobias Klauser, Linux ARM
In-Reply-To: <2578d94a-fd1b-9598-251d-59764a870933-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
On Wed, Aug 2, 2017 at 4:30 PM, Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> wrote:
> On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
>> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>> +static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
>> +{
>> + return readl(aspeed_jtag->reg_base + reg);
>> +}
>> +
>> +static void
>> +aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
>> +{
>> + writel(val, aspeed_jtag->reg_base + reg);
>> +}
>
> Maybe readl_relaxed/writel_relaxed would be enough here.
I'd prefer keeping the regular accessors here, unless this is shown
to be a performance bottleneck, and there is a comment to explain
how the relaxed accessors are determined to be safe.
Arnd
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^ permalink raw reply
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
From: Arnd Bergmann @ 2017-08-02 14:54 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, Linux Kernel Mailing List, Linux ARM,
devicetree-u79uwXL29TY76Z2rM5mHXA, OpenBMC Maillist, Joel Stanley,
Jiří Pírko, Tobias Klauser,
linux-serial-u79uwXL29TY76Z2rM5mHXA, mec-WqBc5aa1uDFeoWH0uzbU5w,
vadimp-45czdsxZ+A5DPfheJLI6IQ,
system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w, Jiri Pirko
In-Reply-To: <1501679918-20486-3-git-send-email-oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
On Wed, Aug 2, 2017 at 3:18 PM, Oleksandr Shamray
<oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org> wrote:
> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>
> Driver implements the following jtag ops:
> - freq_get;
> - freq_set;
> - status_get;
> - idle;
> - xfer;
>
> It has been tested on Mellanox system with BMC equipped with
> Aspeed 2520 SoC for programming CPLD devices.
>
> Signed-off-by: Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> Signed-off-by: Jiri Pirko <jiri-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
Looking at this one before the subsystem. Overall looks really nice,
it seems you got a good abstraction between the subsystem and the
driver.
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
> +static int aspeed_jtag_status_get(struct jtag *jtag,
> + enum jtag_endstate *status);
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest);
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
Please try to reorder the functions definitions in a way that lets you
remove the forward declarations.
> +
> +static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
> + char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
> + char sm_idle_irpause[] = {1, 1, 0, 1, 0};
> + char sm_idle_drpause[] = {1, 0, 1, 0};
> + char sm_pause_idle[] = {1, 1, 0};
These could be 'static const' if you adapt the aspeed_jtag_sm_cycle
prototype accordingly.
> +
> +static const struct of_device_id aspeed_jtag_of_match[] = {
> + { .compatible = "aspeed,aspeed-jtag", },
> + {}
> +};
The series should include a patch for the DT binding for this device.
You may want to be a little more specific here, to avoid problems if
aspeed ever makes an updated version of this device with a slightly
different register interface. Usually we include the full name of the
SoC in the "compatible" string for that.
Arnd
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^ permalink raw reply
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
From: Neil Armstrong @ 2017-08-02 14:30 UTC (permalink / raw)
To: Oleksandr Shamray, gregkh, arnd
Cc: devicetree, jiri, system-sw-low-level, openbmc, linux-kernel, mec,
Jiri Pirko, joel, linux-serial, vadimp, tklauser,
linux-arm-kernel
In-Reply-To: <1501679918-20486-3-git-send-email-oleksandrs@mellanox.com>
On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>
> Driver implements the following jtag ops:
> - freq_get;
> - freq_set;
> - status_get;
> - idle;
> - xfer;
>
> It has been tested on Mellanox system with BMC equipped with
> Aspeed 2520 SoC for programming CPLD devices.
>
> Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
> ---
> drivers/jtag/Kconfig | 13 +
> drivers/jtag/Makefile | 1 +
> drivers/jtag/jtag-aspeed.c | 802 ++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 816 insertions(+), 0 deletions(-)
> create mode 100644 drivers/jtag/jtag-aspeed.c
>
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> index a8d0149..7bf709c 100644
> --- a/drivers/jtag/Kconfig
> +++ b/drivers/jtag/Kconfig
> @@ -16,3 +16,16 @@ menuconfig JTAG
> To compile this driver as a module, choose M here: the module will
> be called jtag.
>
> +menuconfig JTAG_ASPEED
> + tristate "Aspeed SoC JTAG controller support"
> + depends on JTAG
> + ---help---
> + This provides a support for Aspeed JTAG device, equipped on
> + Aspeed SoC 24xx and 25xx families. Drivers allows programming
> + of hardware devices, connected to SoC through the JTAG interface.
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called aspeed_jtag.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> index e811330..e9fa7fa 100644
> --- a/drivers/jtag/Makefile
> +++ b/drivers/jtag/Makefile
> @@ -1,2 +1,3 @@
> obj-$(CONFIG_JTAG) += jtag.o
> +obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o
>
> diff --git a/drivers/jtag/jtag-aspeed.c b/drivers/jtag/jtag-aspeed.c
> new file mode 100644
> index 0000000..b820824
> --- /dev/null
> +++ b/drivers/jtag/jtag-aspeed.c
> @@ -0,0 +1,802 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Please use SPDX-License-Identifier here aswell.
> +
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +#include <linux/clk.h>
> +#include <linux/device.h>
> +#include <linux/interrupt.h>
> +#include <linux/jtag.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <uapi/linux/jtag.h>
> +
> +#define ASPEED_JTAG_DATA 0x00
> +#define ASPEED_JTAG_INST 0x04
> +#define ASPEED_JTAG_CTRL 0x08
> +#define ASPEED_JTAG_ISR 0x0C
> +#define ASPEED_JTAG_SW 0x10
> +#define ASPEED_JTAG_TCK 0x14
> +#define ASPEED_JTAG_EC 0x18
> +
> +#define ASPEED_JTAG_DATA_MSB 0x01
> +#define ASPEED_JTAG_DATA_CHUNK_SIZE 0x20
> +
> +/* ASPEED_JTAG_CTRL: Engine Control */
> +#define ASPEED_JTAG_CTL_ENG_EN BIT(31)
> +#define ASPEED_JTAG_CTL_ENG_OUT_EN BIT(30)
> +#define ASPEED_JTAG_CTL_FORCE_TMS BIT(29)
> +#define ASPEED_JTAG_CTL_INST_LEN(x) ((x) << 20)
> +#define ASPEED_JTAG_CTL_LASPEED_INST BIT(17)
> +#define ASPEED_JTAG_CTL_INST_EN BIT(16)
> +#define ASPEED_JTAG_CTL_DR_UPDATE BIT(10)
> +#define ASPEED_JTAG_CTL_DATA_LEN(x) ((x) << 4)
> +#define ASPEED_JTAG_CTL_LASPEED_DATA BIT(1)
> +#define ASPEED_JTAG_CTL_DATA_EN BIT(0)
> +
> +/* ASPEED_JTAG_ISR : Interrupt status and enable */
> +#define ASPEED_JTAG_ISR_INST_PAUSE BIT(19)
> +#define ASPEED_JTAG_ISR_INST_COMPLETE BIT(18)
> +#define ASPEED_JTAG_ISR_DATA_PAUSE BIT(17)
> +#define ASPEED_JTAG_ISR_DATA_COMPLETE BIT(16)
> +#define ASPEED_JTAG_ISR_INST_PAUSE_EN BIT(3)
> +#define ASPEED_JTAG_ISR_INST_COMPLETE_EN BIT(2)
> +#define ASPEED_JTAG_ISR_DATA_PAUSE_EN BIT(1)
> +#define ASPEED_JTAG_ISR_DATA_COMPLETE_EN BIT(0)
> +#define ASPEED_JTAG_ISR_INT_EN_MASK GENMASK(3, 0)
> +#define ASPEED_JTAG_ISR_INT_MASK GENMASK(19, 16)
> +
> +/* ASPEED_JTAG_SW : Software Mode and Status */
> +#define ASPEED_JTAG_SW_MODE_EN BIT(19)
> +#define ASPEED_JTAG_SW_MODE_TCK BIT(18)
> +#define ASPEED_JTAG_SW_MODE_TMS BIT(17)
> +#define ASPEED_JTAG_SW_MODE_TDIO BIT(16)
> +
> +/* ASPEED_JTAG_TCK : TCK Control */
> +#define ASPEED_JTAG_TCK_DIVISOR_MASK GENMASK(10, 0)
> +#define ASPEED_JTAG_TCK_GET_DIV(x) ((x) & ASPEED_JTAG_TCK_DIVISOR_MASK)
> +
> +/* ASPEED_JTAG_EC : Controller set for go to IDLE */
> +#define ASPEED_JTAG_EC_GO_IDLE BIT(0)
> +
> +#define ASPEED_JTAG_IOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
> + ASPEED_JTAG_CTL_ENG_OUT_EN |\
> + ASPEED_JTAG_CTL_INST_LEN(len))
> +
> +#define ASPEED_JTAG_DOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
> + ASPEED_JTAG_CTL_ENG_OUT_EN |\
> + ASPEED_JTAG_CTL_DATA_LEN(len))
> +
> +#define ASPEED_JTAG_TCK_WAIT 10
> +#define ASPEED_JTAG_RESET_CNTR 10
> +
> +#define ASPEED_JTAG_NAME "jtag-aspeed"
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
> +static int aspeed_jtag_status_get(struct jtag *jtag,
> + enum jtag_endstate *status);
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest);
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
> +
> +struct aspeed_jtag {
> + void __iomem *reg_base;
> + struct device *dev;
> + struct clk *pclk;
> + enum jtag_endstate status;
> + int irq;
> + u32 flag;
> + wait_queue_head_t jtag_wq;
> + bool is_open;
> +};
> +
> +static char *end_status_str[] = {"idle", "ir pause", "drpause"};
> +
> +static struct jtag_ops aspeed_jtag_ops = {
> + .freq_get = aspeed_jtag_freq_get,
> + .freq_set = aspeed_jtag_freq_set,
> + .status_get = aspeed_jtag_status_get,
> + .idle = aspeed_jtag_idle,
> + .xfer = aspeed_jtag_xfer
> +};
> +
> +static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
> +{
> + return readl(aspeed_jtag->reg_base + reg);
> +}
> +
> +static void
> +aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
> +{
> + writel(val, aspeed_jtag->reg_base + reg);
> +}
Maybe readl_relaxed/writel_relaxed would be enough here.
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + u16 div;
> + u32 tck_val;
> + unsigned long apb_frq;
> +
> + apb_frq = clk_get_rate(aspeed_jtag->pclk);
> + div = (apb_frq % freq == 0) ? (apb_frq / freq) - 1 : (apb_frq / freq);
> + tck_val = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
> + aspeed_jtag_write(aspeed_jtag,
> + (tck_val & ASPEED_JTAG_TCK_DIVISOR_MASK) | div,
> + ASPEED_JTAG_TCK);
> + return 0;
> +}
> +
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + u32 pclk;
> + u32 tck;
> +
> + pclk = clk_get_rate(aspeed_jtag->pclk);
> + tck = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
> + *frq = pclk / (ASPEED_JTAG_TCK_GET_DIV(tck) + 1);
> +
> + return 0;
> +}
> +
> +static void aspeed_jtag_sw_delay(struct aspeed_jtag *aspeed_jtag, int cnt)
> +{
> + int i;
> +
> + for (i = 0; i < cnt; i++)
> + aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW);
> +}
> +
> +static char aspeed_jtag_tck_cycle(struct aspeed_jtag *aspeed_jtag,
> + u8 tms, u8 tdi)
> +{
> + char tdo = 0;
> +
> + /* TCK = 0 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> +
> + aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
> +
> + /* TCK = 1 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TCK |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> +
> + if (aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW) &
> + ASPEED_JTAG_SW_MODE_TDIO)
> + tdo = 1;
> +
> + aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
> +
> + /* TCK = 0 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> + return tdo;
> +}
> +
> +static void aspeed_jtag_wait_instruction_pause(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_INST_PAUSE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_PAUSE;
> +}
> +
> +static void
> +aspeed_jtag_wait_instruction_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_INST_COMPLETE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_COMPLETE;
> +}
> +
> +static void
> +aspeed_jtag_wait_data_pause_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_DATA_PAUSE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_PAUSE;
> +}
> +
> +static void aspeed_jtag_wait_data_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_DATA_COMPLETE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_COMPLETE;
> +}
> +
> +static void aspeed_jtag_sm_cycle(struct aspeed_jtag *aspeed_jtag, u8 *tms,
> + int len)
> +{
> + int i;
> +
> + for (i = 0; i < len; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, tms[i], 0);
> +}
> +
> +static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
> + char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
> + char sm_idle_irpause[] = {1, 1, 0, 1, 0};
> + char sm_idle_drpause[] = {1, 0, 1, 0};
> + char sm_pause_idle[] = {1, 1, 0};
> + int i;
> +
> + /* SW mode from idle/pause-> to pause/idle */
> + if (runtest->reset) {
> + for (i = 0; i < ASPEED_JTAG_RESET_CNTR; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, 1, 0);
> + }
> +
> + switch (aspeed_jtag->status) {
> + case JTAG_STATE_IDLE:
> + switch (runtest->endstate) {
> + case JTAG_STATE_PAUSEIR:
> + /* ->DRSCan->IRSCan->IRCap->IRExit1->PauseIR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_irpause,
> + sizeof(sm_idle_irpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEIR;
> + break;
> + case JTAG_STATE_PAUSEDR:
> + /* ->DRSCan->DRCap->DRExit1->PauseDR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_drpause,
> + sizeof(sm_idle_drpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEDR;
> + break;
> + case JTAG_STATE_IDLE:
> + /* IDLE */
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + break;
> + default:
> + break;
> + }
> + break;
> +
> + case JTAG_STATE_PAUSEIR:
> + /* Fall-through */
> + case JTAG_STATE_PAUSEDR:
> + /* From IR/DR Pause */
> + switch (runtest->endstate) {
> + case JTAG_STATE_PAUSEIR:
> + /*
> + * to Exit2 IR/DR->Updt IR/DR->DRSCan->IRSCan->IRCap->
> + * IRExit1->PauseIR
> + */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_irpause,
> + sizeof(sm_pause_irpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEIR;
> + break;
> + case JTAG_STATE_PAUSEDR:
> + /*
> + * to Exit2 IR/DR->Updt IR/DR->DRSCan->DRCap->
> + * DRExit1->PauseDR
> + */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_drpause,
> + sizeof(sm_pause_drpause));
> + aspeed_jtag->status = JTAG_STATE_PAUSEDR;
> + break;
> + case JTAG_STATE_IDLE:
> + /* to Exit2 IR/DR->Updt IR/DR->IDLE */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
> + sizeof(sm_pause_idle));
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + break;
> + default:
> + break;
> + }
> + break;
> +
> + default:
> + dev_err(aspeed_jtag->dev, "aspeed_jtag_run_test_idle error\n");
> + break;
> + }
> +
> + /* Stay on IDLE for at least TCK cycle */
> + for (i = 0; i < runtest->tck; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> +}
> +
> +/**
> + * aspeed_jtag_run_test_idle:
> + * JTAG reset: generates at least 9 TMS high and 1 TMS low to force
> + * devices into Run-Test/Idle State.
> + */
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> +
> + dev_dbg(aspeed_jtag->dev, "aspeed_jtag runtest, status:%d, mode:%s, state:%s, reset:%d, tck:%d\n",
> + aspeed_jtag->status, runtest->mode ? "SW" : "HW",
> + end_status_str[runtest->endstate], runtest->reset,
> + runtest->tck);
> +
> + if (runtest->mode) {
> + aspeed_jtag_run_test_idle_sw(aspeed_jtag, runtest);
> + return 0;
> + }
> +
> + /* Disable sw mode */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
> + /* x TMS high + 1 TMS low */
> + if (runtest->reset)
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
> + ASPEED_JTAG_CTL_ENG_OUT_EN |
> + ASPEED_JTAG_CTL_FORCE_TMS, ASPEED_JTAG_CTRL);
> + else
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_EC_GO_IDLE,
> + ASPEED_JTAG_EC);
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + return 0;
> +}
> +
> +static void aspeed_jtag_xfer_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_xfer *xfer, char *tdio_data)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long shift_bits = 0;
> + unsigned long index = 0;
> + unsigned long tdi;
> + char tdo;
> + unsigned long *data = (unsigned long *)tdio_data;
> +
> + if (xfer->direction == JTAG_READ_XFER)
> + tdi = UINT_MAX;
> + else
> + tdi = data[index];
> +
> + while (remain_xfer > 1) {
> + tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 0,
> + tdi & ASPEED_JTAG_DATA_MSB);
> + data[index] |= tdo << (shift_bits %
> + ASPEED_JTAG_DATA_CHUNK_SIZE);
> +
> + tdi >>= 1;
> + shift_bits++;
> + remain_xfer--;
> +
> + if (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE == 0) {
> + dev_dbg(aspeed_jtag->dev, "R/W data[%lu]:%lx\n",
> + index, data[index]);
> +
> + tdo = 0;
> + index++;
> +
> + if (xfer->direction == JTAG_READ_XFER)
> + tdi = UINT_MAX;
> + else
> + tdi = data[index];
> + }
> + }
> +
> + tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 1, tdi & ASPEED_JTAG_DATA_MSB);
> + data[index] |= tdo << (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE);
> +}
> +
> +static void aspeed_jtag_xfer_push_data(struct aspeed_jtag *aspeed_jtag,
> + enum jtag_xfer_type type, u32 bits_len)
> +{
> + dev_dbg(aspeed_jtag->dev, "shift bits %d\n", bits_len);
> +
> + if (type == JTAG_SIR_XFER) {
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_IOUT_LEN(bits_len),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
> + ASPEED_JTAG_CTL_INST_EN, ASPEED_JTAG_CTRL);
> + } else {
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
> + ASPEED_JTAG_CTL_DATA_EN, ASPEED_JTAG_CTRL);
> + }
> +}
> +
> +static void aspeed_jtag_xfer_push_data_last(struct aspeed_jtag *aspeed_jtag,
> + enum jtag_xfer_type type,
> + u32 shift_bits,
> + enum jtag_endstate endstate)
> +{
> + if (endstate != JTAG_STATE_IDLE) {
> + if (type == JTAG_SIR_XFER) {
> + dev_dbg(aspeed_jtag->dev, "IR Keep Pause\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_INST_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_instruction_pause(aspeed_jtag);
> + } else {
> + dev_dbg(aspeed_jtag->dev, "DR Keep Pause\n");
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_DR_UPDATE,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_DR_UPDATE |
> + ASPEED_JTAG_CTL_DATA_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_data_pause_complete(aspeed_jtag);
> + }
> + } else {
> + if (type == JTAG_SIR_XFER) {
> + dev_dbg(aspeed_jtag->dev, "IR go IDLE\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_INST,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_INST |
> + ASPEED_JTAG_CTL_INST_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_instruction_complete(aspeed_jtag);
> + } else {
> + dev_dbg(aspeed_jtag->dev, "DR go IDLE\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_DATA,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_DATA |
> + ASPEED_JTAG_CTL_DATA_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_data_complete(aspeed_jtag);
> + }
> + }
> +}
> +
> +static void aspeed_jtag_xfer_hw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_xfer *xfer, char *tdio_data)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long *data = (unsigned long *)tdio_data;
> + unsigned long shift_bits;
> + unsigned long index = 0;
> + u32 data_reg;
> +
> + data_reg = xfer->type == JTAG_SIR_XFER ?
> + ASPEED_JTAG_INST : ASPEED_JTAG_DATA;
> + while (remain_xfer) {
> + if (xfer->direction == JTAG_WRITE_XFER) {
> + dev_dbg(aspeed_jtag->dev, "W dr->dr_data[%lu]:%lx\n",
> + index, data[index]);
> +
> + aspeed_jtag_write(aspeed_jtag, data[index], data_reg);
> + } else {
> + aspeed_jtag_write(aspeed_jtag, 0, data_reg);
> + }
> +
> + if (remain_xfer > ASPEED_JTAG_DATA_CHUNK_SIZE) {
> + shift_bits = ASPEED_JTAG_DATA_CHUNK_SIZE;
> +
> + /*
> + * Read bytes were not equals to column length
> + * and go to Pause-DR
> + */
> + aspeed_jtag_xfer_push_data(aspeed_jtag, xfer->type,
> + shift_bits);
> + } else {
> + /*
> + * Read bytes equals to column length =>
> + * Update-DR
> + */
> + shift_bits = remain_xfer;
> + aspeed_jtag_xfer_push_data_last(aspeed_jtag, xfer->type,
> + shift_bits,
> + xfer->endstate);
> + }
> +
> + if (xfer->direction == JTAG_READ_XFER) {
> + if (shift_bits < ASPEED_JTAG_DATA_CHUNK_SIZE) {
> + data[index] = aspeed_jtag_read(aspeed_jtag,
> + data_reg);
> +
> + data[index] >>= ASPEED_JTAG_DATA_CHUNK_SIZE -
> + shift_bits;
> + } else
> + data[index] = aspeed_jtag_read(aspeed_jtag,
> + data_reg);
> + dev_dbg(aspeed_jtag->dev, "R dr->dr_data[%lu]:%lx\n",
> + index, data[index]);
> + }
> +
> + remain_xfer = remain_xfer - shift_bits;
> + index++;
> + dev_dbg(aspeed_jtag->dev, "remain_xfer %lu\n", remain_xfer);
> + }
> +}
> +
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long *data = (unsigned long *)xfer->tdio;
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + char sm_update_shiftir[] = {1, 1, 0, 0};
> + char sm_update_shiftdr[] = {1, 0, 0};
> + char sm_pause_idle[] = {1, 1, 0};
> + char sm_pause_update[] = {1, 1};
> + unsigned long offset;
> + char dbg_str[256];
> + int pos = 0;
> + int i;
> +
> + for (offset = 0, i = 0; offset < xfer->length;
> + offset += ASPEED_JTAG_DATA_CHUNK_SIZE, i++) {
> + pos += snprintf(&dbg_str[pos], sizeof(dbg_str) - pos,
> + "0x%08lx ", data[i]);
> + }
> +
> + dev_dbg(aspeed_jtag->dev, "aspeed_jtag %s %s xfer, mode:%s, END:%d, len:%lu, TDI[%s]\n",
> + xfer->type == JTAG_SIR_XFER ? "SIR" : "SDR",
> + xfer->direction == JTAG_READ_XFER ? "READ" : "WRITE",
> + xfer->mode ? "SW" : "HW",
> + xfer->endstate, remain_xfer, dbg_str);
> +
> + if (xfer->mode == JTAG_XFER_SW_MODE) {
> + /* SW mode */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + if (aspeed_jtag->status != JTAG_STATE_IDLE) {
> + /*IR/DR Pause->Exit2 IR / DR->Update IR /DR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_update,
> + sizeof(sm_pause_update));
> + }
> +
> + if (xfer->type == JTAG_SIR_XFER)
> + /* ->IRSCan->CapIR->ShiftIR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftir,
> + sizeof(sm_update_shiftir));
> + else
> + /* ->DRScan->DRCap->DRShift */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftdr,
> + sizeof(sm_update_shiftdr));
> +
> + aspeed_jtag_xfer_sw(aspeed_jtag, xfer, xfer->tdio);
> +
> + /* DIPause/DRPause */
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> +
> + if (xfer->endstate == JTAG_STATE_IDLE) {
> + /* ->DRExit2->DRUpdate->IDLE */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
> + sizeof(sm_pause_idle));
> + }
> + } else {
> + /* hw mode */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
> + aspeed_jtag_xfer_hw(aspeed_jtag, xfer, xfer->tdio);
> + }
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> + aspeed_jtag->status = xfer->endstate;
> + return 0;
> +}
> +
> +static int aspeed_jtag_status_get(struct jtag *jtag, enum jtag_endstate *status)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> +
> + *status = aspeed_jtag->status;
> + return 0;
> +}
> +
> +static irqreturn_t aspeed_jtag_interrupt(s32 this_irq, void *dev_id)
> +{
> + struct aspeed_jtag *aspeed_jtag = dev_id;
> + u32 status;
> + irqreturn_t ret;
> +
> + status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR);
> + dev_dbg(aspeed_jtag->dev, "status %x\n", status);
> +
> + if (status & ASPEED_JTAG_ISR_INT_MASK) {
> + aspeed_jtag_write(aspeed_jtag,
> + (status & ASPEED_JTAG_ISR_INT_MASK)
> + | (status & ASPEED_JTAG_ISR_INT_EN_MASK),
> + ASPEED_JTAG_ISR);
> + aspeed_jtag->flag |= status & ASPEED_JTAG_ISR_INT_MASK;
> + }
> +
> + if (aspeed_jtag->flag) {
> + wake_up_interruptible(&aspeed_jtag->jtag_wq);
> + ret = IRQ_HANDLED;
> + } else {
> + dev_err(aspeed_jtag->dev, "aspeed_jtag irq status:%x\n",
> + status);
> + ret = IRQ_NONE;
> + }
> + return ret;
> +}
> +
> +int aspeed_jtag_init(struct platform_device *pdev,
> + struct aspeed_jtag *aspeed_jtag)
> +{
> + struct resource *res;
> + int err;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + aspeed_jtag->reg_base = devm_ioremap_resource(aspeed_jtag->dev, res);
> + if (IS_ERR(aspeed_jtag->reg_base)) {
> + err = -ENOMEM;
> + goto out_region;
> + }
> +
> + aspeed_jtag->pclk = devm_clk_get(aspeed_jtag->dev, NULL);
> + if (IS_ERR(aspeed_jtag->pclk)) {
> + dev_err(aspeed_jtag->dev, "devm_clk_get failed\n");
> + return PTR_ERR(aspeed_jtag->pclk);
> + }
clk_prepare_enable ?
> +
> + aspeed_jtag->irq = platform_get_irq(pdev, 0);
> + if (aspeed_jtag->irq < 0) {
> + dev_err(aspeed_jtag->dev, "no irq specified\n");
> + err = -ENOENT;
> + goto out_region;
> + }
> +
> + /* Enable clock */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
> + ASPEED_JTAG_CTL_ENG_OUT_EN, ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + err = devm_request_irq(aspeed_jtag->dev, aspeed_jtag->irq,
> + aspeed_jtag_interrupt, 0,
> + "aspeed-jtag", aspeed_jtag);
> + if (err) {
> + dev_err(aspeed_jtag->dev, "aspeed_jtag unable to get IRQ");
> + goto out_region;
> + }
> + dev_dbg(&pdev->dev, "aspeed_jtag:IRQ %d.\n", aspeed_jtag->irq);
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_INST_PAUSE |
> + ASPEED_JTAG_ISR_INST_COMPLETE |
> + ASPEED_JTAG_ISR_DATA_PAUSE |
> + ASPEED_JTAG_ISR_DATA_COMPLETE |
> + ASPEED_JTAG_ISR_INST_PAUSE_EN |
> + ASPEED_JTAG_ISR_INST_COMPLETE_EN |
> + ASPEED_JTAG_ISR_DATA_PAUSE_EN |
> + ASPEED_JTAG_ISR_DATA_COMPLETE_EN,
> + ASPEED_JTAG_ISR);
> +
> + aspeed_jtag->flag = 0;
> + init_waitqueue_head(&aspeed_jtag->jtag_wq);
> + return 0;
> +
> +out_region:
> + release_mem_region(res->start, res->end - res->start + 1);
> + return err;
> +}
> +
> +int aspeed_jtag_deinit(struct platform_device *pdev,
> + struct aspeed_jtag *aspeed_jtag)
> +{
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_ISR);
> + devm_free_irq(aspeed_jtag->dev, aspeed_jtag->irq, aspeed_jtag);
> + /* Disabe clock */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_CTRL);
clk_prepare_disable ?
> + return 0;
> +}
> +
> +static int aspeed_jtag_probe(struct platform_device *pdev)
> +{
> + struct aspeed_jtag *aspeed_jtag;
> + struct jtag *jtag;
> + int err;
> +
> + if (!of_device_is_compatible(pdev->dev.of_node, "aspeed,aspeed-jtag"))
> + return -ENOMEM;
> +
> + jtag = jtag_alloc(sizeof(*aspeed_jtag), &aspeed_jtag_ops);
> + if (!jtag)
> + return -ENODEV;
> +
> + platform_set_drvdata(pdev, jtag);
> + aspeed_jtag = jtag_priv(jtag);
> + aspeed_jtag->dev = &pdev->dev;
> +
> + /* Initialize device*/
> + err = aspeed_jtag_init(pdev, aspeed_jtag);
> + if (err)
> + goto err_jtag_init;
> +
> + /* Initialize JTAG core structure*/
> + err = jtag_register(jtag);
> + if (err)
> + goto err_jtag_register;
> +
> + return 0;
> +
> +err_jtag_register:
> + aspeed_jtag_deinit(pdev, aspeed_jtag);
> +err_jtag_init:
> + jtag_free(jtag);
> + return err;
> +}
> +
> +static int aspeed_jtag_remove(struct platform_device *pdev)
> +{
> + struct jtag *jtag;
> +
> + jtag = platform_get_drvdata(pdev);
> + aspeed_jtag_deinit(pdev, jtag_priv(jtag));
> + jtag_unregister(jtag);
> + jtag_free(jtag);
> + return 0;
> +}
> +
> +static const struct of_device_id aspeed_jtag_of_match[] = {
> + { .compatible = "aspeed,aspeed-jtag", },
Please use soc-specific compatible name.
> + {}
> +};
> +
> +static struct platform_driver aspeed_jtag_driver = {
> + .probe = aspeed_jtag_probe,
> + .remove = aspeed_jtag_remove,
> + .driver = {
> + .name = ASPEED_JTAG_NAME,
> + .of_match_table = aspeed_jtag_of_match,
> + },
> +};
> +module_platform_driver(aspeed_jtag_driver);
> +
> +MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
> +MODULE_DESCRIPTION("ASPEED JTAG driver");
> +MODULE_LICENSE("Dual BSD/GPL");
>
Hi Oleksandr,
Great work, but you forgot to add proper dt-bindings for the driver.
Neil
^ permalink raw reply
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
From: Neil Armstrong @ 2017-08-02 14:24 UTC (permalink / raw)
To: Oleksandr Shamray, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
arnd-r2nGTMty4D4
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, jiri-rHqAuBHg3fBzbRFIqnYvSA,
system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w,
openbmc-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, mec-WqBc5aa1uDFeoWH0uzbU5w,
Jiri Pirko, joel-U3u1mxZcP9KHXe+LvDLADg,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
vadimp-45czdsxZ+A5DPfheJLI6IQ, tklauser-93Khv+1bN0NyDzI6CaY1VQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1501679918-20486-2-git-send-email-oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
> JTAG class driver provide infrastructure to support hardware/software
> JTAG platform drivers. It provide user layer API interface for flashing
> and debugging external devices which equipped with JTAG interface
> using standard transactions.
>
> Driver exposes set of IOCTL to user space for:
> - XFER:
> - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
> - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
> - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
> number of clocks).
> - SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
>
> Driver core provides set of internal APIs for allocation and
> registration:
> - jtag_register;
> - jtag_unregister;
> - jtag_alloc;
> - jtag_free;
>
> Platform driver on registration with jtag-core creates the next
> entry in dev folder:
> /dev/jtagX
>
> Signed-off-by: Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> Signed-off-by: Jiri Pirko <jiri-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> ---
> Documentation/ioctl/ioctl-number.txt | 2 +
> MAINTAINERS | 8 +
> drivers/Kconfig | 2 +
> drivers/Makefile | 1 +
> drivers/jtag/Kconfig | 18 ++
> drivers/jtag/Makefile | 2 +
> drivers/jtag/jtag.c | 347 ++++++++++++++++++++++++++++++++++
> include/linux/jtag.h | 63 ++++++
> include/uapi/linux/jtag.h | 133 +++++++++++++
> 9 files changed, 576 insertions(+), 0 deletions(-)
> create mode 100644 drivers/jtag/Kconfig
> create mode 100644 drivers/jtag/Makefile
> create mode 100644 drivers/jtag/jtag.c
> create mode 100644 include/linux/jtag.h
> create mode 100644 include/uapi/linux/jtag.h
>
> diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
> index 3e3fdae..1af2508 100644
> --- a/Documentation/ioctl/ioctl-number.txt
> +++ b/Documentation/ioctl/ioctl-number.txt
> @@ -321,6 +321,8 @@ Code Seq#(hex) Include File Comments
> 0xB0 all RATIO devices in development:
> <mailto:vgo-/IYFIZglx74@public.gmane.org>
> 0xB1 00-1F PPPoX <mailto:mostrows-TTukF6hB3AoKZpuMuFhwt/d9D2ou9A/h@public.gmane.org>
> +0xB2 00-0f linux/jtag.h JTAG driver
> + <mailto:oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> 0xB3 00 linux/mmc/ioctl.h
> 0xB4 00-0F linux/gpio.h <mailto:linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 205d397..141aeaf 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7292,6 +7292,14 @@ L: linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> S: Maintained
> F: drivers/tty/serial/jsm/
>
> +JTAG SUBSYSTEM
> +M: Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> +M: Vadim Pasternak <vadimp-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> +S: Maintained
> +F: include/linux/jtag.h
> +F: include/uapi/linux/jtag.h
> +F: drivers/jtag/
> +
> K10TEMP HARDWARE MONITORING DRIVER
> M: Clemens Ladisch <clemens-P6GI/4k7KOmELgA04lAiVw@public.gmane.org>
> L: linux-hwmon-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index 505c676..2214678 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -208,4 +208,6 @@ source "drivers/tee/Kconfig"
>
> source "drivers/mux/Kconfig"
>
> +source "drivers/jtag/Kconfig"
> +
> endmenu
> diff --git a/drivers/Makefile b/drivers/Makefile
> index dfdcda0..6a2059b 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -182,3 +182,4 @@ obj-$(CONFIG_FPGA) += fpga/
> obj-$(CONFIG_FSI) += fsi/
> obj-$(CONFIG_TEE) += tee/
> obj-$(CONFIG_MULTIPLEXER) += mux/
> +obj-$(CONFIG_JTAG) += jtag/
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> new file mode 100644
> index 0000000..a8d0149
> --- /dev/null
> +++ b/drivers/jtag/Kconfig
> @@ -0,0 +1,18 @@
> +menuconfig JTAG
> + tristate "JTAG support"
> + default n
> + ---help---
> + This provides basic core functionality support for jtag class devices
> + Hardware equipped with JTAG microcontroller which can be built
> + on top of this drivers. Driver exposes the set of IOCTL to the
> + user space for:
> + SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
> + SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
> + RUNTEST (Forces IEEE 1149.1 bus to a run state for specified
> + number of clocks).
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called jtag.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> new file mode 100644
> index 0000000..e811330
> --- /dev/null
> +++ b/drivers/jtag/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_JTAG) += jtag.o
> +
> diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
> new file mode 100644
> index 0000000..a933bc1
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
> @@ -0,0 +1,347 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Maybe using SPDX-License-Identifier could save us from hundred of useless lines !
Neil
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^ permalink raw reply
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
From: Andrew Lunn @ 2017-08-02 14:16 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, arnd, devicetree, jiri, system-sw-low-level, openbmc,
linux-kernel, mec, Jiri Pirko, joel, linux-serial, vadimp,
tklauser, linux-arm-kernel
In-Reply-To: <1501679918-20486-2-git-send-email-oleksandrs@mellanox.com>
> +void jtag_unregister(struct jtag *jtag)
> +{
> + struct device *dev = jtag->dev;
> +
> + mutex_lock(&jtag_mutex);
> + list_add_tail(&jtag->list, &jtag_list);
add?
> + mutex_unlock(&jtag_mutex);
> + cdev_del(&jtag->cdev);
> + device_unregister(dev);
> + ida_simple_remove(&jtag_ida, jtag->id);
> +}
Andrew
^ permalink raw reply
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