* [RFC PATCH 0/3] tty: amba-pl011: Decruft and streamline earlycon output
From: Dave Martin @ 2017-10-18 14:14 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Andre Przywara, Stephen Boyd, Russell King, Andy Gross,
linux-serial, Greg Kroah-Hartman, Bhupinder Thakur
This series avoids waiting for the UART transmitter to go idle in
between every earlycon char written, and does some refactoring so that
this change doesn't have to be implemented multiple times.
The initial motiviation for this is a performance issue encountered
during Xen virtual UART development (see [1] and patch 3).
It's debatable whether this is Linux's responsibility or the
responsibility of the virtual UART: this is a situation where the
virtualised behaviour is inevitably so different from hardware that
it's hard to make a ruling on exactly what behaviour is reasonable.
The best course is probably to work around it on _both_ ends, in the
interest of best interoperation.
Currently amba-pl011 has two distinct earlycon implementations: a
generic pl011 implementation and a quirked implementation that works
around the lack of a usable BUSY status bit in QDF2400 SoCs.
I don't like applying the same obscure fix in multiple places if I can
avoid it, so I've had a go at unifying the earlycons here (patches 1-2).
I'd appreciate people's views, particularly on:
* (pl011) Whether to refactor harder: the caching of vendor->reg_offset
vendor->access_32b in uart_amba_port is convenient and avoids chasing
an extra pointer in the common case, but this the refactoring for the
earlycon case a bit ugly. Maybe we can do better.
* (pl011, serial_core) Whether the new use of port->private_data will
conflict with existing code (no, AFAICT).
* (earlycon) Whether overriding port->iotype for 32-bit-only
implementations is the right thing to do.
* (earlycon) Whether there is some reason to drain the transmitter
after every char that I've overlooked.
Currently I don't consider this to be a candidate for stable, but it
could be backported. Due to the steady quirkage churn in amba-pl011,
it would be better to drop the refactoring stuff for backporting
purposes.
Testing:
* tested rather casually no ARM Juno r0 (real PL011) and the ARM VFP
Base Model (emulated PL011)
* *Not tested* on QDF2400, since I don't have access to one.
Someone probably ought to test that.
[1] Re: [Xen-devel] [PATCH 26/27 v12] arm/xen: vpl011: Fix the slow
early console SBSA UART output
https://lists.xenproject.org/archives/html/xen-devel/2017-10/msg01949.html
Dave Martin (3):
tty: amba-pl011: earlycon: Switch to relaxed I/O
tty: amba-pl011: earlycon: Unify earlycon backends
tty: amba-pl011: earlycon: Don't drain the transmitter after each char
drivers/tty/serial/amba-pl011.c | 108 +++++++++++++++++++++++-----------------
1 file changed, 61 insertions(+), 47 deletions(-)
--
2.1.4
^ permalink raw reply
* Re: [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
From: Rob Herring @ 2017-10-18 13:29 UTC (permalink / raw)
To: Miquel RAYNAL
Cc: Thomas Petazzoni, Andrew Lunn, Catalin Marinas, Jason Cooper,
devicetree@vger.kernel.org, Greg Kroah-Hartman, Linus Walleij,
Will Deacon, Nadav Haklai, linux-gpio@vger.kernel.org,
linux-serial@vger.kernel.org, Jiri Slaby, Gregory Clement,
Wilson Ding, Antoine Tenart, linux-arm-kernel@lists.infradead.org,
Sebastian Hesselbarth
In-Reply-To: <20171018082531.59a2e5d0@xps13>
On Wed, Oct 18, 2017 at 1:25 AM, Miquel RAYNAL
<miquel.raynal@free-electrons.com> wrote:
> Hi Rob,
>
> On Tue, 17 Oct 2017 17:00:22 -0500
> Rob Herring <robh@kernel.org> wrote:
>
>> On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
>> > Update the Device Tree binding documentation for the Marvell EBU
>> > UART, in order to allow describing the extended UART IP block, in
>> > addition to the already supported standard UART IP. This requires
>> > adding a new compatible string, the introduction of a clocks
>> > property, and extensions to the interrupts property.
>> >
>> > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
>> > Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>> > ---
>> > .../devicetree/bindings/serial/mvebu-uart.txt | 49
>> > +++++++++++++++++++--- 1 file changed, 44 insertions(+), 5
>> > deletions(-)
>> >
>> > diff --git
>> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
>> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index
>> > d37fabe17bd1..3df3a3fab4bb 100644 ---
>> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++
>> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@ -1,13
>> > +1,52 @@ -* Marvell UART : Non standard UART used in some of
>> > Marvell EBU SoCs (e.g., Armada-3700) +* Marvell UART : Non standard
>> > UART used in some of Marvell EBU SoCs
>> > + e.g., Armada-3700.
>> >
>> > Required properties:
>> > -- compatible: "marvell,armada-3700-uart"
>> > +- compatible:
>> > + - "marvell,armada-3700-uart" for the standard variant of the
>> > UART
>> > + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
>> > + FIFO, baudrate limited to 230400).
>> > + - "marvell,armada-3700-uart-ext" for the extended variant of
>> > the
>> > + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
>> > + accesses to the FIFO, baudrate unlimited by the dividers).
>>
>> What do you call the next extended version?
>> marvell,armada-3700-uart-ext-ext?
>
> I don't know what you mean by "next extended version"?
IP evolves on new chips with new features. Just trying to understand
how you are
>> This is different versions of UART on the same chip?
>
> Today in mainline there is support for the A3700 UART IP.
> This series add support for another IP, based on the A3700, but with
> extended features (explaining the -ext suffix).
>
> Can you precise what is bothering you?
Is this different versions of UART IP on 1 chip or a new version of
the UART IP on a new SoC? The latter should be a new compatible with
the new SoC. The former case does happen some, but is not common. I'm
just trying to understand which applies here.
>> > - reg: offset and length of the register set for the device.
>> > -- interrupts: device interrupt
>> > +- clocks: UART reference clock used to derive the baudrate (only
>> > + mandatory with "marvell,armada-3700-uart-ext" compatible).
>>
>> How is this optional? The freq is fixed if not present? If so, what
>> frequency?
>
> The "clocks" property should not be optional at all but that is how the
> bindings were handled before this series, so I can't tell now that
> this property is mandatory as it would break compatibility with older
> versions of the driver.
Okay. I think it should be mandatory with a note how missing property
is handled.
> When no clock is provided, the frequency is fixed by the bootloader
> and cannot be changed. There is no standard frequency for it but the
> one chosen by the bootloader often is 115200 as the UART is usually
> used as the serial console.
>
> Because the bootloader does only initialize the UART in use for the
> serial console, the clock is mandatory when using another port or it
> will not work at all.
^ permalink raw reply
* Re: [PATCH 2/2] serdev: ttyport: add missing open() error handling
From: Johan Hovold @ 2017-10-18 7:01 UTC (permalink / raw)
To: Rob Herring
Cc: Johan Hovold, Greg Kroah-Hartman, Jiri Slaby,
linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <CAL_JsqKe_yLODOuUXaivFC3VMoy9EmgUhb+3LRmw5C3DvtdVKg@mail.gmail.com>
On Tue, Oct 17, 2017 at 11:08:53AM -0500, Rob Herring wrote:
> On Mon, Oct 16, 2017 at 8:06 AM, Johan Hovold <johan@kernel.org> wrote:
> > Add missing error handling for tty-driver open() which may fail (e.g. if
> > resource allocation fails or if a port is being disconnected).
> >
> > Note that close() must be called also in case of failed open() and that
> > the operation sanity check is amended to catch buggy drivers.
>
> That's a very odd pattern. Wouldn't a must_check annotation be enough?
An odd pattern indeed, but that's how the TTY drivers are implemented
and the interface documented (i.e. that close() will be called also
after failed open()).
Not sure how a must_check could help here.
Johan
^ permalink raw reply
* Re: [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
From: Miquel RAYNAL @ 2017-10-18 6:25 UTC (permalink / raw)
To: Rob Herring
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon, linux-serial, devicetree,
linux-arm-kernel, linux-gpio, Thomas Petazzoni, Antoine Tenart,
Nadav Haklai, Wilson Ding
In-Reply-To: <20171017220022.kr2qiodln3qfkbwe@rob-hp-laptop>
Hi Rob,
On Tue, 17 Oct 2017 17:00:22 -0500
Rob Herring <robh@kernel.org> wrote:
> On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
> > Update the Device Tree binding documentation for the Marvell EBU
> > UART, in order to allow describing the extended UART IP block, in
> > addition to the already supported standard UART IP. This requires
> > adding a new compatible string, the introduction of a clocks
> > property, and extensions to the interrupts property.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> > Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> > ---
> > .../devicetree/bindings/serial/mvebu-uart.txt | 49
> > +++++++++++++++++++--- 1 file changed, 44 insertions(+), 5
> > deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index
> > d37fabe17bd1..3df3a3fab4bb 100644 ---
> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++
> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@ -1,13
> > +1,52 @@ -* Marvell UART : Non standard UART used in some of
> > Marvell EBU SoCs (e.g., Armada-3700) +* Marvell UART : Non standard
> > UART used in some of Marvell EBU SoCs
> > + e.g., Armada-3700.
> >
> > Required properties:
> > -- compatible: "marvell,armada-3700-uart"
> > +- compatible:
> > + - "marvell,armada-3700-uart" for the standard variant of the
> > UART
> > + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
> > + FIFO, baudrate limited to 230400).
> > + - "marvell,armada-3700-uart-ext" for the extended variant of
> > the
> > + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
> > + accesses to the FIFO, baudrate unlimited by the dividers).
>
> What do you call the next extended version?
> marvell,armada-3700-uart-ext-ext?
I don't know what you mean by "next extended version"?
>
> This is different versions of UART on the same chip?
Today in mainline there is support for the A3700 UART IP.
This series add support for another IP, based on the A3700, but with
extended features (explaining the -ext suffix).
Can you precise what is bothering you?
>
> > - reg: offset and length of the register set for the device.
> > -- interrupts: device interrupt
> > +- clocks: UART reference clock used to derive the baudrate (only
> > + mandatory with "marvell,armada-3700-uart-ext" compatible).
>
> How is this optional? The freq is fixed if not present? If so, what
> frequency?
The "clocks" property should not be optional at all but that is how the
bindings were handled before this series, so I can't tell now that
this property is mandatory as it would break compatibility with older
versions of the driver.
When no clock is provided, the frequency is fixed by the bootloader
and cannot be changed. There is no standard frequency for it but the
one chosen by the bootloader often is 115200 as the UART is usually
used as the serial console.
Because the bootloader does only initialize the UART in use for the
serial console, the clock is mandatory when using another port or it
will not work at all.
>
> > +- interrupts:
> > + - Must contain three elements for the standard variant of the
> > IP
> > + (marvell,armada-3700-uart): "uart-sum", "uart-tx" and
> > "uart-rx",
> > + respectively the UART sum interrupt, the UART TX interrupt
> > and
> > + UART RX interrupt. A corresponding interrupt-names property
> > must
> > + be defined.
> > + - Must contain two elements for the extended variant of the IP
> > + (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
> > + respectively the UART TX interrupt and the UART RX
> > interrupt. A
> > + corresponding interrupts-names property must be defined.
> > + - For backward compatibility reasons, a single element
> > interrupts
> > + property is also supported for the standard variant of the
> > IP,
> > + containing only the UART sum interrupt. This form is
> > deprecated
> > + and should no longer be used.
> >
> > Example:
> > - serial@12000 {
> > + uart0: serial@12000 {
> > compatible = "marvell,armada-3700-uart";
> > reg = <0x12000 0x200>;
> > - interrupts = <43>;
> > + clocks = <&xtalclk>;
> > + interrupts =
> > + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "uart-sum", "uart-tx", "uart-rx";
> > + status = "disabled";
>
> Don't show status in examples.
Ok.
>
> > + };
> > +
> > + uart1: serial@12200 {
> > + compatible = "marvell,armada-3700-uart-ext";
> > + reg = <0x12200 0x30>;
> > + clocks = <&xtalclk>;
> > + interrupts =
> > + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
> > + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-names = "uart-tx", "uart-rx";
> > + status = "disabled";
> > };
> > --
> > 2.11.0
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe
> > devicetree" in the body of a message to majordomo@vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
Thanks,
Miquèl
--
Miquel Raynal, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
From: Rob Herring @ 2017-10-17 22:00 UTC (permalink / raw)
To: Miquel Raynal
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon, linux-serial, devicetree,
linux-arm-kernel, linux-gpio, Thomas Petazzoni, Antoine Tenart,
Nadav Haklai, Wilson Ding
In-Reply-To: <20171013090200.31034-2-miquel.raynal@free-electrons.com>
On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
> Update the Device Tree binding documentation for the Marvell EBU UART,
> in order to allow describing the extended UART IP block, in addition to
> the already supported standard UART IP. This requires adding a new
> compatible string, the introduction of a clocks property, and extensions
> to the interrupts property.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> .../devicetree/bindings/serial/mvebu-uart.txt | 49 +++++++++++++++++++---
> 1 file changed, 44 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> index d37fabe17bd1..3df3a3fab4bb 100644
> --- a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> +++ b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> @@ -1,13 +1,52 @@
> -* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs
> + e.g., Armada-3700.
>
> Required properties:
> -- compatible: "marvell,armada-3700-uart"
> +- compatible:
> + - "marvell,armada-3700-uart" for the standard variant of the UART
> + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
> + FIFO, baudrate limited to 230400).
> + - "marvell,armada-3700-uart-ext" for the extended variant of the
> + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
> + accesses to the FIFO, baudrate unlimited by the dividers).
What do you call the next extended version? marvell,armada-3700-uart-ext-ext?
This is different versions of UART on the same chip?
> - reg: offset and length of the register set for the device.
> -- interrupts: device interrupt
> +- clocks: UART reference clock used to derive the baudrate (only
> + mandatory with "marvell,armada-3700-uart-ext" compatible).
How is this optional? The freq is fixed if not present? If so, what
frequency?
> +- interrupts:
> + - Must contain three elements for the standard variant of the IP
> + (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
> + respectively the UART sum interrupt, the UART TX interrupt and
> + UART RX interrupt. A corresponding interrupt-names property must
> + be defined.
> + - Must contain two elements for the extended variant of the IP
> + (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
> + respectively the UART TX interrupt and the UART RX interrupt. A
> + corresponding interrupts-names property must be defined.
> + - For backward compatibility reasons, a single element interrupts
> + property is also supported for the standard variant of the IP,
> + containing only the UART sum interrupt. This form is deprecated
> + and should no longer be used.
>
> Example:
> - serial@12000 {
> + uart0: serial@12000 {
> compatible = "marvell,armada-3700-uart";
> reg = <0x12000 0x200>;
> - interrupts = <43>;
> + clocks = <&xtalclk>;
> + interrupts =
> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "uart-sum", "uart-tx", "uart-rx";
> + status = "disabled";
Don't show status in examples.
> + };
> +
> + uart1: serial@12200 {
> + compatible = "marvell,armada-3700-uart-ext";
> + reg = <0x12200 0x30>;
> + clocks = <&xtalclk>;
> + interrupts =
> + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "uart-tx", "uart-rx";
> + status = "disabled";
> };
> --
> 2.11.0
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH 2/2] serdev: ttyport: add missing open() error handling
From: Rob Herring @ 2017-10-17 16:08 UTC (permalink / raw)
To: Johan Hovold
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial@vger.kernel.org,
linux-kernel@vger.kernel.org
In-Reply-To: <20171016130620.5404-2-johan@kernel.org>
On Mon, Oct 16, 2017 at 8:06 AM, Johan Hovold <johan@kernel.org> wrote:
> Add missing error handling for tty-driver open() which may fail (e.g. if
> resource allocation fails or if a port is being disconnected).
>
> Note that close() must be called also in case of failed open() and that
> the operation sanity check is amended to catch buggy drivers.
That's a very odd pattern. Wouldn't a must_check annotation be enough?
Rob
^ permalink raw reply
* Re: [PATCH 1/2] serdev: ttyport: enforce tty-driver open() requirement
From: Rob Herring @ 2017-10-17 16:07 UTC (permalink / raw)
To: Johan Hovold
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial@vger.kernel.org,
linux-kernel@vger.kernel.org
In-Reply-To: <20171016130620.5404-1-johan@kernel.org>
On Mon, Oct 16, 2017 at 8:06 AM, Johan Hovold <johan@kernel.org> wrote:
> The tty-driver open routine is mandatory, but the serdev
> tty-port-controller implementation did not treat it as such and would
> instead fall back to calling tty_port_open() directly.
The idea was to eventually get rid of the tty_struct dependency and
only depend on tty_port. That's very invasive though and needs various
pieces of tty_struct to move into tty_port.
Of course, tty_port_open itself would have to change as well, so this
change doesn't really matter.
Rob
> Signed-off-by: Johan Hovold <johan@kernel.org>
> ---
> drivers/tty/serdev/serdev-ttyport.c | 14 ++++++++++----
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/tty/serdev/serdev-ttyport.c b/drivers/tty/serdev/serdev-ttyport.c
> index 302018d67efa..404f3fd070a7 100644
> --- a/drivers/tty/serdev/serdev-ttyport.c
> +++ b/drivers/tty/serdev/serdev-ttyport.c
> @@ -102,10 +102,10 @@ static int ttyport_open(struct serdev_controller *ctrl)
> return PTR_ERR(tty);
> serport->tty = tty;
>
> - if (tty->ops->open)
> - tty->ops->open(serport->tty, NULL);
> - else
> - tty_port_open(serport->port, tty, NULL);
> + if (!tty->ops->open)
> + goto err_unlock;
> +
> + tty->ops->open(serport->tty, NULL);
>
> /* Bring the UART into a known 8 bits no parity hw fc state */
> ktermios = tty->termios;
> @@ -122,6 +122,12 @@ static int ttyport_open(struct serdev_controller *ctrl)
>
> tty_unlock(serport->tty);
> return 0;
> +
> +err_unlock:
> + tty_unlock(tty);
> + tty_release_struct(tty, serport->tty_idx);
> +
> + return -ENODEV;
> }
>
> static void ttyport_close(struct serdev_controller *ctrl)
> --
> 2.14.2
>
^ permalink raw reply
* RE: [PATCH] serial: imx-serial - move DMA buffer configuration to DT
From: Han, Nandor (GE Healthcare) @ 2017-10-17 11:14 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Greg Kroah-Hartman, Jiri Slaby,
linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Martyn Welch
In-Reply-To: <AM3P101MB018058EF35B61CC5E39DCAEFE6750-Irc2Ng3OI610aGNDtyle9VAr667LJVwUiGd9ebBGJoev3QGu/rdwKA@public.gmane.org>
> -----Original Message-----
> From: linux-serial-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org [mailto:linux-serial-
> owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org] On Behalf Of Han, Nandor (GE Healthcare)
> Sent: 10 October 2017 13:17
> To: Uwe Kleine-König <u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Cc: Greg Kroah-Hartman <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>; Jiri Slaby
> <jslaby-IBi9RG/b67k@public.gmane.org>; linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org;
> Martyn Welch <martyn.welch-ZGY8ohtN/8pPYcu2f3hruQ@public.gmane.org>
> Subject: EXT: [PATCH] serial: imx-serial - move DMA buffer configuration to
> DT
>
>
>
> > -----Original Message-----
> > From: Uwe Kleine-König [mailto:u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org]
> > Sent: 10 October 2017 11:26
> > To: Han, Nandor (GE Healthcare) <nandor.han-JJi787mZWgc@public.gmane.org>
> > Cc: Romain Perier <romain.perier-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>; Greg Kroah-Hartman
> > <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>; Jiri Slaby <jslaby-IBi9RG/b67k@public.gmane.org>; linux-
> > serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > Subject: EXT: Re: [PATCH] serial: imx-serial - move DMA buffer
> > configuration to DT
> >
Anything that I could still clarify here I'll be happy to explain :)
> > Hello,
> >
> > On Tue, Oct 10, 2017 at 07:58:31AM +0000, Han, Nandor (GE Healthcare)
> > wrote:
> > > > > > That doesn't sound like a good fix but more like a work around.
> > > > > > Which other options did you test to fix your problem?
> > > > > >
> > > > >
> > > > > I haven't tried any other, because except using maybe, ioctl I
> > > > > haven't got anything better.
> > > >
> > > > My question didn't target where to configure the buffer size
> > > > instead of dts. I wonder if it would help to change the fifo
> > > > watermark limits for
> > example.
> > > >
> > >
> > > Ok. Sorry I didn't understand correct. Watermark will not help in
> > > this case because it is used only to trigger the moving of the data
> > > from RX FIFO to DMA buffer. The iMX DMA (check the iMX6 RM
> > > A.3.1.2.4 since is missing from iMX53 RM) will only return data to
> > > serial driver when no more
> > data exist in the RX FIFO (is using aging timer for this check) or BD
> > (DMA
> > buffer) is full. If data is sent continuously DMA will return data to
> > driver only when BD is full.
> >
> > I read once over the description but I failed to understand it. At
> > least it talks about water mark levels and min(WML-1,Count) which
> > makes me think that the DMA script makes use of water marking too and
> > my idea to play with that instead of buffer sizes might be sensible.
> >
>
> :). It is tricky, I agree. I will try to explain it even though I think the most
> important part is to understand that watermark level control when data is
> moved from out from rx FIFO to DMA buffer (BD) and is not the trigger that
> returns the data from DMA buffer (BD) to serial driver (which is the one that I
> need).
>
> The SDMA script is using 2 triggers to move data from rx FIFO to DMA buffer
> (BD): 1) watermark hit and 2) aging timer. It ignores completely the "Idle line"
> trigger. When watermark trigger is received it will move "min(WML-1,BD
> count)" data from rx FIFO to BD. After this step in the rx FIFO will remain
> always at least 1 byte (since we move WML-1). The last byte will be moved
> based on the aging timer. During which SDMA will check if more data is
> available and move the rest. SDMA will return the BD in 2 situations: 1) BD is
> full 2) during aging time trigger the rx FIFO is empty.
>
> > > So what we need here is a trigger that will force DMA to return data
> > > faster to serial driver. The only one that I could find was the size
> > > of the buffer. Of course another way will be to create different
> > > SDMA scripts that can do all kinds of handling -- but dint' want to
> > > go on that route :)
> >
> > :-)
> >
> > > > > Our problem is that in our system some serial ports needs to
> > > > > have really low data latency, where others trade more bytes over
> > > > > data latency. This situation results in a need of beeing able to
> > > > > have different DMA buffer size for different ports.
> > > > >
> > > > > How can DMA buffer size affect latency?
> > > > > DMA works like this: (To answer to your question DMA buffer is
> > > > > not
> > > > > FIFO) 1. Transfer the data from HW FIFO to DMA buffer based on
> > > > > some interrupts (character received, etc) 2. Transfer the DMA
> > > > > buffer back to serial port based on some events (buffer full,
> > > > > aging timer, etc) 3. Serial
> > > > port forwards to tty buffer.
> > > >
> > > > BTW In the past I saw the serial core introduce latency, too. Are
> > > > you sure that's not your bottle neck?
> > >
> > > Can you be more specific?
> >
> > http://www.spinics.net/lists/linux-serial/msg17767.html
> >
> > > > > Data availability to consumer depends on: DMA buffer size, baud
> > > > > rate and communication pattern. By communication patter I'm
> > > > > refering that we send data continuoselly (serial line is never
> > > > > idle) or packet by packet (serial line is idle in between)
> > > > > Example:
> > > > > Baud: 19200 (1Byte = 0.52 ms)
> > > > > DMA buffer size: 100 bytes
> > > > > Communication pattern: continuously
> > > > > => DMA will return data to serial port only when DMA buffer is
> > > > > full, since the communication is continuously. This result in a
> > > > > data latency of 0.52 ms* 100bytes = 52ms. In case the buffer
> > > > > will be 200bytes the letency will be double.
> > > > >
> > > > > I agree with you, this is not directly a hw property but a DMA
> > > > > configuration
> > > > item.
> > > > > But I've found this to be the best way to configure this
> > > > > comparing with using
> > > > ioctl.
> > > > >
> > > > > Let me know if you need more clarification and I would really be
> > > > > open to other options that will solve our problem.
> > > > >
> > > > > <snip>
> > > > >
> > > > > > > +- fsl,dma-size : Indicate the size of the DMA buffer and
> > > > > > > +its periods
> > > > > >
> > > > > > This is a sparse description, just from reading that I don't
> > > > > > understand what it does.
> > > > > >
> > > > >
> > > > > Serial driver configures a circular ring of buffers for DMA.
> > > > > Here we can configure the size and the number of buffers.
> > > >
> > > > The problem is: How should a person, who wants to make available a
> > > > port on a machine via dts, choose what value to use for fsl,dma-size?
> > >
> > > It doesn't have too. If this configuration is not provided the
> > > serial port will
> > have a default value.
> > > The user has the possibility to tweak this settings in case is needed.
> >
> > "The default value works in general" is no good justification to not
> > provide easy-to-grasp and well documented knobs.
> >
>
> I agree with you on this. But my intention was to say that the driver is using
> the same settings as before and users are not impacted by this change, and I
> only add the option to control that value.
>
> > Best regards
> > Uwe
> >
>
> Regards,
> Nandor
>
> > --
> > Pengutronix e.K. | Uwe Kleine-König |
> > Industrial Linux Solutions | http://www.pengutronix.de/ |
> --
> To unsubscribe from this list: send the line "unsubscribe linux-serial" in the
> body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at
> http://vger.kernel.org/majordomo-info.html
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply
* [PATCH V1 1/1] serial: 8250_fintek: Fix finding base_port with activated SuperIO
From: Ji-Ze Hong (Peter Hong) @ 2017-10-17 6:23 UTC (permalink / raw)
To: gregkh
Cc: jslaby, rel+kernel, stable, linux-serial, linux-kernel,
hpeter+linux_kernel, peter_hong
The SuperIO will be configured at boot time by BIOS, but some BIOS
will not deactivate the SuperIO when the end of configuration. It'll
lead to mismatch for pdata->base_port in probe_setup_port(). So we'll
deactivate all SuperIO before activate special base_port in
fintek_8250_enter_key().
Tested on iBASE MI802.
Cc: stable@vger.kernel.org
Tested-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
Signed-off-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
---
drivers/tty/serial/8250/8250_fintek.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
index 96cc45f25ee9..b34623914413 100644
--- a/drivers/tty/serial/8250/8250_fintek.c
+++ b/drivers/tty/serial/8250/8250_fintek.c
@@ -128,6 +128,9 @@ static int fintek_8250_enter_key(u16 base_port, u8 key)
if (!request_muxed_region(base_port, 2, "8250_fintek"))
return -EBUSY;
+ /* Force to deactive all SuperIO in this base_port */
+ outb(EXIT_KEY, base_port + ADDR_PORT);
+
outb(key, base_port + ADDR_PORT);
outb(key, base_port + ADDR_PORT);
return 0;
--
2.7.4
^ permalink raw reply related
* [PATCH] tty: amba-pl011: Convert timers to use timer_setup()
From: Kees Cook @ 2017-10-16 23:28 UTC (permalink / raw)
To: Greg Kroah-Hartman; +Cc: Russell King, Jiri Slaby, linux-serial, linux-kernel
In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using the new timer_setup() and from_timer()
to pass the timer pointer explicitly.
Cc: Russell King <linux@armlinux.org.uk>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: linux-serial@vger.kernel.org
Signed-off-by: Kees Cook <keescook@chromium.org>
---
drivers/tty/serial/amba-pl011.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 111e6a950779..dab36369f71e 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -1078,9 +1078,9 @@ static inline void pl011_dma_rx_stop(struct uart_amba_port *uap)
* Every polling, It checks the residue in the dma buffer and transfer
* data to the tty. Also, last_residue is updated for the next polling.
*/
-static void pl011_dma_rx_poll(unsigned long args)
+static void pl011_dma_rx_poll(struct timer_list *t)
{
- struct uart_amba_port *uap = (struct uart_amba_port *)args;
+ struct uart_amba_port *uap = from_timer(uap, t, dmarx.timer);
struct tty_port *port = &uap->port.state->port;
struct pl011_dmarx_data *dmarx = &uap->dmarx;
struct dma_chan *rxchan = uap->dmarx.chan;
@@ -1192,9 +1192,7 @@ static void pl011_dma_startup(struct uart_amba_port *uap)
dev_dbg(uap->port.dev, "could not trigger initial "
"RX DMA job, fall back to interrupt mode\n");
if (uap->dmarx.poll_rate) {
- init_timer(&(uap->dmarx.timer));
- uap->dmarx.timer.function = pl011_dma_rx_poll;
- uap->dmarx.timer.data = (unsigned long)uap;
+ timer_setup(&uap->dmarx.timer, pl011_dma_rx_poll, 0);
mod_timer(&uap->dmarx.timer,
jiffies +
msecs_to_jiffies(uap->dmarx.poll_rate));
--
2.7.4
--
Kees Cook
Pixel Security
^ permalink raw reply related
* [PATCH] serial: m32r_sio: Convert timers to use timer_setup()
From: Kees Cook @ 2017-10-16 23:27 UTC (permalink / raw)
To: Greg Kroah-Hartman; +Cc: Jiri Slaby, linux-serial, linux-kernel
In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using the new timer_setup() and from_timer()
to pass the timer pointer explicitly.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: linux-serial@vger.kernel.org
Signed-off-by: Kees Cook <keescook@chromium.org>
---
drivers/tty/serial/m32r_sio.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c
index 5b3bd9511993..5f4003ad32b6 100644
--- a/drivers/tty/serial/m32r_sio.c
+++ b/drivers/tty/serial/m32r_sio.c
@@ -511,9 +511,9 @@ static void serial_unlink_irq_chain(struct uart_sio_port *up)
/*
* This function is used to handle ports that do not have an interrupt.
*/
-static void m32r_sio_timeout(unsigned long data)
+static void m32r_sio_timeout(struct timer_list *t)
{
- struct uart_sio_port *up = (struct uart_sio_port *)data;
+ struct uart_sio_port *up = from_timer(up, t, timer);
unsigned int timeout;
unsigned int sts;
@@ -907,8 +907,7 @@ static void __init m32r_sio_register_ports(struct uart_driver *drv)
up->port.line = i;
up->port.ops = &m32r_sio_pops;
- init_timer(&up->timer);
- up->timer.function = m32r_sio_timeout;
+ timer_setup(&up->timer, m32r_sio_timeout, 0);
uart_add_one_port(drv, &up->port);
}
--
2.7.4
--
Kees Cook
Pixel Security
^ permalink raw reply related
* [PATCH 2/2] serdev: ttyport: add missing open() error handling
From: Johan Hovold @ 2017-10-16 13:06 UTC (permalink / raw)
To: Rob Herring
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, linux-kernel,
Johan Hovold
In-Reply-To: <20171016130620.5404-1-johan@kernel.org>
Add missing error handling for tty-driver open() which may fail (e.g. if
resource allocation fails or if a port is being disconnected).
Note that close() must be called also in case of failed open() and that
the operation sanity check is amended to catch buggy drivers.
Signed-off-by: Johan Hovold <johan@kernel.org>
---
drivers/tty/serdev/serdev-ttyport.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/serdev/serdev-ttyport.c b/drivers/tty/serdev/serdev-ttyport.c
index 404f3fd070a7..5b09ce920117 100644
--- a/drivers/tty/serdev/serdev-ttyport.c
+++ b/drivers/tty/serdev/serdev-ttyport.c
@@ -96,16 +96,21 @@ static int ttyport_open(struct serdev_controller *ctrl)
struct serport *serport = serdev_controller_get_drvdata(ctrl);
struct tty_struct *tty;
struct ktermios ktermios;
+ int ret;
tty = tty_init_dev(serport->tty_drv, serport->tty_idx);
if (IS_ERR(tty))
return PTR_ERR(tty);
serport->tty = tty;
- if (!tty->ops->open)
+ if (!tty->ops->open || !tty->ops->close) {
+ ret = -ENODEV;
goto err_unlock;
+ }
- tty->ops->open(serport->tty, NULL);
+ ret = tty->ops->open(serport->tty, NULL);
+ if (ret)
+ goto err_close;
/* Bring the UART into a known 8 bits no parity hw fc state */
ktermios = tty->termios;
@@ -123,11 +128,13 @@ static int ttyport_open(struct serdev_controller *ctrl)
tty_unlock(serport->tty);
return 0;
+err_close:
+ tty->ops->close(tty, NULL);
err_unlock:
tty_unlock(tty);
tty_release_struct(tty, serport->tty_idx);
- return -ENODEV;
+ return ret;
}
static void ttyport_close(struct serdev_controller *ctrl)
--
2.14.2
^ permalink raw reply related
* [PATCH 1/2] serdev: ttyport: enforce tty-driver open() requirement
From: Johan Hovold @ 2017-10-16 13:06 UTC (permalink / raw)
To: Rob Herring
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, linux-kernel,
Johan Hovold
The tty-driver open routine is mandatory, but the serdev
tty-port-controller implementation did not treat it as such and would
instead fall back to calling tty_port_open() directly.
Signed-off-by: Johan Hovold <johan@kernel.org>
---
drivers/tty/serdev/serdev-ttyport.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serdev/serdev-ttyport.c b/drivers/tty/serdev/serdev-ttyport.c
index 302018d67efa..404f3fd070a7 100644
--- a/drivers/tty/serdev/serdev-ttyport.c
+++ b/drivers/tty/serdev/serdev-ttyport.c
@@ -102,10 +102,10 @@ static int ttyport_open(struct serdev_controller *ctrl)
return PTR_ERR(tty);
serport->tty = tty;
- if (tty->ops->open)
- tty->ops->open(serport->tty, NULL);
- else
- tty_port_open(serport->port, tty, NULL);
+ if (!tty->ops->open)
+ goto err_unlock;
+
+ tty->ops->open(serport->tty, NULL);
/* Bring the UART into a known 8 bits no parity hw fc state */
ktermios = tty->termios;
@@ -122,6 +122,12 @@ static int ttyport_open(struct serdev_controller *ctrl)
tty_unlock(serport->tty);
return 0;
+
+err_unlock:
+ tty_unlock(tty);
+ tty_release_struct(tty, serport->tty_idx);
+
+ return -ENODEV;
}
static void ttyport_close(struct serdev_controller *ctrl)
--
2.14.2
^ permalink raw reply related
* Re: [PATCH v2 02/16] pinctrl: dt-bindings: Fix A37xx uart2 group name
From: Linus Walleij @ 2017-10-16 11:56 UTC (permalink / raw)
To: Miquel Raynal
Cc: Greg Kroah-Hartman, Jason Cooper, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Jiri Slaby, Catalin Marinas, Will Deacon,
linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
Thomas Petazzoni, Antoine Tenart, Nadav Haklai, Wilson Ding
In-Reply-To: <20171013090200.31034-3-miquel.raynal@free-electrons.com>
On Fri, Oct 13, 2017 at 11:01 AM, Miquel Raynal
<miquel.raynal@free-electrons.com> wrote:
> Fix a typo in A37xx pin controllers documentation about uart2 pin group.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Patch applied to the pinctrl tree.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v3 2/2] ACPI / scan: Fix enumeration for special UART devices
From: Lukas Wunner @ 2017-10-15 9:57 UTC (permalink / raw)
To: Frédéric Danis, Greg Kroah-Hartman
Cc: robh, marcel, sre, loic.poulain, johan, hdegoede, rafael,
linux-bluetooth, linux-serial, linux-acpi, Ronald Tschalär,
Peter Y. Chuang
In-Reply-To: <1507710734-32520-3-git-send-email-frederic.danis.oss@gmail.com>
On Wed, Oct 11, 2017 at 10:32:14AM +0200, Frédéric Danis wrote:
> UART devices is expected to be enumerated by SerDev subsystem.
>
> During ACPI scan, serial devices behind SPI, I2C or UART buses are not
> enumerated, allowing them to be enumerated by their respective parents.
>
> Rename *spi_i2c_slave* to *serial_bus_slave* as this will be used for serial
> devices on serial buses (SPI, I2C or UART).
>
> On Macs an empty ResourceTemplate is returned for uart slaves.
> Instead the device properties "baud", "parity", "dataBits", "stopBits" are
> provided. Add a check for "baud" in acpi_is_serial_bus_slave().
Tested-by: Ronald Tschalär <ronald@innovation.ch>
Tested-by: Peter Y. Chuang <peteryuchuang@gmail.com>
Ronald and Peter both report success for the above-mentioned Mac-specific
change on GitHub: https://github.com/l1k/linux/pull/1#issuecomment-336126330
Thanks,
Lukas
^ permalink raw reply
* [PATCH 1/1] tty: serial: imx: disable ageing timer interrupt if dma in use
From: Han, Nandor (GE Healthcare) @ 2017-10-13 14:47 UTC (permalink / raw)
To: Troy Kisky, gregkh@linuxfoundation.org
Cc: fabio.estevam@nxp.com, u.kleine-koenig@pengutronix.de,
linux-arm-kernel@lists.infradead.org,
linux-serial@vger.kernel.org, l.stach@pengutronix.de
In-Reply-To: <7c5a3ef3-6da7-815e-04a3-a1f18344032e@boundarydevices.com>
> -----Original Message-----
> From: Troy Kisky [mailto:troy.kisky@boundarydevices.com]
> Sent: 11 October 2017 19:10
> To: Han, Nandor (GE Healthcare) <nandor.han@ge.com>;
> gregkh@linuxfoundation.org
> Cc: fabio.estevam@nxp.com; l.stach@pengutronix.de; u.kleine-
> koenig@pengutronix.de; linux-serial@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org
> Subject: EXT: Re: [PATCH 1/1] tty: serial: imx: disable ageing timer interrupt if
> dma in use
>
> On 10/10/2017 11:22 PM, Han, Nandor (GE Healthcare) wrote:
<snip>
> >> - imx_rxint(irq, dev_id);
> >> + if (!sport->dma_is_enabled && (sts & (USR1_RRDY |
> >> USR1_AGTIM))) {
> >> + imx_rxint(irq, dev_id);
> >
> > I don't think we need the check `!sport->dma_is_enabled ` since RRDY and
> AGTIM interrupts should be disable when DMA is enabled.
>
> If I AND the status with its corresponding interrupt enable. But that is just as
> complicated, and more different from the original.
>
>
Yes, I agree, but it would be the right thing to do. :)
> >
> >> ret = IRQ_HANDLED;
> >> }
> >>
> >> @@ -1207,10 +1181,6 @@ static void imx_enable_dma(struct imx_port
> >> *sport)
> >> temp |= UCR1_RDMAEN | UCR1_TDMAEN | UCR1_ATDMAEN;
> >> writel(temp, sport->port.membase + UCR1);
> >>
> >> - temp = readl(sport->port.membase + UCR2);
> >> - temp |= UCR2_ATEN;
> >> - writel(temp, sport->port.membase + UCR2);
> >> -
> >
> > I think this should be moved to imx_startup. At least RRDY is configured
> there.
> >
>
>
> Currently, non-dma mode does not use the ageing timer. You get an interrupt
> immediately when
> 1 character is in the fifo. So, enabling the ageing timer and changing fifo level,
> should really be a separate patch. But it would be a nice patch.
>
>
Ok but in this case, we are left with aging timer and rrdy check in the interrupt and imx-startup enables only rrdy. (which is not much different than what it was before, since aging timer didn't get a chance to be triggered)
I agree that changing the fifo level to give a chance also to the aging timer will be the right thing to do here.
Overall, I think is ok, my main concern with not enabling the aging timer in startup is that people can be confused about this.
Reviewed-by: Nandor Han <Nandor.han@ge.com>
^ permalink raw reply
* Re: [PATCH v2 04/16] serial: mvebu-uart: support probe of multiple ports
From: Gregory CLEMENT @ 2017-10-13 11:22 UTC (permalink / raw)
To: Miquel RAYNAL
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Sebastian Hesselbarth, Jiri Slaby, Catalin Marinas, Will Deacon,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Allen Yan
In-Reply-To: <20171013131711.4ef63ea0@xps13>
Hi Miquel,
On ven., oct. 13 2017, Miquel RAYNAL <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Hi Gregory,
>
> On Fri, 13 Oct 2017 11:40:32 +0200
> Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>
>> Hi Miquel,
>>
>> On ven., oct. 13 2017, Miquel Raynal
>> <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>>
>> > - port = &mvebu_uart_ports[0];
>> > + /* Assume that all UART ports have a DT alias or none has
>> > */
>> > + id = of_alias_get_id(pdev->dev.of_node, "serial");
>>
>> You stil need to check the pdev->dev.of_node before calling
>> of_alias_get_id.
>
> Thanks for your feedback but I don't think we still need to check it,
> because the of_alias_get_id() function will either return -ENOSYS if
> CONFIG_OF is not defined, or -ENODEV if the node is not found. As the
> function does not dereference pdev->dev.of_node at any moment but
> instead compares the value with another pointer, I think this call is
> safe like this.
Fair enough, I expected that the pointer was dereferenced but I was
wrong, was so no need for a new version.
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Thanks,
Gregory
>
> Thanks,
> Miquèl
>
>>
>> Once it will be fixed, you can add:
>>
>> Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>>
>> Thanks,
>>
>> Gregory
>>
>>
>> > + if (!pdev->dev.of_node || id < 0)
>> > + pdev->id = uart_num_counter++;
>> > + else
>> > + pdev->id = id;
>> > +
>> > + if (pdev->id >= MVEBU_NR_UARTS) {
>> > + dev_err(&pdev->dev, "cannot have more than %d UART
>> > ports\n",
>> > + MVEBU_NR_UARTS);
>> > + return -EINVAL;
>> > + }
>> > +
>> > + port = &mvebu_uart_ports[pdev->id];
>> >
>> > spin_lock_init(&port->lock);
>> >
>> > @@ -572,7 +588,7 @@ static int mvebu_uart_probe(struct
>> > platform_device *pdev) port->fifosize = 32;
>> > port->iotype = UPIO_MEM32;
>> > port->flags = UPF_FIXED_PORT;
>> > - port->line = 0; /* single port: force line number
>> > to 0 */
>> > + port->line = pdev->id;
>> >
>> > port->irq = irq->start;
>> > port->irqflags = 0;
>> > --
>> > 2.11.0
>> >
>>
>
>
>
> --
> Miquel Raynal, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
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^ permalink raw reply
* Re: [PATCH v2 04/16] serial: mvebu-uart: support probe of multiple ports
From: Miquel RAYNAL @ 2017-10-13 11:17 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Sebastian Hesselbarth, Jiri Slaby, Catalin Marinas, Will Deacon,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Allen Yan
In-Reply-To: <877evz9yi7.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Hi Gregory,
On Fri, 13 Oct 2017 11:40:32 +0200
Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Hi Miquel,
>
> On ven., oct. 13 2017, Miquel Raynal
> <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>
> > - port = &mvebu_uart_ports[0];
> > + /* Assume that all UART ports have a DT alias or none has
> > */
> > + id = of_alias_get_id(pdev->dev.of_node, "serial");
>
> You stil need to check the pdev->dev.of_node before calling
> of_alias_get_id.
Thanks for your feedback but I don't think we still need to check it,
because the of_alias_get_id() function will either return -ENOSYS if
CONFIG_OF is not defined, or -ENODEV if the node is not found. As the
function does not dereference pdev->dev.of_node at any moment but
instead compares the value with another pointer, I think this call is
safe like this.
Thanks,
Miquèl
>
> Once it will be fixed, you can add:
>
> Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>
> Thanks,
>
> Gregory
>
>
> > + if (!pdev->dev.of_node || id < 0)
> > + pdev->id = uart_num_counter++;
> > + else
> > + pdev->id = id;
> > +
> > + if (pdev->id >= MVEBU_NR_UARTS) {
> > + dev_err(&pdev->dev, "cannot have more than %d UART
> > ports\n",
> > + MVEBU_NR_UARTS);
> > + return -EINVAL;
> > + }
> > +
> > + port = &mvebu_uart_ports[pdev->id];
> >
> > spin_lock_init(&port->lock);
> >
> > @@ -572,7 +588,7 @@ static int mvebu_uart_probe(struct
> > platform_device *pdev) port->fifosize = 32;
> > port->iotype = UPIO_MEM32;
> > port->flags = UPF_FIXED_PORT;
> > - port->line = 0; /* single port: force line number
> > to 0 */
> > + port->line = pdev->id;
> >
> > port->irq = irq->start;
> > port->irqflags = 0;
> > --
> > 2.11.0
> >
>
--
Miquel Raynal, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
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^ permalink raw reply
* Re: [PATCH v2 04/16] serial: mvebu-uart: support probe of multiple ports
From: Gregory CLEMENT @ 2017-10-13 9:40 UTC (permalink / raw)
To: Miquel Raynal
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Sebastian Hesselbarth, Jiri Slaby, Catalin Marinas, Will Deacon,
linux-serial, devicetree, linux-arm-kernel, linux-gpio,
Thomas Petazzoni, Antoine Tenart, Nadav Haklai, Wilson Ding,
Allen Yan
In-Reply-To: <20171013090200.31034-5-miquel.raynal@free-electrons.com>
Hi Miquel,
On ven., oct. 13 2017, Miquel Raynal <miquel.raynal@free-electrons.com> wrote:
> - port = &mvebu_uart_ports[0];
> + /* Assume that all UART ports have a DT alias or none has */
> + id = of_alias_get_id(pdev->dev.of_node, "serial");
You stil need to check the pdev->dev.of_node before calling
of_alias_get_id.
Once it will be fixed, you can add:
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Thanks,
Gregory
> + if (!pdev->dev.of_node || id < 0)
> + pdev->id = uart_num_counter++;
> + else
> + pdev->id = id;
> +
> + if (pdev->id >= MVEBU_NR_UARTS) {
> + dev_err(&pdev->dev, "cannot have more than %d UART ports\n",
> + MVEBU_NR_UARTS);
> + return -EINVAL;
> + }
> +
> + port = &mvebu_uart_ports[pdev->id];
>
> spin_lock_init(&port->lock);
>
> @@ -572,7 +588,7 @@ static int mvebu_uart_probe(struct platform_device *pdev)
> port->fifosize = 32;
> port->iotype = UPIO_MEM32;
> port->flags = UPF_FIXED_PORT;
> - port->line = 0; /* single port: force line number to 0 */
> + port->line = pdev->id;
>
> port->irq = irq->start;
> port->irqflags = 0;
> --
> 2.11.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH v2 16/16] arm64: dts: marvell: armada-3720-espressobin: fill UART nodes
From: Miquel Raynal @ 2017-10-13 9:02 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial, devicetree, linux-arm-kernel, linux-gpio,
Thomas Petazzoni, Antoine Tenart, Nadav Haklai, Wilson Ding,
Miquel Raynal
In-Reply-To: <20171013090200.31034-1-miquel.raynal@free-electrons.com>
Fill ESPRESSObin uart0 node with pinctrl information like in the
Armada-3720-DB device tree (which uses the same node).
Also explain how to enable the second UART port available on the
headers. This second port is not enabled by default because both
headers are dedicated to expose general purpose pins and remapping
some of them to use the second UART would break existing users.
Suggested-by: László ÁSHIN <laszlo@ashin.hu>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
---
Changes since v1: comment about UART1 node.
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
index 2ce52ba74f73..bdfb5553ddb5 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
@@ -98,9 +98,21 @@
/* Exported on the micro USB connector J5 through an FTDI */
&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
status = "okay";
};
+/*
+ * Connector J17 and J18 expose a number of different features. Some pins are
+ * multiplexed. This is the case for instance for the following features:
+ * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
+ * how to enable it. Beware that the signals are 1.8V TTL.
+ * - I2C
+ * - SPI
+ * - MMC
+ */
+
/* J7 */
&usb3 {
status = "okay";
--
2.11.0
^ permalink raw reply related
* [PATCH v2 15/16] arm64: dts: marvell: armada-3720-db: enable second UART port
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
In-Reply-To: <20171013090200.31034-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Enable Armada-3720-DB second UART port by adding the corresponding
device tree node in the board DTS and enabling it.
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 9df0f06ce607..15713c19b3d0 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -216,7 +216,7 @@
/*
* Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
- * an FTDI
+ * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
*/
&uart0 {
pinctrl-names = "default";
@@ -224,6 +224,13 @@
status = "okay";
};
+/* CON26(V2.0)/CON28(V1.4) */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
/* CON27(V2.0)/CON29(V1.4) */
&usb2 {
status = "okay";
--
2.11.0
--
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^ permalink raw reply related
* [PATCH v2 14/16] arm64: dts: marvell: armada-37xx: add second UART port
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
In-Reply-To: <20171013090200.31034-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Add a node in Armada 37xx DTSI file for the second UART, with a
different compatible due to its extended IP which has some
differences with the first UART already in place.
Make use of this commit to also fully describe the first port and
use the same clear and named interrupt bindings for both ports.
The standard UART (UART0) uses level-interrupts while the extended
UART (UART1) uses edge-triggered interrupts.
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index a36d667f770e..72b68f23c001 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -55,6 +55,7 @@
aliases {
serial0 = &uart0;
+ serial1 = &uart1;
};
cpus {
@@ -136,7 +137,22 @@
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x200>;
clocks = <&xtalclk>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts =
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uart-sum", "uart-tx", "uart-rx";
+ status = "disabled";
+ };
+
+ uart1: serial@12200 {
+ compatible = "marvell,armada-3700-uart-ext";
+ reg = <0x12200 0x30>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "uart-tx", "uart-rx";
status = "disabled";
};
--
2.11.0
--
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^ permalink raw reply related
* [PATCH v2 13/16] arm64: dts: marvell: armada-37xx: add UART clock
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial, devicetree, linux-arm-kernel, linux-gpio,
Thomas Petazzoni, Antoine Tenart, Nadav Haklai, Wilson Ding,
Miquel Raynal
In-Reply-To: <20171013090200.31034-1-miquel.raynal@free-electrons.com>
Add the missing clock property to armada-3700 UART node.
This clock will be used to derive the prescaler value to comply with
the requested baudrate.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index b554cdaf5e53..a36d667f770e 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -135,6 +135,7 @@
uart0: serial@12000 {
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x200>;
+ clocks = <&xtalclk>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
--
2.11.0
^ permalink raw reply related
* [PATCH v2 12/16] serial: mvebu-uart: support extended port registers layout
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
In-Reply-To: <20171013090200.31034-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Define the missing register offsets and bit fields for the extended
UART port. Add a second driver data structure filled with its port data,
selected with the right compatible (marvell,armada-3700-uart-ext).
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
drivers/tty/serial/mvebu-uart.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index 1074054ee5be..16b0a5aa14e2 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -39,10 +39,13 @@
/* Register Map */
#define UART_STD_RBR 0x00
+#define UART_EXT_RBR 0x18
#define UART_STD_TSH 0x04
+#define UART_EXT_TSH 0x1C
#define UART_STD_CTRL1 0x08
+#define UART_EXT_CTRL1 0x04
#define CTRL_SOFT_RST BIT(31)
#define CTRL_TXFIFO_RST BIT(15)
#define CTRL_RXFIFO_RST BIT(14)
@@ -55,15 +58,20 @@
CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
#define UART_STD_CTRL2 UART_STD_CTRL1
+#define UART_EXT_CTRL2 0x20
#define CTRL_STD_TX_RDY_INT BIT(5)
+#define CTRL_EXT_TX_RDY_INT BIT(6)
#define CTRL_STD_RX_RDY_INT BIT(4)
+#define CTRL_EXT_RX_RDY_INT BIT(5)
#define UART_STAT 0x0C
#define STAT_TX_FIFO_EMP BIT(13)
#define STAT_TX_FIFO_FUL BIT(11)
#define STAT_TX_EMP BIT(6)
#define STAT_STD_TX_RDY BIT(5)
+#define STAT_EXT_TX_RDY BIT(15)
#define STAT_STD_RX_RDY BIT(4)
+#define STAT_EXT_RX_RDY BIT(14)
#define STAT_BRK_DET BIT(3)
#define STAT_FRM_ERR BIT(2)
#define STAT_PAR_ERR BIT(1)
@@ -865,12 +873,28 @@ static struct mvebu_uart_driver_data uart_std_driver_data = {
.flags.stat_rx_rdy = STAT_STD_RX_RDY,
};
+static struct mvebu_uart_driver_data uart_ext_driver_data = {
+ .is_ext = true,
+ .regs.rbr = UART_EXT_RBR,
+ .regs.tsh = UART_EXT_TSH,
+ .regs.ctrl = UART_EXT_CTRL1,
+ .regs.intr = UART_EXT_CTRL2,
+ .flags.ctrl_tx_rdy_int = CTRL_EXT_TX_RDY_INT,
+ .flags.ctrl_rx_rdy_int = CTRL_EXT_RX_RDY_INT,
+ .flags.stat_tx_rdy = STAT_EXT_TX_RDY,
+ .flags.stat_rx_rdy = STAT_EXT_RX_RDY,
+};
+
/* Match table for of_platform binding */
static const struct of_device_id mvebu_uart_of_match[] = {
{
.compatible = "marvell,armada-3700-uart",
.data = (void *)&uart_std_driver_data,
},
+ {
+ .compatible = "marvell,armada-3700-uart-ext",
+ .data = (void *)&uart_ext_driver_data,
+ },
{}
};
--
2.11.0
--
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^ permalink raw reply related
* [PATCH v2 11/16] serial: mvebu-uart: augment the maximum number of ports
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial, devicetree, linux-arm-kernel, linux-gpio,
Thomas Petazzoni, Antoine Tenart, Nadav Haklai, Wilson Ding,
Miquel Raynal
In-Reply-To: <20171013090200.31034-1-miquel.raynal@free-electrons.com>
A3700 boards may have up to two UART ports. Set the new limit to two
maximum UART ports.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/tty/serial/mvebu-uart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index d0e749f6f052..1074054ee5be 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -74,7 +74,7 @@
#define UART_BRDV 0x10
#define BRDV_BAUD_MASK 0x3FF
-#define MVEBU_NR_UARTS 1
+#define MVEBU_NR_UARTS 2
#define MVEBU_UART_TYPE "mvebu-uart"
#define DRIVER_NAME "mvebu_serial"
--
2.11.0
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