* Re: [PATCH 2/2] tty: serial: add driver for the SiFive UART
From: kbuild test robot @ 2018-10-19 9:55 UTC (permalink / raw)
Cc: kbuild-all, linux-serial, Paul Walmsley, Greg Kroah-Hartman,
Jiri Slaby, Palmer Dabbelt, Wesley Terpstra, linux-riscv,
linux-kernel, Paul Walmsley
In-Reply-To: <20181018234352.26788-3-paul.walmsley@sifive.com>
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Hi Paul,
I love your patch! Yet something to improve:
[auto build test ERROR on tty/tty-testing]
[also build test ERROR on v4.19-rc8 next-20181019]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Paul-Walmsley/dt-bindings-serial-add-documentation-for-the-SiFive-UART-driver/20181019-165529
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-testing
config: i386-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
>> drivers/tty/serial/sifive.c:891:20: error: 'sifive_serial_poll_put_char' undeclared here (not in a function); did you mean 'sifive_serial_clk_notifier'?
.poll_put_char = sifive_serial_poll_put_char,
^~~~~~~~~~~~~~~~~~~~~~~~~~~
sifive_serial_clk_notifier
>> drivers/tty/serial/sifive.c:892:20: error: 'sifive_serial_poll_get_char' undeclared here (not in a function); did you mean 'sifive_serial_poll_put_char'?
.poll_get_char = sifive_serial_poll_get_char,
^~~~~~~~~~~~~~~~~~~~~~~~~~~
sifive_serial_poll_put_char
In file included from drivers/tty/serial/sifive.c:47:0:
drivers/tty/serial/sifive.c:1028:25: error: 'sifive_serial_match' undeclared here (not in a function); did you mean 'sifive_serial_of_match'?
MODULE_DEVICE_TABLE(of, sifive_serial_match);
^
include/linux/module.h:213:15: note: in definition of macro 'MODULE_DEVICE_TABLE'
extern typeof(name) __mod_##type##__##name##_device_table \
^~~~
include/linux/module.h:213:21: error: '__mod_of__sifive_serial_match_device_table' aliased to undefined symbol 'sifive_serial_match'
extern typeof(name) __mod_##type##__##name##_device_table \
^
drivers/tty/serial/sifive.c:1028:1: note: in expansion of macro 'MODULE_DEVICE_TABLE'
MODULE_DEVICE_TABLE(of, sifive_serial_match);
^~~~~~~~~~~~~~~~~~~
drivers/tty/serial/sifive.c:522:13: warning: '__ssp_wait_for_xmitr' defined but not used [-Wunused-function]
static void __ssp_wait_for_xmitr(struct sifive_serial_port *ssp)
^~~~~~~~~~~~~~~~~~~~
vim +891 drivers/tty/serial/sifive.c
873
874 static const struct uart_ops sifive_serial_uops = {
875 .tx_empty = sifive_serial_tx_empty,
876 .set_mctrl = sifive_serial_set_mctrl,
877 .get_mctrl = sifive_serial_get_mctrl,
878 .stop_tx = sifive_serial_stop_tx,
879 .start_tx = sifive_serial_start_tx,
880 .stop_rx = sifive_serial_stop_rx,
881 .break_ctl = sifive_serial_break_ctl,
882 .startup = sifive_serial_startup,
883 .shutdown = sifive_serial_shutdown,
884 .set_termios = sifive_serial_set_termios,
885 .type = sifive_serial_type,
886 .release_port = sifive_serial_release_port,
887 .request_port = sifive_serial_request_port,
888 .config_port = sifive_serial_config_port,
889 .verify_port = sifive_serial_verify_port,
890 #ifdef CONFIG_CONSOLE_POLL
> 891 .poll_put_char = sifive_serial_poll_put_char,
> 892 .poll_get_char = sifive_serial_poll_get_char,
893 #endif
894 };
895
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 65228 bytes --]
^ permalink raw reply
* Re: [PATCH 2/2] tty: serial: add driver for the SiFive UART
From: kbuild test robot @ 2018-10-19 10:40 UTC (permalink / raw)
Cc: kbuild-all, linux-serial, Paul Walmsley, Greg Kroah-Hartman,
Jiri Slaby, Palmer Dabbelt, Wesley Terpstra, linux-riscv,
linux-kernel, Paul Walmsley
In-Reply-To: <20181018234352.26788-3-paul.walmsley@sifive.com>
[-- Attachment #1: Type: text/plain, Size: 2639 bytes --]
Hi Paul,
I love your patch! Yet something to improve:
[auto build test ERROR on tty/tty-testing]
[also build test ERROR on v4.19-rc8 next-20181019]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Paul-Walmsley/dt-bindings-serial-add-documentation-for-the-SiFive-UART-driver/20181019-165529
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-testing
config: powerpc-allyesconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=powerpc
All errors (new ones prefixed by >>):
>> drivers/tty/serial/sifive.c:891:20: error: 'sifive_serial_poll_put_char' undeclared here (not in a function); did you mean 'sifive_serial_console_putchar'?
.poll_put_char = sifive_serial_poll_put_char,
^~~~~~~~~~~~~~~~~~~~~~~~~~~
sifive_serial_console_putchar
drivers/tty/serial/sifive.c:892:20: error: 'sifive_serial_poll_get_char' undeclared here (not in a function); did you mean 'sifive_serial_poll_put_char'?
.poll_get_char = sifive_serial_poll_get_char,
^~~~~~~~~~~~~~~~~~~~~~~~~~~
sifive_serial_poll_put_char
vim +891 drivers/tty/serial/sifive.c
873
874 static const struct uart_ops sifive_serial_uops = {
875 .tx_empty = sifive_serial_tx_empty,
876 .set_mctrl = sifive_serial_set_mctrl,
877 .get_mctrl = sifive_serial_get_mctrl,
878 .stop_tx = sifive_serial_stop_tx,
879 .start_tx = sifive_serial_start_tx,
880 .stop_rx = sifive_serial_stop_rx,
881 .break_ctl = sifive_serial_break_ctl,
882 .startup = sifive_serial_startup,
883 .shutdown = sifive_serial_shutdown,
884 .set_termios = sifive_serial_set_termios,
885 .type = sifive_serial_type,
886 .release_port = sifive_serial_release_port,
887 .request_port = sifive_serial_request_port,
888 .config_port = sifive_serial_config_port,
889 .verify_port = sifive_serial_verify_port,
890 #ifdef CONFIG_CONSOLE_POLL
> 891 .poll_put_char = sifive_serial_poll_put_char,
892 .poll_get_char = sifive_serial_poll_get_char,
893 #endif
894 };
895
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 58777 bytes --]
^ permalink raw reply
* Re: Crash in msm serial on dragonboard with ftrace bootargs
From: Steven Rostedt @ 2018-10-19 13:51 UTC (permalink / raw)
To: Sai Prakash Ranjan
Cc: Joel Fernandes, Stephen Boyd, Bjorn Andersson, Andy Gross,
David Brown, Jiri Slaby, Kees Cook, Geliang Tang,
Greg Kroah-Hartman, Pramod Gurav, linux-arm-msm, linux-soc,
linux-serial, linux-kernel, Rajendra Nayak, Vivek Gautam,
Sibi Sankar
In-Reply-To: <8a75f2d5-f1bd-504e-b545-ae2e2f61ca8f@codeaurora.org>
On Fri, 19 Oct 2018 12:24:05 +0530
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> wrote:
> >> Anyone see any problems here?
> >
> > This seems sane to me, he says in the other thread that he put 'notrace' to
> > the msm serial functions (which AIUI should prevent ftrace instrumentation)
> > and he still sees the issue.
> >
>
> Yes I did add notrace to all functions in msm serial and checked the
> objdump to make sure that those were not instrumented, and yet the
> target crashed. This doesnt seem like an issue with ftrace but rather
> with msm early con.
The thing that still bothers me is that it boots fine without ftrace
running, and that it requires tracing something to cause the problem.
This tells me that ftrace has something to do with it. Perhaps it's
just changing the timing.
You said that if you add 'ftrace_filter=msm_read' to the command line,
it still crashes?
So only tracing that function we have an issue, right?
-- Steve
^ permalink raw reply
* Re: Crash in msm serial on dragonboard with ftrace bootargs
From: Sai Prakash Ranjan @ 2018-10-19 14:48 UTC (permalink / raw)
To: Steven Rostedt
Cc: Joel Fernandes, Stephen Boyd, Bjorn Andersson, Andy Gross,
David Brown, Jiri Slaby, Kees Cook, Geliang Tang,
Greg Kroah-Hartman, Pramod Gurav, linux-arm-msm, linux-soc,
linux-serial, linux-kernel, Rajendra Nayak, Vivek Gautam,
Sibi Sankar
In-Reply-To: <20181019095122.0f1c0946@gandalf.local.home>
On 10/19/2018 7:21 PM, Steven Rostedt wrote:
> On Fri, 19 Oct 2018 12:24:05 +0530
> Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> wrote:
>
>>>> Anyone see any problems here?
>>>
>>> This seems sane to me, he says in the other thread that he put 'notrace' to
>>> the msm serial functions (which AIUI should prevent ftrace instrumentation)
>>> and he still sees the issue.
>>>
>>
>> Yes I did add notrace to all functions in msm serial and checked the
>> objdump to make sure that those were not instrumented, and yet the
>> target crashed. This doesnt seem like an issue with ftrace but rather
>> with msm early con.
>
> The thing that still bothers me is that it boots fine without ftrace
> running, and that it requires tracing something to cause the problem.
> This tells me that ftrace has something to do with it. Perhaps it's
> just changing the timing.
>
Yes tracing does cause issue but only if earlycon is present. If I
disable earlycon, then even tracing wont cause any issue and target
boots fine.
> You said that if you add 'ftrace_filter=msm_read' to the command line,
> it still crashes?
>
> So only tracing that function we have an issue, right?
>
Tracing msm_read does cause the crash, but that is not the only one
causing the crash because even after "ftrace_notrace=msm_read" the board
crashes which is why I suspect msm earlycon and not ftrace.
Thanks,
Sai
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply
* Re: Crash in msm serial on dragonboard with ftrace bootargs
From: Steven Rostedt @ 2018-10-19 15:12 UTC (permalink / raw)
To: Sai Prakash Ranjan
Cc: Joel Fernandes, Stephen Boyd, Bjorn Andersson, Andy Gross,
David Brown, Jiri Slaby, Kees Cook, Geliang Tang,
Greg Kroah-Hartman, Pramod Gurav, linux-arm-msm, linux-soc,
linux-serial, linux-kernel, Rajendra Nayak, Vivek Gautam,
Sibi Sankar
In-Reply-To: <9cafe321-87f6-98a3-3bda-c2f7a3d7fc67@codeaurora.org>
On Fri, 19 Oct 2018 20:18:19 +0530
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> wrote:
> > You said that if you add 'ftrace_filter=msm_read' to the command line,
> > it still crashes?
> >
> > So only tracing that function we have an issue, right?
> >
>
> Tracing msm_read does cause the crash, but that is not the only one
> causing the crash because even after "ftrace_notrace=msm_read" the board
> crashes which is why I suspect msm earlycon and not ftrace.
I'm saying there's a combination of the two. Because when ftrace is not
involved, early con doesn't crash.
I would focus on why earlycon crashes when only msm_read is traced.
That should help narrow down the cause.
What we know is:
earlycon -> boots
ftrace=function -> boots
earlycon ftrace=function ftrace_filter=msm_read -> crashes
If we remove the "ftrace=function ftrace_filter=msm_read" it boots
fine, and I'm assuming that if we just remove earlycon (keeping the
ftrace_filter), it also boots too.
Thus, ftrace tracing msm_read is causing earlycon to do something that
triggers the crash.
-- Steve
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
From: Palmer Dabbelt @ 2018-10-19 16:51 UTC (permalink / raw)
Cc: linux-serial, Paul Walmsley, devicetree, linux-riscv,
linux-kernel, Greg KH, robh+dt, mark.rutland, paul
In-Reply-To: <20181018234352.26788-2-paul.walmsley@sifive.com>
On Thu, 18 Oct 2018 16:43:53 PDT (-0700), Paul Walmsley wrote:
> Add DT binding documentation for the Linux driver for the SiFive
> asynchronous serial IP block. Nothing too exotic.
>
> Cc: linux-serial@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Cc: linux-riscv@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
> .../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
>
> diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
> new file mode 100644
> index 000000000000..8982338512f5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
> @@ -0,0 +1,21 @@
> +SiFive asynchronous serial interface (UART)
> +
> +Required properties:
> +
> +- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0"
> +- reg: address and length of the register space
> +- interrupt-parent: should contain a phandle pointing to the SoC interrupt
> + controller device node that the UART interrupts are connected to
> +- interrupts: Should contain the UART interrupt identifier
> +- clocks: Should contain a clock identifier for the UART's parent clock
> +
> +
> +Example:
> +
> +uart0: serial@10010000 {
> + compatible = "sifive,uart0";
> + interrupt-parent = <&plic0>;
> + interrupts = <80>;
> + reg = <0x0 0x10010000 0x0 0x1000>;
> + clocks = <&prci PRCI_CLK_TLCLK>;
> +};
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
^ permalink raw reply
* Re: [PATCH 2/2] tty: serial: add driver for the SiFive UART (fwd)
From: Julia Lawall @ 2018-10-19 17:27 UTC (permalink / raw)
Cc: linux-serial, kbuild-all, Paul Walmsley, Greg Kroah-Hartman,
Jiri Slaby, Palmer Dabbelt, Wesley Terpstra, linux-riscv,
linux-kernel, Paul Walmsley
Hello,
It looks like an unlock is needed before the return on line 562.
julia
---------- Forwarded message ----------
Date: Fri, 19 Oct 2018 18:12:04 +0800
From: kbuild test robot <lkp@intel.com>
To: kbuild@01.org
Cc: Julia Lawall <julia.lawall@lip6.fr>
Subject: Re: [PATCH 2/2] tty: serial: add driver for the SiFive UART
CC: kbuild-all@01.org
In-Reply-To: <20181018234352.26788-3-paul.walmsley@sifive.com>
References: <20181018234352.26788-3-paul.walmsley@sifive.com>
TO: Paul Walmsley <paul.walmsley@sifive.com>
CC: linux-serial@vger.kernel.org
CC: Paul Walmsley <paul.walmsley@sifive.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jiri Slaby <jslaby@suse.com>, Palmer Dabbelt <palmer@sifive.com>, Wesley Terpstra <wesley@sifive.com>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley <paul@pwsan.com>
Hi Paul,
I love your patch! Perhaps something to improve:
[auto build test WARNING on tty/tty-testing]
[also build test WARNING on v4.19-rc8 next-20181019]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Paul-Walmsley/dt-bindings-serial-add-documentation-for-the-SiFive-UART-driver/20181019-165529
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-testing
:::::: branch date: 77 minutes ago
:::::: commit date: 77 minutes ago
>> drivers/tty/serial/sifive.c:562:2-8: preceding lock on line 558
# https://github.com/0day-ci/linux/commit/15d0af7ab79ba53f984613f23e668cade495babb
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout 15d0af7ab79ba53f984613f23e668cade495babb
vim +562 drivers/tty/serial/sifive.c
15d0af7a Paul Walmsley 2018-10-18 552
15d0af7a Paul Walmsley 2018-10-18 553 static irqreturn_t sifive_serial_irq(int irq, void *dev_id)
15d0af7a Paul Walmsley 2018-10-18 554 {
15d0af7a Paul Walmsley 2018-10-18 555 struct sifive_serial_port *ssp = dev_id;
15d0af7a Paul Walmsley 2018-10-18 556 u32 ip;
15d0af7a Paul Walmsley 2018-10-18 557
15d0af7a Paul Walmsley 2018-10-18 @558 spin_lock(&ssp->port.lock);
15d0af7a Paul Walmsley 2018-10-18 559
15d0af7a Paul Walmsley 2018-10-18 560 ip = __ssp_readl(ssp, SIFIVE_SERIAL_IP_OFFS);
15d0af7a Paul Walmsley 2018-10-18 561 if (!ip)
15d0af7a Paul Walmsley 2018-10-18 @562 return IRQ_NONE;
15d0af7a Paul Walmsley 2018-10-18 563
15d0af7a Paul Walmsley 2018-10-18 564 if (ip & SIFIVE_SERIAL_IP_RXWM_MASK)
15d0af7a Paul Walmsley 2018-10-18 565 __ssp_receive_chars(ssp);
15d0af7a Paul Walmsley 2018-10-18 566 if (ip & SIFIVE_SERIAL_IP_TXWM_MASK)
15d0af7a Paul Walmsley 2018-10-18 567 __ssp_transmit_chars(ssp);
15d0af7a Paul Walmsley 2018-10-18 568
15d0af7a Paul Walmsley 2018-10-18 569 spin_unlock(&ssp->port.lock);
15d0af7a Paul Walmsley 2018-10-18 570
15d0af7a Paul Walmsley 2018-10-18 571 return IRQ_HANDLED;
15d0af7a Paul Walmsley 2018-10-18 572 }
15d0af7a Paul Walmsley 2018-10-18 573
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
^ permalink raw reply
* [PATCH v2 0/2] tty: serial: add DT bindings and serial driver for the SiFive FU540 UART
From: Paul Walmsley @ 2018-10-19 18:48 UTC (permalink / raw)
To: linux-serial
Cc: Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby, Palmer Dabbelt,
Wesley Terpstra, linux-riscv, linux-kernel, devicetree
This series adds a serial driver, with console support, for the
UART IP block present on the SiFive FU540 SoC. The programming
model is straightforward, but unique.
Boot-tested on a SiFive FU540 HiFive-U board (with appropriate patches
to the DT data).
The patches in this series can also be found at:
https://github.com/sifive/riscv-linux/tree/dev/paulw/serial-v4.19-rc7
This second version fixes a few problems identified by the 0-day
build system, mostly focused around remnants relating to
CONFIG_CONSOLE_POLL, and a missing spin_unlock() in the ISR.
Paul Walmsley (2):
dt-bindings: serial: add documentation for the SiFive UART driver
tty: serial: add driver for the SiFive UART
.../bindings/serial/sifive-serial.txt | 21 +
drivers/tty/serial/Kconfig | 24 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/sifive.c | 1067 +++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
5 files changed, 1116 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
create mode 100644 drivers/tty/serial/sifive.c
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Wesley Terpstra <wesley@sifive.com>
Cc: linux-serial@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
--
2.19.1
^ permalink raw reply
* [PATCH v2 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
From: Paul Walmsley @ 2018-10-19 18:48 UTC (permalink / raw)
To: linux-serial
Cc: Paul Walmsley, devicetree, linux-riscv, linux-kernel,
Greg Kroah-Hartman, Rob Herring, Mark Rutland, Palmer Dabbelt,
Paul Walmsley
In-Reply-To: <20181019184827.12351-1-paul.walmsley@sifive.com>
Add DT binding documentation for the Linux driver for the SiFive
asynchronous serial IP block. Nothing too exotic.
Cc: linux-serial@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
.../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
new file mode 100644
index 000000000000..8982338512f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
@@ -0,0 +1,21 @@
+SiFive asynchronous serial interface (UART)
+
+Required properties:
+
+- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0"
+- reg: address and length of the register space
+- interrupt-parent: should contain a phandle pointing to the SoC interrupt
+ controller device node that the UART interrupts are connected to
+- interrupts: Should contain the UART interrupt identifier
+- clocks: Should contain a clock identifier for the UART's parent clock
+
+
+Example:
+
+uart0: serial@10010000 {
+ compatible = "sifive,uart0";
+ interrupt-parent = <&plic0>;
+ interrupts = <80>;
+ reg = <0x0 0x10010000 0x0 0x1000>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+};
--
2.19.1
^ permalink raw reply related
* [PATCH v2 2/2] tty: serial: add driver for the SiFive UART
From: Paul Walmsley @ 2018-10-19 18:48 UTC (permalink / raw)
To: linux-serial
Cc: Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby, Palmer Dabbelt,
Wesley Terpstra, linux-riscv, linux-kernel, Julia Lawall,
Paul Walmsley
In-Reply-To: <20181019184827.12351-1-paul.walmsley@sifive.com>
Add a serial driver for the SiFive UART, found on SiFive FU540 devices
(among others).
The underlying serial IP block is relatively basic, and currently does
not support serial break detection. Further information on the IP
block can be found in the documentation and Chisel sources:
https://static.dev.sifive.com/FU540-C000-v1.0.pdf
https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart
This driver was written in collaboration with Wesley Terpstra
<wesley@sifive.com>.
Boot-tested on a SiFive HiFive Unleashed A00 board.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Wesley Terpstra <wesley@sifive.com>
Cc: linux-serial@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
v2: remove leftover junk related to CONFIG_CONSOLE_POLL; add missing
spin_unlock() in ISR found by 0-day and Julia Lawall
drivers/tty/serial/Kconfig | 24 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/sifive.c | 1067 ++++++++++++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
4 files changed, 1095 insertions(+)
create mode 100644 drivers/tty/serial/sifive.c
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index df8bd0c7b97d..fdd624df75c8 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1060,6 +1060,30 @@ config SERIAL_OMAP_CONSOLE
your boot loader about how to pass options to the kernel at
boot time.)
+config SERIAL_SIFIVE
+ tristate "SiFive UART support"
+ depends on OF
+ select SERIAL_CORE
+ help
+ Select this option if you are building a kernel for a device that
+ contains a SiFive UART IP block. This type of UART is present on
+ SiFive FU540 SoCs, among others.
+
+config SERIAL_SIFIVE_CONSOLE
+ bool "Console on SiFive UART"
+ depends on SERIAL_SIFIVE=y
+ select SERIAL_CORE_CONSOLE
+ help
+ Select this option if you would like to use a SiFive UART as the
+ system console.
+
+ Even if you say Y here, the currently visible virtual console
+ (/dev/tty0) will still be used as the system console by default, but
+ you can alter that using a kernel command line option such as
+ "console=ttySIFx". (Try "man bootparam" or see the documentation of
+ your boot loader about how to pass options to the kernel at
+ boot time.)
+
config SERIAL_LANTIQ
bool "Lantiq serial driver"
depends on LANTIQ
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index daac675612df..7e906d3c0455 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
obj-$(CONFIG_SERIAL_PIC32) += pic32_uart.o
obj-$(CONFIG_SERIAL_MPS2_UART) += mps2-uart.o
obj-$(CONFIG_SERIAL_OWL) += owl-uart.o
+obj-$(CONFIG_SERIAL_SIFIVE) += sifive.o
# GPIOLIB helpers for modem control lines
obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c
new file mode 100644
index 000000000000..fd0220626918
--- /dev/null
+++ b/drivers/tty/serial/sifive.c
@@ -0,0 +1,1067 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SiFive UART driver
+ * Copyright (C) 2018 Paul Walmsley <paul@pwsan.com>
+ * Copyright (C) 2018 SiFive
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Based partially on:
+ * - drivers/tty/serial/pxa.c
+ * - drivers/tty/serial/amba-pl011.c
+ * - drivers/tty/serial/uartlite.c
+ * - drivers/tty/serial/omap-serial.c
+ * - drivers/pwm/pwm-sifive.c
+ *
+ * See the following sources for further documentation:
+ * - Chapter 19 "Universal Asynchronous Receiver/Transmitter (UART)" of
+ * SiFive FE310-G000 v2p3
+ * - The tree/master/src/main/scala/devices/uart directory of
+ * https://github.com/sifive/sifive-blocks/
+ *
+ * The SiFive UART design is not 8250-compatible. The following common
+ * features are not supported:
+ * - Word lengths other than 8 bits
+ * - Break handling
+ * - Parity
+ * - Flow control
+ * - Modem signals (DSR, RI, etc.)
+ * On the other hand, the design is free from the baggage of the 8250
+ * programming model.
+ */
+
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+
+/*
+ * Register offsets
+ */
+
+/* TXDATA */
+#define SIFIVE_SERIAL_TXDATA_OFFS 0x0
+#define SIFIVE_SERIAL_TXDATA_FULL_SHIFT 31
+#define SIFIVE_SERIAL_TXDATA_FULL_MASK (1 << SIFIVE_SERIAL_TXDATA_FULL_SHIFT)
+#define SIFIVE_SERIAL_TXDATA_DATA_SHIFT 0
+#define SIFIVE_SERIAL_TXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_TXDATA_DATA_SHIFT)
+
+/* RXDATA */
+#define SIFIVE_SERIAL_RXDATA_OFFS 0x4
+#define SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT 31
+#define SIFIVE_SERIAL_RXDATA_EMPTY_MASK (1 << SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT)
+#define SIFIVE_SERIAL_RXDATA_DATA_SHIFT 0
+#define SIFIVE_SERIAL_RXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_RXDATA_DATA_SHIFT)
+
+/* TXCTRL */
+#define SIFIVE_SERIAL_TXCTRL_OFFS 0x8
+#define SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT 16
+#define SIFIVE_SERIAL_TXCTRL_TXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
+#define SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT 1
+#define SIFIVE_SERIAL_TXCTRL_NSTOP_MASK (1 << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT)
+#define SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT 0
+#define SIFIVE_SERIAL_TXCTRL_TXEN_MASK (1 << SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT)
+
+/* RXCTRL */
+#define SIFIVE_SERIAL_RXCTRL_OFFS 0xC
+#define SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT 16
+#define SIFIVE_SERIAL_RXCTRL_RXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
+#define SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT 0
+#define SIFIVE_SERIAL_RXCTRL_RXEN_MASK (1 << SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT)
+
+/* IE */
+#define SIFIVE_SERIAL_IE_OFFS 0x10
+#define SIFIVE_SERIAL_IE_RXWM_SHIFT 1
+#define SIFIVE_SERIAL_IE_RXWM_MASK (1 << SIFIVE_SERIAL_IE_RXWM_SHIFT)
+#define SIFIVE_SERIAL_IE_TXWM_SHIFT 0
+#define SIFIVE_SERIAL_IE_TXWM_MASK (1 << SIFIVE_SERIAL_IE_TXWM_SHIFT)
+
+/* IP */
+#define SIFIVE_SERIAL_IP_OFFS 0x14
+#define SIFIVE_SERIAL_IP_RXWM_SHIFT 1
+#define SIFIVE_SERIAL_IP_RXWM_MASK (1 << SIFIVE_SERIAL_IP_RXWM_SHIFT)
+#define SIFIVE_SERIAL_IP_TXWM_SHIFT 0
+#define SIFIVE_SERIAL_IP_TXWM_MASK (1 << SIFIVE_SERIAL_IP_TXWM_SHIFT)
+
+/* DIV */
+#define SIFIVE_SERIAL_DIV_OFFS 0x18
+#define SIFIVE_SERIAL_DIV_DIV_SHIFT 0
+#define SIFIVE_SERIAL_DIV_DIV_MASK (0xffff << SIFIVE_SERIAL_IP_DIV_SHIFT)
+
+/*
+ * Config macros
+ */
+
+/*
+ * SIFIVE_SERIAL_MAX_PORTS: maximum number of UARTs on a device that can
+ * host a serial console
+ */
+#define SIFIVE_SERIAL_MAX_PORTS 8
+
+/*
+ * SIFIVE_DEFAULT_BAUD_RATE: default baud rate that the driver should
+ * configure itself to use
+ */
+#define SIFIVE_DEFAULT_BAUD_RATE 115200
+
+/* SIFIVE_SERIAL_NAME: our driver's name that we pass to the operating system */
+#define SIFIVE_SERIAL_NAME "sifive-serial"
+
+/* SIFIVE_TTY_PREFIX: tty name prefix for SiFive serial ports */
+#define SIFIVE_TTY_PREFIX "ttySIF"
+
+/* SIFIVE_TX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */
+#define SIFIVE_TX_FIFO_DEPTH 8
+
+/* SIFIVE_RX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */
+#define SIFIVE_RX_FIFO_DEPTH 8
+
+#if (SIFIVE_TX_FIFO_DEPTH != SIFIVE_RX_FIFO_DEPTH)
+#error Driver does not support configurations with different TX, RX FIFO sizes
+#endif
+
+/*
+ *
+ */
+
+/**
+ * sifive_serial_port - driver-specific data extension to struct uart_port
+ * @port: struct uart_port embedded in this struct
+ * @dev: struct device *
+ * @ier: shadowed copy of the interrupt enable register
+ * @clkin_rate: input clock to the UART IP block.
+ * @baud_rate: UART serial line rate (e.g., 115200 baud)
+ * @clk_notifier: clock rate change notifier for upstream clock changes
+ *
+ * Configuration data specific to this SiFive UART.
+ */
+struct sifive_serial_port {
+ struct uart_port port;
+ struct device *dev;
+ unsigned char ier;
+ unsigned long clkin_rate;
+ unsigned long baud_rate;
+ struct clk *clk;
+ struct notifier_block clk_notifier;
+};
+
+/*
+ * Structure container-of macros
+ */
+
+#define port_to_sifive_serial_port(p) (container_of((p), \
+ struct sifive_serial_port, \
+ port))
+
+#define notifier_to_sifive_serial_port(nb) (container_of((nb), \
+ struct sifive_serial_port, \
+ clk_notifier))
+
+/*
+ * Forward declarations
+ */
+static void sifive_serial_stop_tx(struct uart_port *port);
+
+/*
+ * Internal functions
+ */
+
+/**
+ * __ssp_early_writel() - write to a SiFive serial port register (early)
+ * @port: pointer to a struct uart_port record
+ * @offs: register address offset from the IP block base address
+ * @v: value to write to the register
+ *
+ * Given a pointer @port to a struct uart_port record, write the value
+ * @v to the IP block register address offset @offs. This function is
+ * intended for early console use.
+ *
+ * Context: Intended to be used only by the earlyconsole code.
+ */
+static void __ssp_early_writel(u32 v, u16 offs, struct uart_port *port)
+{
+ writel_relaxed(v, port->membase + offs);
+}
+
+/**
+ * __ssp_early_readl() - read from a SiFive serial port register (early)
+ * @port: pointer to a struct uart_port record
+ * @offs: register address offset from the IP block base address
+ *
+ * Given a pointer @port to a struct uart_port record, read the
+ * contents of the IP block register located at offset @offs from the
+ * IP block base and return it. This function is intended for early
+ * console use.
+ *
+ * Context: Intended to be called only by the earlyconsole code or by
+ * __ssp_readl() or __ssp_writel() (in this driver)
+ *
+ * Returns: the register value read from the UART.
+ */
+static u32 __ssp_early_readl(struct uart_port *port, u16 offs)
+{
+ return readl_relaxed(port->membase + offs);
+}
+
+/**
+ * __ssp_writel() - write to a SiFive serial port register
+ * @v: value to write to the register
+ * @offs: register address offset from the IP block base address
+ * @ssp: pointer to a struct sifive_serial_port record
+ *
+ * Write the value @v to the IP block register located at offset @offs from the
+ * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
+ *
+ * Context: Any context.
+ */
+static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp)
+{
+ __ssp_early_writel(v, offs, &ssp->port);
+}
+
+/**
+ * __ssp_readl() - read from a SiFive serial port register
+ * @ssp: pointer to a struct sifive_serial_port record
+ * @offs: register address offset from the IP block base address
+ *
+ * Read the contents of the IP block register located at offset @offs from the
+ * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
+ *
+ * Context: Any context.
+ *
+ * Returns: the value of the UART register
+ */
+static u32 __ssp_readl(struct sifive_serial_port *ssp, u16 offs)
+{
+ return __ssp_early_readl(&ssp->port, offs);
+}
+
+/**
+ * sifive_serial_is_txfifo_full() - is the TXFIFO full?
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Read the transmit FIFO "full" bit, returning a non-zero value if the
+ * TX FIFO is full, or zero if space remains. Intended to be used to prevent
+ * writes to the TX FIFO when it's full.
+ *
+ * Returns: SIFIVE_SERIAL_TXDATA_FULL_MASK (non-zero) if the transmit FIFO
+ * is full, or 0 if space remains.
+ */
+static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp)
+{
+ return __ssp_readl(ssp, SIFIVE_SERIAL_TXDATA_OFFS) &
+ SIFIVE_SERIAL_TXDATA_FULL_MASK;
+}
+
+/**
+ * __ssp_transmit_char() - enqueue a byte to transmit onto the TX FIFO
+ * @ssp: pointer to a struct sifive_serial_port
+ * @ch: character to transmit
+ *
+ * Enqueue a byte @ch onto the transmit FIFO, given a pointer @ssp to the
+ * struct sifive_serial_port * to transmit on. Caller should first check to
+ * ensure that the TXFIFO has space; see sifive_serial_is_txfifo_full().
+ *
+ * Context: Any context.
+ */
+static void __ssp_transmit_char(struct sifive_serial_port *ssp, int ch)
+{
+ __ssp_writel(ch, SIFIVE_SERIAL_TXDATA_OFFS, ssp);
+}
+
+/**
+ * __ssp_transmit_chars() - enqueue multiple bytes onto the TX FIFO
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Transfer up to a TX FIFO size's worth of characters from the Linux serial
+ * transmit buffer to the SiFive UART TX FIFO.
+ *
+ * Context: Any context. Expects @ssp->port.lock to be held by caller.
+ */
+static void __ssp_transmit_chars(struct sifive_serial_port *ssp)
+{
+ struct circ_buf *xmit = &ssp->port.state->xmit;
+ int count;
+
+ if (ssp->port.x_char) {
+ __ssp_transmit_char(ssp, ssp->port.x_char);
+ ssp->port.icount.tx++;
+ ssp->port.x_char = 0;
+ return;
+ }
+ if (uart_circ_empty(xmit) || uart_tx_stopped(&ssp->port)) {
+ sifive_serial_stop_tx(&ssp->port);
+ return;
+ }
+ count = SIFIVE_TX_FIFO_DEPTH;
+ do {
+ __ssp_transmit_char(ssp, xmit->buf[xmit->tail]);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ ssp->port.icount.tx++;
+ if (uart_circ_empty(xmit))
+ break;
+ } while (--count > 0);
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(&ssp->port);
+
+ if (uart_circ_empty(xmit))
+ sifive_serial_stop_tx(&ssp->port);
+}
+
+/**
+ * __ssp_enable_txwm() - enable transmit watermark interrupts
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Enable interrupt generation when the transmit FIFO watermark is reached
+ * on the SiFive UART referred to by @ssp.
+ */
+static void __ssp_enable_txwm(struct sifive_serial_port *ssp)
+{
+ if (ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK)
+ return;
+
+ ssp->ier |= SIFIVE_SERIAL_IE_TXWM_MASK;
+ __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+}
+
+/**
+ * __ssp_enable_rxwm() - enable receive watermark interrupts
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Enable interrupt generation when the receive FIFO watermark is reached
+ * on the SiFive UART referred to by @ssp.
+ */
+static void __ssp_enable_rxwm(struct sifive_serial_port *ssp)
+{
+ if (ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK)
+ return;
+
+ ssp->ier |= SIFIVE_SERIAL_IE_RXWM_MASK;
+ __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+}
+
+/**
+ * __ssp_disable_txwm() - disable transmit watermark interrupts
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Disable interrupt generation when the transmit FIFO watermark is reached
+ * on the UART referred to by @ssp.
+ */
+static void __ssp_disable_txwm(struct sifive_serial_port *ssp)
+{
+ if (!(ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK))
+ return;
+
+ ssp->ier &= ~SIFIVE_SERIAL_IE_TXWM_MASK;
+ __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+}
+
+/**
+ * __ssp_disable_rxwm() - disable receive watermark interrupts
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Disable interrupt generation when the receive FIFO watermark is reached
+ * on the UART referred to by @ssp.
+ */
+static void __ssp_disable_rxwm(struct sifive_serial_port *ssp)
+{
+ if (!(ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK))
+ return;
+
+ ssp->ier &= ~SIFIVE_SERIAL_IE_RXWM_MASK;
+ __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+}
+
+/**
+ * __ssp_receive_char() - receive a byte from the UART
+ * @ssp: pointer to a struct sifive_serial_port
+ * @is_empty: char pointer to return whether the RX FIFO is empty
+ *
+ * Try to read a byte from the SiFive UART RX FIFO, referenced by
+ * @ssp, and to return it. Also returns the RX FIFO empty bit in
+ * the char pointed to by @ch. The caller must pass the byte back to the
+ * Linux serial layer if needed.
+ *
+ * Returns: the byte read from the UART RX FIFO.
+ */
+static char __ssp_receive_char(struct sifive_serial_port *ssp, char *is_empty)
+{
+ u32 v;
+ u8 ch;
+
+ v = __ssp_readl(ssp, SIFIVE_SERIAL_RXDATA_OFFS);
+
+ if (!is_empty)
+ WARN_ON(1);
+ else
+ *is_empty = (v & SIFIVE_SERIAL_RXDATA_EMPTY_MASK) >>
+ SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT;
+
+ ch = (v & SIFIVE_SERIAL_RXDATA_DATA_MASK) >>
+ SIFIVE_SERIAL_RXDATA_DATA_SHIFT;
+
+ return ch;
+}
+
+/**
+ * __ssp_receive_chars() - receive multiple bytes from the UART
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Receive up to an RX FIFO's worth of bytes from the SiFive UART referred
+ * to by @ssp and pass them up to the Linux serial layer.
+ *
+ * Context: Expects ssp->port.lock to be held by caller.
+ */
+static void __ssp_receive_chars(struct sifive_serial_port *ssp)
+{
+ unsigned char ch;
+ char is_empty;
+ int c;
+
+ for (c = SIFIVE_RX_FIFO_DEPTH; c > 0; --c) {
+ ch = __ssp_receive_char(ssp, &is_empty);
+ if (is_empty)
+ break;
+
+ ssp->port.icount.rx++;
+ uart_insert_char(&ssp->port, 0, 0, ch, TTY_NORMAL);
+ }
+
+ spin_unlock(&ssp->port.lock);
+ tty_flip_buffer_push(&ssp->port.state->port);
+ spin_lock(&ssp->port.lock);
+}
+
+/**
+ * __ssp_update_div() - calculate the divisor setting by the line rate
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Calculate the appropriate value of the clock divisor for the UART
+ * and target line rate referred to by @ssp and write it into the
+ * hardware.
+ */
+static void __ssp_update_div(struct sifive_serial_port *ssp)
+{
+ u16 div;
+
+ div = DIV_ROUND_UP(ssp->clkin_rate, ssp->baud_rate) - 1;
+
+ __ssp_writel(div, SIFIVE_SERIAL_DIV_OFFS, ssp);
+}
+
+/**
+ * __ssp_update_baud_rate() - set the UART "baud rate"
+ * @ssp: pointer to a struct sifive_serial_port
+ * @rate: new target bit rate
+ *
+ * Calculate the UART divisor value for the target bit rate @rate for the
+ * SiFive UART described by @ssp and program it into the UART. There may
+ * be some error between the target bit rate and the actual bit rate implemented
+ * by the UART due to clock ratio granularity.
+ */
+static void __ssp_update_baud_rate(struct sifive_serial_port *ssp,
+ unsigned int rate)
+{
+ if (ssp->baud_rate == rate)
+ return;
+
+ ssp->baud_rate = rate;
+ __ssp_update_div(ssp);
+}
+
+/**
+ * __ssp_set_stop_bits() - set the number of stop bits
+ * @ssp: pointer to a struct sifive_serial_port
+ * @nstop: 1 or 2 (stop bits)
+ *
+ * Program the SiFive UART referred to by @ssp to use @nstop stop bits.
+ */
+static void __ssp_set_stop_bits(struct sifive_serial_port *ssp, char nstop)
+{
+ u32 v;
+
+ if (nstop < 1 || nstop > 2) {
+ WARN_ON(1);
+ return;
+ }
+
+ v = __ssp_readl(ssp, SIFIVE_SERIAL_TXCTRL_OFFS);
+ v &= ~SIFIVE_SERIAL_TXCTRL_NSTOP_MASK;
+ v |= (nstop - 1) << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT;
+ __ssp_writel(v, SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
+}
+
+/**
+ * __ssp_wait_for_xmitr() - wait for an empty slot on the TX FIFO
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Delay while the UART TX FIFO referred to by @ssp is marked as full.
+ *
+ * Context: Any context.
+ */
+static void __maybe_unused __ssp_wait_for_xmitr(struct sifive_serial_port *ssp)
+{
+ while (sifive_serial_is_txfifo_full(ssp))
+ udelay(1); /* XXX Could probably be more intelligent here */
+}
+
+/*
+ * Linux serial API functions
+ */
+
+static void sifive_serial_stop_tx(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_disable_txwm(ssp);
+}
+
+static void sifive_serial_stop_rx(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_disable_rxwm(ssp);
+}
+
+static void sifive_serial_start_tx(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_enable_txwm(ssp);
+}
+
+static irqreturn_t sifive_serial_irq(int irq, void *dev_id)
+{
+ struct sifive_serial_port *ssp = dev_id;
+ u32 ip;
+
+ spin_lock(&ssp->port.lock);
+
+ ip = __ssp_readl(ssp, SIFIVE_SERIAL_IP_OFFS);
+ if (!ip) {
+ spin_unlock(&ssp->port.lock);
+ return IRQ_NONE;
+ }
+
+ if (ip & SIFIVE_SERIAL_IP_RXWM_MASK)
+ __ssp_receive_chars(ssp);
+ if (ip & SIFIVE_SERIAL_IP_TXWM_MASK)
+ __ssp_transmit_chars(ssp);
+
+ spin_unlock(&ssp->port.lock);
+
+ return IRQ_HANDLED;
+}
+
+static unsigned int sifive_serial_tx_empty(struct uart_port *port)
+{
+ return TIOCSER_TEMT;
+}
+
+static unsigned int sifive_serial_get_mctrl(struct uart_port *port)
+{
+ return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
+}
+
+static void sifive_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+ /* IP block does not support these signals */
+}
+
+static void sifive_serial_break_ctl(struct uart_port *port, int break_state)
+{
+ /* IP block does not support sending a break */
+}
+
+static int sifive_serial_startup(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_enable_rxwm(ssp);
+
+ return 0;
+}
+
+static void sifive_serial_shutdown(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_disable_rxwm(ssp);
+ __ssp_disable_txwm(ssp);
+}
+
+/**
+ * sifive_serial_clk_notifier() - clock post-rate-change notifier
+ * @nb: pointer to the struct notifier_block, from the notifier code
+ * @event: event mask from the notifier code
+ * @data: pointer to the struct clk_notifier_data from the notifier code
+ *
+ * On the V0 SoC, the UART IP block is derived from the CPU clock source
+ * after a synchronous divide-by-two divider, so any CPU clock rate change
+ * requires the UART baud rate to be updated. This presumably could corrupt any
+ * serial word currently being transmitted or received. It would probably
+ * be better to stop receives and transmits, then complete the baud rate
+ * change, then re-enable them.
+ */
+static int sifive_serial_clk_notifier(struct notifier_block *nb,
+ unsigned long event, void *data)
+{
+ struct clk_notifier_data *cnd = data;
+ struct sifive_serial_port *ssp = notifier_to_sifive_serial_port(nb);
+
+ if (event == POST_RATE_CHANGE && ssp->clkin_rate != cnd->new_rate) {
+ ssp->clkin_rate = cnd->new_rate;
+ __ssp_update_div(ssp);
+ }
+
+ return NOTIFY_OK;
+}
+
+static void sifive_serial_set_termios(struct uart_port *port,
+ struct ktermios *termios,
+ struct ktermios *old)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+ unsigned long flags;
+ u32 v, old_v;
+ int rate;
+ char nstop;
+
+ if ((termios->c_cflag & CSIZE) != CS8) {
+ dev_err(ssp->port.dev, "only 8-bit words supported\n");
+ return;
+ }
+
+ /* Set number of stop bits */
+ nstop = (termios->c_cflag & CSTOPB) ? 2 : 1;
+ __ssp_set_stop_bits(ssp, nstop);
+
+ /* Set line rate */
+ rate = uart_get_baud_rate(port, termios, old, 0, ssp->clkin_rate / 16);
+ __ssp_update_baud_rate(ssp, rate);
+
+ spin_lock_irqsave(&ssp->port.lock, flags);
+
+ /*
+ * Update the per-port timeout.
+ */
+ uart_update_timeout(port, termios->c_cflag, rate);
+
+ ssp->port.read_status_mask = 0;
+ if (termios->c_iflag & INPCK) {
+ dev_err(ssp->port.dev, "INPCK flag not supported\n");
+ goto ssst_out;
+ }
+ if (termios->c_iflag & (BRKINT | PARMRK)) {
+ dev_err(ssp->port.dev, "BRKINT/PARMRK flag not supported\n");
+ goto ssst_out;
+ }
+
+ /*
+ * ignore all characters if CREAD is not set
+ */
+ v = __ssp_readl(ssp, SIFIVE_SERIAL_RXCTRL_OFFS);
+ old_v = v;
+ if ((termios->c_cflag & CREAD) == 0)
+ v &= SIFIVE_SERIAL_RXCTRL_RXEN_MASK;
+ else
+ v |= SIFIVE_SERIAL_RXCTRL_RXEN_MASK;
+ if (v != old_v)
+ __ssp_writel(v, SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
+
+ssst_out:
+ spin_unlock_irqrestore(&ssp->port.lock, flags);
+}
+
+static void sifive_serial_release_port(struct uart_port *port)
+{
+}
+
+static int sifive_serial_request_port(struct uart_port *port)
+{
+ return 0;
+}
+
+static void sifive_serial_config_port(struct uart_port *port, int flags)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ ssp->port.type = PORT_SIFIVE_V0;
+}
+
+static int sifive_serial_verify_port(struct uart_port *port,
+ struct serial_struct *ser)
+{
+ return -EINVAL;
+}
+
+static const char *sifive_serial_type(struct uart_port *port)
+{
+ return port->type == PORT_SIFIVE_V0 ? "SiFive UART v0" : NULL;
+}
+
+/*
+ * Early console support
+ */
+
+#ifdef CONFIG_SERIAL_EARLYCON
+static void early_sifive_serial_putc(struct uart_port *port, int c)
+{
+ while (__ssp_early_readl(port, SIFIVE_SERIAL_TXDATA_OFFS) &
+ SIFIVE_SERIAL_TXDATA_FULL_MASK)
+ cpu_relax();
+
+ __ssp_early_writel(c, SIFIVE_SERIAL_TXDATA_OFFS, port);
+}
+
+static void early_sifive_serial_write(struct console *con, const char *s,
+ unsigned int n)
+{
+ struct earlycon_device *dev = con->data;
+ struct uart_port *port = &dev->port;
+
+ uart_console_write(port, s, n, early_sifive_serial_putc);
+}
+
+static int __init early_sifive_serial_setup(struct earlycon_device *dev,
+ const char *options)
+{
+ struct uart_port *port = &dev->port;
+
+ if (!port->membase)
+ return -ENODEV;
+
+ dev->con->write = early_sifive_serial_write;
+
+ return 0;
+}
+
+OF_EARLYCON_DECLARE(sifive, "sifive,uart0", early_sifive_serial_setup);
+OF_EARLYCON_DECLARE(sifive, "sifive,fu540-c000-uart0",
+ early_sifive_serial_setup);
+#endif /* CONFIG_SERIAL_EARLYCON */
+
+/*
+ * Linux console interface
+ */
+
+#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
+
+static struct sifive_serial_port *sifive_serial_console_ports[SIFIVE_SERIAL_MAX_PORTS];
+
+static void sifive_serial_console_putchar(struct uart_port *port, int ch)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_wait_for_xmitr(ssp);
+ __ssp_transmit_char(ssp, ch);
+}
+
+static void sifive_serial_console_write(struct console *co, const char *s,
+ unsigned int count)
+{
+ struct sifive_serial_port *ssp = sifive_serial_console_ports[co->index];
+ unsigned long flags;
+ unsigned int ier;
+ int locked = 1;
+
+ if (!ssp)
+ return;
+
+ local_irq_save(flags);
+ if (ssp->port.sysrq)
+ locked = 0;
+ else if (oops_in_progress)
+ locked = spin_trylock(&ssp->port.lock);
+ else
+ spin_lock(&ssp->port.lock);
+
+ ier = __ssp_readl(ssp, SIFIVE_SERIAL_IE_OFFS);
+ __ssp_writel(0, SIFIVE_SERIAL_IE_OFFS, ssp);
+
+ uart_console_write(&ssp->port, s, count, sifive_serial_console_putchar);
+
+ __ssp_writel(ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+
+ if (locked)
+ spin_unlock(&ssp->port.lock);
+ local_irq_restore(flags);
+}
+
+static int __init sifive_serial_console_setup(struct console *co, char *options)
+{
+ struct sifive_serial_port *ssp;
+ int baud = SIFIVE_DEFAULT_BAUD_RATE;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ if (co->index < 0 || co->index >= SIFIVE_SERIAL_MAX_PORTS)
+ return -ENODEV;
+
+ ssp = sifive_serial_console_ports[co->index];
+ if (!ssp)
+ return -ENODEV;
+
+ if (options)
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+ return uart_set_options(&ssp->port, co, baud, parity, bits, flow);
+}
+
+static struct uart_driver sifive_serial_uart_driver;
+
+static struct console sifive_serial_console = {
+ .name = SIFIVE_TTY_PREFIX,
+ .write = sifive_serial_console_write,
+ .device = uart_console_device,
+ .setup = sifive_serial_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &sifive_serial_uart_driver,
+};
+
+static int __init sifive_console_init(void)
+{
+ register_console(&sifive_serial_console);
+ return 0;
+}
+
+console_initcall(sifive_console_init);
+
+static void __ssp_add_console_port(struct sifive_serial_port *ssp)
+{
+ sifive_serial_console_ports[ssp->port.line] = ssp;
+}
+
+static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
+{
+ sifive_serial_console_ports[ssp->port.line] = 0;
+}
+
+#define SIFIVE_SERIAL_CONSOLE (&sifive_serial_console)
+
+#else
+
+#define SIFIVE_SERIAL_CONSOLE NULL
+
+static inline void __ssp_add_console_port(struct sifive_serial_port *ssp)
+{}
+static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
+{}
+
+#endif
+
+static const struct uart_ops sifive_serial_uops = {
+ .tx_empty = sifive_serial_tx_empty,
+ .set_mctrl = sifive_serial_set_mctrl,
+ .get_mctrl = sifive_serial_get_mctrl,
+ .stop_tx = sifive_serial_stop_tx,
+ .start_tx = sifive_serial_start_tx,
+ .stop_rx = sifive_serial_stop_rx,
+ .break_ctl = sifive_serial_break_ctl,
+ .startup = sifive_serial_startup,
+ .shutdown = sifive_serial_shutdown,
+ .set_termios = sifive_serial_set_termios,
+ .type = sifive_serial_type,
+ .release_port = sifive_serial_release_port,
+ .request_port = sifive_serial_request_port,
+ .config_port = sifive_serial_config_port,
+ .verify_port = sifive_serial_verify_port,
+};
+
+static struct uart_driver sifive_serial_uart_driver = {
+ .owner = THIS_MODULE,
+ .driver_name = SIFIVE_SERIAL_NAME,
+ .dev_name = SIFIVE_TTY_PREFIX,
+ .nr = SIFIVE_SERIAL_MAX_PORTS,
+ .cons = SIFIVE_SERIAL_CONSOLE,
+};
+
+static int sifive_serial_probe(struct platform_device *pdev)
+{
+ struct sifive_serial_port *ssp;
+ struct resource *mem;
+ struct clk *clk;
+ void __iomem *base;
+ int irq, id, r;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "could not acquire interrupt\n");
+ return -EPROBE_DEFER;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(&pdev->dev, mem);
+ if (IS_ERR(base)) {
+ dev_err(&pdev->dev, "could not acquire device memory\n");
+ return PTR_ERR(base);
+ }
+
+ clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "unable to find controller clock\n");
+ return PTR_ERR(clk);
+ }
+
+ id = of_alias_get_id(pdev->dev.of_node, "serial");
+ if (id < 0) {
+ dev_err(&pdev->dev, "missing aliases entry\n");
+ return id;
+ }
+
+#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
+ if (id > SIFIVE_SERIAL_MAX_PORTS) {
+ dev_err(&pdev->dev, "too many UARTs (%d)\n", id);
+ return -EINVAL;
+ }
+#endif
+
+ ssp = devm_kzalloc(&pdev->dev, sizeof(*ssp), GFP_KERNEL);
+ if (!ssp)
+ return -ENOMEM;
+
+ ssp->port.dev = &pdev->dev;
+ ssp->port.type = PORT_SIFIVE_V0;
+ ssp->port.iotype = UPIO_MEM;
+ ssp->port.irq = irq;
+ ssp->port.fifosize = SIFIVE_TX_FIFO_DEPTH;
+ ssp->port.ops = &sifive_serial_uops;
+ ssp->port.line = id;
+ ssp->port.mapbase = mem->start;
+ ssp->port.membase = base;
+ ssp->dev = &pdev->dev;
+ ssp->clk = clk;
+ ssp->clk_notifier.notifier_call = sifive_serial_clk_notifier;
+
+ r = clk_notifier_register(ssp->clk, &ssp->clk_notifier);
+ if (r) {
+ dev_err(&pdev->dev, "could not register clock notifier: %d\n",
+ r);
+ goto probe_out1;
+ }
+
+ /* Set up clock divider */
+ ssp->clkin_rate = clk_get_rate(ssp->clk);
+ ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE;
+ __ssp_update_div(ssp);
+
+ platform_set_drvdata(pdev, ssp);
+
+ /* Enable transmits and set the watermark level to 1 */
+ __ssp_writel((1 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT) |
+ SIFIVE_SERIAL_TXCTRL_TXEN_MASK,
+ SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
+
+ /* Enable receives and set the watermark level to 0 */
+ __ssp_writel((0 << SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT) |
+ SIFIVE_SERIAL_RXCTRL_RXEN_MASK,
+ SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
+
+ r = request_irq(ssp->port.irq, sifive_serial_irq, ssp->port.irqflags,
+ dev_name(&pdev->dev), ssp);
+ if (r) {
+ dev_err(&pdev->dev, "could not attach interrupt: %d\n", r);
+ goto probe_out2;
+ }
+
+ __ssp_add_console_port(ssp);
+
+ r = uart_add_one_port(&sifive_serial_uart_driver, &ssp->port);
+ if (r != 0) {
+ dev_err(&pdev->dev, "could not add uart: %d\n", r);
+ goto probe_out3;
+ }
+
+ return 0;
+
+probe_out3:
+ __ssp_remove_console_port(ssp);
+ free_irq(ssp->port.irq, ssp);
+probe_out2:
+ clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
+probe_out1:
+ return r;
+}
+
+static int sifive_serial_remove(struct platform_device *dev)
+{
+ struct sifive_serial_port *ssp = platform_get_drvdata(dev);
+
+ __ssp_remove_console_port(ssp);
+ uart_remove_one_port(&sifive_serial_uart_driver, &ssp->port);
+ free_irq(ssp->port.irq, ssp);
+ clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
+
+ return 0;
+}
+
+static const struct of_device_id sifive_serial_of_match[] = {
+ { .compatible = "sifive,fu540-c000-uart0" },
+ { .compatible = "sifive,uart0" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sifive_serial_match);
+
+static struct platform_driver sifive_serial_platform_driver = {
+ .probe = sifive_serial_probe,
+ .remove = sifive_serial_remove,
+ .driver = {
+ .name = SIFIVE_SERIAL_NAME,
+ .of_match_table = of_match_ptr(sifive_serial_of_match),
+ },
+};
+
+static int __init sifive_serial_init(void)
+{
+ int r;
+
+ r = uart_register_driver(&sifive_serial_uart_driver);
+ if (r)
+ goto init_out1;
+
+ r = platform_driver_register(&sifive_serial_platform_driver);
+ if (r)
+ goto init_out2;
+
+ return 0;
+
+init_out2:
+ uart_unregister_driver(&sifive_serial_uart_driver);
+init_out1:
+ return r;
+}
+
+static void __exit sifive_serial_exit(void)
+{
+ platform_driver_unregister(&sifive_serial_platform_driver);
+ uart_unregister_driver(&sifive_serial_uart_driver);
+}
+
+module_init(sifive_serial_init);
+module_exit(sifive_serial_exit);
+
+MODULE_DESCRIPTION("SiFive UART serial driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Paul Walmsley <paul@pwsan.com>");
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index dce5f9dae121..569d5172d23c 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -281,4 +281,7 @@
/* MediaTek BTIF */
#define PORT_MTK_BTIF 117
+/* SiFive UART */
+#define PORT_SIFIVE_V0 118
+
#endif /* _UAPILINUX_SERIAL_CORE_H */
--
2.19.1
^ permalink raw reply related
* Re: [PATCH v2 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
From: Rob Herring @ 2018-10-19 20:45 UTC (permalink / raw)
To: Paul Walmsley
Cc: open list:SERIAL DRIVERS, devicetree, linux-riscv,
linux-kernel@vger.kernel.org, Greg Kroah-Hartman, Mark Rutland,
Palmer Dabbelt, Paul Walmsley
In-Reply-To: <20181019184827.12351-2-paul.walmsley@sifive.com>
On Fri, Oct 19, 2018 at 1:48 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
> Add DT binding documentation for the Linux driver for the SiFive
> asynchronous serial IP block. Nothing too exotic.
>
> Cc: linux-serial@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Cc: linux-riscv@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
> .../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
>
> diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
> new file mode 100644
> index 000000000000..8982338512f5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
> @@ -0,0 +1,21 @@
> +SiFive asynchronous serial interface (UART)
> +
> +Required properties:
> +
> +- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0"
I assume once again, the last '0' is a version? As I mentioned for the
intc and now the pwm block bindings, if you are going to do version
numbers please document the versioning scheme. Palmer mentioned the
compatible string is part of the IP block repository? Where does the
number come from? What's the next version? Major vs. minor versions?
ECO fixes? Is the version s/w readable? How do you ensure it gets
updated? All that should be addressed.
Otherwise, don't do version numbers because we have no visibility to
what they mean.
> +- reg: address and length of the register space
> +- interrupt-parent: should contain a phandle pointing to the SoC interrupt
> + controller device node that the UART interrupts are connected to
Don't need to document interrupt-parent here.
> +- interrupts: Should contain the UART interrupt identifier
> +- clocks: Should contain a clock identifier for the UART's parent clock
> +
> +
> +Example:
> +
> +uart0: serial@10010000 {
> + compatible = "sifive,uart0";
> + interrupt-parent = <&plic0>;
> + interrupts = <80>;
> + reg = <0x0 0x10010000 0x0 0x1000>;
> + clocks = <&prci PRCI_CLK_TLCLK>;
> +};
> --
> 2.19.1
>
^ permalink raw reply
* Re: [PATCH v2 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
From: Paul Walmsley @ 2018-10-19 22:05 UTC (permalink / raw)
To: Rob Herring
Cc: open list:SERIAL DRIVERS, devicetree, linux-riscv,
linux-kernel@vger.kernel.org, Greg Kroah-Hartman, Mark Rutland,
Palmer Dabbelt, Paul Walmsley
In-Reply-To: <CAL_JsqJBSqaxnETdJg1Mdp+H2ay+WKT0JaxLe6D4Fwo_99qUkw@mail.gmail.com>
On 10/19/18 1:45 PM, Rob Herring wrote:
> On Fri, Oct 19, 2018 at 1:48 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>> Add DT binding documentation for the Linux driver for the SiFive
>> asynchronous serial IP block. Nothing too exotic.
>>
>> Cc: linux-serial@vger.kernel.org
>> Cc: devicetree@vger.kernel.org
>> Cc: linux-riscv@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
>> Cc: Rob Herring <robh+dt@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: Palmer Dabbelt <palmer@sifive.com>
>> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
>> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
>> Signed-off-by: Paul Walmsley <paul@pwsan.com>
>> ---
>> .../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++
>> 1 file changed, 21 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
>>
>> diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
>> new file mode 100644
>> index 000000000000..8982338512f5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
>> @@ -0,0 +1,21 @@
>> +SiFive asynchronous serial interface (UART)
>> +
>> +Required properties:
>> +
>> +- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0"
> I assume once again, the last '0' is a version?
Yes.
> Palmer mentioned the
> compatible string is part of the IP block repository?
It is, but there's no guarantee that the compatible string from the RTL
will make it into a ROM for any given chip. For example, a customer may
want the UART, but not want to take the DT ROM to keep area down.
This is one of the reasons why we'll likely switch to the usual
software-maintained DTS files for Linux, just like the rest of arch/arm,
arch/powerpc, etc.
> As I mentioned for the
> intc and now the pwm block bindings, if you are going to do version
> numbers please document the versioning scheme.
Will add that to the binding document.
> Where does the
> number come from?
It comes from the RTL, which is public:
https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/uart/UART.scala#L43
> What's the next version?
1 (or something larger)
> Major vs. minor versions?
Not currently for this IP block.
> ECO fixes?
ECOs for a specific chip? If so, whether an integrator changes the
version number in a ROM (if present) is up to whomever does the ECO.
That may not be SiFive.
Suppose that someone ECOs a SiFive UART in a way that incompatibly
changes the programming model. They can choose to submit corresponding
RTL changes back upstream to the sifive-blocks repository, or not.
If they don't, and they want upstream Linux support, it's up to the
integrator to define a "foobar,foochip-uart" in their chip DT file, and
post it upstream to the kernel lists, along with the corresponding
driver patches.
If however, they do get their changes accepted into the sifive-blocks
public RTL repository, then the maintainer of sifive-blocks is
responsible for ensuring that the compatible string in the RTL is
changed in an appropriate way.
> Is the version s/w readable?
Not in the UART IP block itself. In the specific case of the FU540
chip, there's a string in a ROM.
> How do you ensure it gets
> updated?
The string in the ROM? For an IP block like the UART, it's up to the
engineer patching the UART RTL to update the compatible string when the
programming model changes, and the sifive-blocks maintainer to enforce it.
For a given chip, it's up to the integrator/end user whether they want
to include the DT ROM or not, and if it's present, it's up to them what
it contains.
> All that should be addressed.
>
> Otherwise, don't do version numbers because we have no visibility to
> what they mean.
It's all in the public RTL:
https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/uart/UART.scala#L43
>> +- reg: address and length of the register space
>> +- interrupt-parent: should contain a phandle pointing to the SoC interrupt
>> + controller device node that the UART interrupts are connected to
> Don't need to document interrupt-parent here.
OK, will drop it.
- Paul
^ permalink raw reply
* Re: [PATCH v2 2/2] tty: serial: add driver for the SiFive UART
From: kbuild test robot @ 2018-10-20 2:47 UTC (permalink / raw)
Cc: Paul Walmsley, Wesley Terpstra, Greg Kroah-Hartman,
Palmer Dabbelt, linux-kernel, Paul Walmsley, Julia Lawall,
kbuild-all, linux-serial, Jiri Slaby, linux-riscv
In-Reply-To: <20181019184827.12351-3-paul.walmsley@sifive.com>
[-- Attachment #1: Type: text/plain, Size: 3035 bytes --]
Hi Paul,
I love your patch! Yet something to improve:
[auto build test ERROR on tty/tty-testing]
[also build test ERROR on v4.19-rc8 next-20181019]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Paul-Walmsley/tty-serial-add-DT-bindings-and-serial-driver-for-the-SiFive-FU540-UART/20181020-071123
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-testing
config: mips-allmodconfig (attached as .config)
compiler: mips-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=mips
All errors (new ones prefixed by >>):
In file included from drivers/tty/serial/sifive.c:47:0:
>> drivers/tty/serial/sifive.c:1025:25: error: 'sifive_serial_match' undeclared here (not in a function); did you mean 'sifive_serial_of_match'?
MODULE_DEVICE_TABLE(of, sifive_serial_match);
^
include/linux/module.h:213:15: note: in definition of macro 'MODULE_DEVICE_TABLE'
extern typeof(name) __mod_##type##__##name##_device_table \
^~~~
>> include/linux/module.h:213:21: error: '__mod_of__sifive_serial_match_device_table' aliased to undefined symbol 'sifive_serial_match'
extern typeof(name) __mod_##type##__##name##_device_table \
^
drivers/tty/serial/sifive.c:1025:1: note: in expansion of macro 'MODULE_DEVICE_TABLE'
MODULE_DEVICE_TABLE(of, sifive_serial_match);
^~~~~~~~~~~~~~~~~~~
--
In file included from drivers/tty//serial/sifive.c:47:0:
drivers/tty//serial/sifive.c:1025:25: error: 'sifive_serial_match' undeclared here (not in a function); did you mean 'sifive_serial_of_match'?
MODULE_DEVICE_TABLE(of, sifive_serial_match);
^
include/linux/module.h:213:15: note: in definition of macro 'MODULE_DEVICE_TABLE'
extern typeof(name) __mod_##type##__##name##_device_table \
^~~~
>> include/linux/module.h:213:21: error: '__mod_of__sifive_serial_match_device_table' aliased to undefined symbol 'sifive_serial_match'
extern typeof(name) __mod_##type##__##name##_device_table \
^
drivers/tty//serial/sifive.c:1025:1: note: in expansion of macro 'MODULE_DEVICE_TABLE'
MODULE_DEVICE_TABLE(of, sifive_serial_match);
^~~~~~~~~~~~~~~~~~~
vim +1025 drivers/tty/serial/sifive.c
1019
1020 static const struct of_device_id sifive_serial_of_match[] = {
1021 { .compatible = "sifive,fu540-c000-uart0" },
1022 { .compatible = "sifive,uart0" },
1023 {},
1024 };
> 1025 MODULE_DEVICE_TABLE(of, sifive_serial_match);
1026
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 57462 bytes --]
[-- Attachment #3: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply
* [PATCH v3 0/2] tty: serial: add DT bindings and serial driver for the SiFive FU540 UART
From: Paul Walmsley @ 2018-10-20 10:10 UTC (permalink / raw)
To: linux-serial
Cc: Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby, Palmer Dabbelt,
Wesley Terpstra, linux-riscv, linux-kernel, devicetree
This series adds a serial driver, with console support, for the
UART IP block present on the SiFive FU540 SoC. The programming
model is straightforward, but unique.
Boot-tested on a SiFive FU540 HiFive-U board (with appropriate patches
to the DT data).
The patches in this series can also be found at:
https://github.com/sifive/riscv-linux/tree/dev/paulw/serial-v4.19-rc7
This third version updates the DT binding documentation per discussion
with Rob Herring and fixes one additional issue identified by the 0-day
build system related to MODULE_DEVICE_TABLE.
Paul Walmsley (2):
dt-bindings: serial: add documentation for the SiFive UART driver
tty: serial: add driver for the SiFive UART
.../bindings/serial/sifive-serial.txt | 33 +
drivers/tty/serial/Kconfig | 24 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/sifive.c | 1067 +++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
5 files changed, 1128 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
create mode 100644 drivers/tty/serial/sifive.c
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Wesley Terpstra <wesley@sifive.com>
Cc: linux-serial@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
--
2.19.1
^ permalink raw reply
* [PATCH v3 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
From: Paul Walmsley @ 2018-10-20 10:10 UTC (permalink / raw)
To: linux-serial
Cc: Paul Walmsley, devicetree, linux-riscv, linux-kernel,
Greg Kroah-Hartman, Rob Herring, Mark Rutland, Palmer Dabbelt,
Paul Walmsley
In-Reply-To: <20181020101045.15991-1-paul.walmsley@sifive.com>
Add DT binding documentation for the Linux driver for the SiFive
asynchronous serial IP block.
Cc: linux-serial@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
v3: update description and example for compatible strings, per
discussion with Rob Herring.
.../bindings/serial/sifive-serial.txt | 33 +++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
new file mode 100644
index 000000000000..a426b18ba049
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
@@ -0,0 +1,33 @@
+SiFive asynchronous serial interface (UART)
+
+Required properties:
+
+- compatible: should be something similar to
+ "sifive,<chip>-uart<version>" for the UART as integrated
+ on a particular chip, and "sifive,uart<version>" for the
+ general UART IP block programming model. Supported
+ compatible strings as of the date of this writing are:
+ "sifive,fu540-c000-uart0" for the SiFive UART v0 as
+ integrated onto the SiFive FU540 chip, or "sifive,uart0"
+ for the SiFive UART v0 IP block with no chip integration
+ tweaks (if any)
+- reg: address and length of the register space
+- interrupts: Should contain the UART interrupt identifier
+- clocks: Should contain a clock identifier for the UART's parent clock
+
+
+UART RTL that corresponds to the IP block version numbers can be found
+here:
+
+https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart
+
+
+Example:
+
+uart0: serial@10010000 {
+ compatible = "sifive,fu540-c000-uart0", "sifive,uart0";
+ interrupt-parent = <&plic0>;
+ interrupts = <80>;
+ reg = <0x0 0x10010000 0x0 0x1000>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+};
--
2.19.1
^ permalink raw reply related
* [PATCH v3 2/2] tty: serial: add driver for the SiFive UART
From: Paul Walmsley @ 2018-10-20 10:10 UTC (permalink / raw)
To: linux-serial
Cc: Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby, Palmer Dabbelt,
Wesley Terpstra, linux-riscv, linux-kernel, Julia Lawall,
Paul Walmsley
In-Reply-To: <20181020101045.15991-1-paul.walmsley@sifive.com>
Add a serial driver for the SiFive UART, found on SiFive FU540 devices
(among others).
The underlying serial IP block is relatively basic, and currently does
not support serial break detection. Further information on the IP
block can be found in the documentation and Chisel sources:
https://static.dev.sifive.com/FU540-C000-v1.0.pdf
https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart
This driver was written in collaboration with Wesley Terpstra
<wesley@sifive.com>.
Boot-tested on a SiFive HiFive Unleashed A00 board.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Wesley Terpstra <wesley@sifive.com>
Cc: linux-serial@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
v3: fix MODULE_DEVICE_TABLE argument
v2: remove leftover junk related to CONFIG_CONSOLE_POLL; add missing
spin_unlock() in ISR found by 0-day and Julia Lawall
drivers/tty/serial/Kconfig | 24 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/sifive.c | 1067 ++++++++++++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
4 files changed, 1095 insertions(+)
create mode 100644 drivers/tty/serial/sifive.c
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index df8bd0c7b97d..fdd624df75c8 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1060,6 +1060,30 @@ config SERIAL_OMAP_CONSOLE
your boot loader about how to pass options to the kernel at
boot time.)
+config SERIAL_SIFIVE
+ tristate "SiFive UART support"
+ depends on OF
+ select SERIAL_CORE
+ help
+ Select this option if you are building a kernel for a device that
+ contains a SiFive UART IP block. This type of UART is present on
+ SiFive FU540 SoCs, among others.
+
+config SERIAL_SIFIVE_CONSOLE
+ bool "Console on SiFive UART"
+ depends on SERIAL_SIFIVE=y
+ select SERIAL_CORE_CONSOLE
+ help
+ Select this option if you would like to use a SiFive UART as the
+ system console.
+
+ Even if you say Y here, the currently visible virtual console
+ (/dev/tty0) will still be used as the system console by default, but
+ you can alter that using a kernel command line option such as
+ "console=ttySIFx". (Try "man bootparam" or see the documentation of
+ your boot loader about how to pass options to the kernel at
+ boot time.)
+
config SERIAL_LANTIQ
bool "Lantiq serial driver"
depends on LANTIQ
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index daac675612df..7e906d3c0455 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
obj-$(CONFIG_SERIAL_PIC32) += pic32_uart.o
obj-$(CONFIG_SERIAL_MPS2_UART) += mps2-uart.o
obj-$(CONFIG_SERIAL_OWL) += owl-uart.o
+obj-$(CONFIG_SERIAL_SIFIVE) += sifive.o
# GPIOLIB helpers for modem control lines
obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c
new file mode 100644
index 000000000000..80c06039fb57
--- /dev/null
+++ b/drivers/tty/serial/sifive.c
@@ -0,0 +1,1067 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SiFive UART driver
+ * Copyright (C) 2018 Paul Walmsley <paul@pwsan.com>
+ * Copyright (C) 2018 SiFive
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Based partially on:
+ * - drivers/tty/serial/pxa.c
+ * - drivers/tty/serial/amba-pl011.c
+ * - drivers/tty/serial/uartlite.c
+ * - drivers/tty/serial/omap-serial.c
+ * - drivers/pwm/pwm-sifive.c
+ *
+ * See the following sources for further documentation:
+ * - Chapter 19 "Universal Asynchronous Receiver/Transmitter (UART)" of
+ * SiFive FE310-G000 v2p3
+ * - The tree/master/src/main/scala/devices/uart directory of
+ * https://github.com/sifive/sifive-blocks/
+ *
+ * The SiFive UART design is not 8250-compatible. The following common
+ * features are not supported:
+ * - Word lengths other than 8 bits
+ * - Break handling
+ * - Parity
+ * - Flow control
+ * - Modem signals (DSR, RI, etc.)
+ * On the other hand, the design is free from the baggage of the 8250
+ * programming model.
+ */
+
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+
+/*
+ * Register offsets
+ */
+
+/* TXDATA */
+#define SIFIVE_SERIAL_TXDATA_OFFS 0x0
+#define SIFIVE_SERIAL_TXDATA_FULL_SHIFT 31
+#define SIFIVE_SERIAL_TXDATA_FULL_MASK (1 << SIFIVE_SERIAL_TXDATA_FULL_SHIFT)
+#define SIFIVE_SERIAL_TXDATA_DATA_SHIFT 0
+#define SIFIVE_SERIAL_TXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_TXDATA_DATA_SHIFT)
+
+/* RXDATA */
+#define SIFIVE_SERIAL_RXDATA_OFFS 0x4
+#define SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT 31
+#define SIFIVE_SERIAL_RXDATA_EMPTY_MASK (1 << SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT)
+#define SIFIVE_SERIAL_RXDATA_DATA_SHIFT 0
+#define SIFIVE_SERIAL_RXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_RXDATA_DATA_SHIFT)
+
+/* TXCTRL */
+#define SIFIVE_SERIAL_TXCTRL_OFFS 0x8
+#define SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT 16
+#define SIFIVE_SERIAL_TXCTRL_TXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
+#define SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT 1
+#define SIFIVE_SERIAL_TXCTRL_NSTOP_MASK (1 << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT)
+#define SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT 0
+#define SIFIVE_SERIAL_TXCTRL_TXEN_MASK (1 << SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT)
+
+/* RXCTRL */
+#define SIFIVE_SERIAL_RXCTRL_OFFS 0xC
+#define SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT 16
+#define SIFIVE_SERIAL_RXCTRL_RXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
+#define SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT 0
+#define SIFIVE_SERIAL_RXCTRL_RXEN_MASK (1 << SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT)
+
+/* IE */
+#define SIFIVE_SERIAL_IE_OFFS 0x10
+#define SIFIVE_SERIAL_IE_RXWM_SHIFT 1
+#define SIFIVE_SERIAL_IE_RXWM_MASK (1 << SIFIVE_SERIAL_IE_RXWM_SHIFT)
+#define SIFIVE_SERIAL_IE_TXWM_SHIFT 0
+#define SIFIVE_SERIAL_IE_TXWM_MASK (1 << SIFIVE_SERIAL_IE_TXWM_SHIFT)
+
+/* IP */
+#define SIFIVE_SERIAL_IP_OFFS 0x14
+#define SIFIVE_SERIAL_IP_RXWM_SHIFT 1
+#define SIFIVE_SERIAL_IP_RXWM_MASK (1 << SIFIVE_SERIAL_IP_RXWM_SHIFT)
+#define SIFIVE_SERIAL_IP_TXWM_SHIFT 0
+#define SIFIVE_SERIAL_IP_TXWM_MASK (1 << SIFIVE_SERIAL_IP_TXWM_SHIFT)
+
+/* DIV */
+#define SIFIVE_SERIAL_DIV_OFFS 0x18
+#define SIFIVE_SERIAL_DIV_DIV_SHIFT 0
+#define SIFIVE_SERIAL_DIV_DIV_MASK (0xffff << SIFIVE_SERIAL_IP_DIV_SHIFT)
+
+/*
+ * Config macros
+ */
+
+/*
+ * SIFIVE_SERIAL_MAX_PORTS: maximum number of UARTs on a device that can
+ * host a serial console
+ */
+#define SIFIVE_SERIAL_MAX_PORTS 8
+
+/*
+ * SIFIVE_DEFAULT_BAUD_RATE: default baud rate that the driver should
+ * configure itself to use
+ */
+#define SIFIVE_DEFAULT_BAUD_RATE 115200
+
+/* SIFIVE_SERIAL_NAME: our driver's name that we pass to the operating system */
+#define SIFIVE_SERIAL_NAME "sifive-serial"
+
+/* SIFIVE_TTY_PREFIX: tty name prefix for SiFive serial ports */
+#define SIFIVE_TTY_PREFIX "ttySIF"
+
+/* SIFIVE_TX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */
+#define SIFIVE_TX_FIFO_DEPTH 8
+
+/* SIFIVE_RX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */
+#define SIFIVE_RX_FIFO_DEPTH 8
+
+#if (SIFIVE_TX_FIFO_DEPTH != SIFIVE_RX_FIFO_DEPTH)
+#error Driver does not support configurations with different TX, RX FIFO sizes
+#endif
+
+/*
+ *
+ */
+
+/**
+ * sifive_serial_port - driver-specific data extension to struct uart_port
+ * @port: struct uart_port embedded in this struct
+ * @dev: struct device *
+ * @ier: shadowed copy of the interrupt enable register
+ * @clkin_rate: input clock to the UART IP block.
+ * @baud_rate: UART serial line rate (e.g., 115200 baud)
+ * @clk_notifier: clock rate change notifier for upstream clock changes
+ *
+ * Configuration data specific to this SiFive UART.
+ */
+struct sifive_serial_port {
+ struct uart_port port;
+ struct device *dev;
+ unsigned char ier;
+ unsigned long clkin_rate;
+ unsigned long baud_rate;
+ struct clk *clk;
+ struct notifier_block clk_notifier;
+};
+
+/*
+ * Structure container-of macros
+ */
+
+#define port_to_sifive_serial_port(p) (container_of((p), \
+ struct sifive_serial_port, \
+ port))
+
+#define notifier_to_sifive_serial_port(nb) (container_of((nb), \
+ struct sifive_serial_port, \
+ clk_notifier))
+
+/*
+ * Forward declarations
+ */
+static void sifive_serial_stop_tx(struct uart_port *port);
+
+/*
+ * Internal functions
+ */
+
+/**
+ * __ssp_early_writel() - write to a SiFive serial port register (early)
+ * @port: pointer to a struct uart_port record
+ * @offs: register address offset from the IP block base address
+ * @v: value to write to the register
+ *
+ * Given a pointer @port to a struct uart_port record, write the value
+ * @v to the IP block register address offset @offs. This function is
+ * intended for early console use.
+ *
+ * Context: Intended to be used only by the earlyconsole code.
+ */
+static void __ssp_early_writel(u32 v, u16 offs, struct uart_port *port)
+{
+ writel_relaxed(v, port->membase + offs);
+}
+
+/**
+ * __ssp_early_readl() - read from a SiFive serial port register (early)
+ * @port: pointer to a struct uart_port record
+ * @offs: register address offset from the IP block base address
+ *
+ * Given a pointer @port to a struct uart_port record, read the
+ * contents of the IP block register located at offset @offs from the
+ * IP block base and return it. This function is intended for early
+ * console use.
+ *
+ * Context: Intended to be called only by the earlyconsole code or by
+ * __ssp_readl() or __ssp_writel() (in this driver)
+ *
+ * Returns: the register value read from the UART.
+ */
+static u32 __ssp_early_readl(struct uart_port *port, u16 offs)
+{
+ return readl_relaxed(port->membase + offs);
+}
+
+/**
+ * __ssp_writel() - write to a SiFive serial port register
+ * @v: value to write to the register
+ * @offs: register address offset from the IP block base address
+ * @ssp: pointer to a struct sifive_serial_port record
+ *
+ * Write the value @v to the IP block register located at offset @offs from the
+ * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
+ *
+ * Context: Any context.
+ */
+static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp)
+{
+ __ssp_early_writel(v, offs, &ssp->port);
+}
+
+/**
+ * __ssp_readl() - read from a SiFive serial port register
+ * @ssp: pointer to a struct sifive_serial_port record
+ * @offs: register address offset from the IP block base address
+ *
+ * Read the contents of the IP block register located at offset @offs from the
+ * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
+ *
+ * Context: Any context.
+ *
+ * Returns: the value of the UART register
+ */
+static u32 __ssp_readl(struct sifive_serial_port *ssp, u16 offs)
+{
+ return __ssp_early_readl(&ssp->port, offs);
+}
+
+/**
+ * sifive_serial_is_txfifo_full() - is the TXFIFO full?
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Read the transmit FIFO "full" bit, returning a non-zero value if the
+ * TX FIFO is full, or zero if space remains. Intended to be used to prevent
+ * writes to the TX FIFO when it's full.
+ *
+ * Returns: SIFIVE_SERIAL_TXDATA_FULL_MASK (non-zero) if the transmit FIFO
+ * is full, or 0 if space remains.
+ */
+static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp)
+{
+ return __ssp_readl(ssp, SIFIVE_SERIAL_TXDATA_OFFS) &
+ SIFIVE_SERIAL_TXDATA_FULL_MASK;
+}
+
+/**
+ * __ssp_transmit_char() - enqueue a byte to transmit onto the TX FIFO
+ * @ssp: pointer to a struct sifive_serial_port
+ * @ch: character to transmit
+ *
+ * Enqueue a byte @ch onto the transmit FIFO, given a pointer @ssp to the
+ * struct sifive_serial_port * to transmit on. Caller should first check to
+ * ensure that the TXFIFO has space; see sifive_serial_is_txfifo_full().
+ *
+ * Context: Any context.
+ */
+static void __ssp_transmit_char(struct sifive_serial_port *ssp, int ch)
+{
+ __ssp_writel(ch, SIFIVE_SERIAL_TXDATA_OFFS, ssp);
+}
+
+/**
+ * __ssp_transmit_chars() - enqueue multiple bytes onto the TX FIFO
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Transfer up to a TX FIFO size's worth of characters from the Linux serial
+ * transmit buffer to the SiFive UART TX FIFO.
+ *
+ * Context: Any context. Expects @ssp->port.lock to be held by caller.
+ */
+static void __ssp_transmit_chars(struct sifive_serial_port *ssp)
+{
+ struct circ_buf *xmit = &ssp->port.state->xmit;
+ int count;
+
+ if (ssp->port.x_char) {
+ __ssp_transmit_char(ssp, ssp->port.x_char);
+ ssp->port.icount.tx++;
+ ssp->port.x_char = 0;
+ return;
+ }
+ if (uart_circ_empty(xmit) || uart_tx_stopped(&ssp->port)) {
+ sifive_serial_stop_tx(&ssp->port);
+ return;
+ }
+ count = SIFIVE_TX_FIFO_DEPTH;
+ do {
+ __ssp_transmit_char(ssp, xmit->buf[xmit->tail]);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ ssp->port.icount.tx++;
+ if (uart_circ_empty(xmit))
+ break;
+ } while (--count > 0);
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(&ssp->port);
+
+ if (uart_circ_empty(xmit))
+ sifive_serial_stop_tx(&ssp->port);
+}
+
+/**
+ * __ssp_enable_txwm() - enable transmit watermark interrupts
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Enable interrupt generation when the transmit FIFO watermark is reached
+ * on the SiFive UART referred to by @ssp.
+ */
+static void __ssp_enable_txwm(struct sifive_serial_port *ssp)
+{
+ if (ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK)
+ return;
+
+ ssp->ier |= SIFIVE_SERIAL_IE_TXWM_MASK;
+ __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+}
+
+/**
+ * __ssp_enable_rxwm() - enable receive watermark interrupts
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Enable interrupt generation when the receive FIFO watermark is reached
+ * on the SiFive UART referred to by @ssp.
+ */
+static void __ssp_enable_rxwm(struct sifive_serial_port *ssp)
+{
+ if (ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK)
+ return;
+
+ ssp->ier |= SIFIVE_SERIAL_IE_RXWM_MASK;
+ __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+}
+
+/**
+ * __ssp_disable_txwm() - disable transmit watermark interrupts
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Disable interrupt generation when the transmit FIFO watermark is reached
+ * on the UART referred to by @ssp.
+ */
+static void __ssp_disable_txwm(struct sifive_serial_port *ssp)
+{
+ if (!(ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK))
+ return;
+
+ ssp->ier &= ~SIFIVE_SERIAL_IE_TXWM_MASK;
+ __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+}
+
+/**
+ * __ssp_disable_rxwm() - disable receive watermark interrupts
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Disable interrupt generation when the receive FIFO watermark is reached
+ * on the UART referred to by @ssp.
+ */
+static void __ssp_disable_rxwm(struct sifive_serial_port *ssp)
+{
+ if (!(ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK))
+ return;
+
+ ssp->ier &= ~SIFIVE_SERIAL_IE_RXWM_MASK;
+ __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+}
+
+/**
+ * __ssp_receive_char() - receive a byte from the UART
+ * @ssp: pointer to a struct sifive_serial_port
+ * @is_empty: char pointer to return whether the RX FIFO is empty
+ *
+ * Try to read a byte from the SiFive UART RX FIFO, referenced by
+ * @ssp, and to return it. Also returns the RX FIFO empty bit in
+ * the char pointed to by @ch. The caller must pass the byte back to the
+ * Linux serial layer if needed.
+ *
+ * Returns: the byte read from the UART RX FIFO.
+ */
+static char __ssp_receive_char(struct sifive_serial_port *ssp, char *is_empty)
+{
+ u32 v;
+ u8 ch;
+
+ v = __ssp_readl(ssp, SIFIVE_SERIAL_RXDATA_OFFS);
+
+ if (!is_empty)
+ WARN_ON(1);
+ else
+ *is_empty = (v & SIFIVE_SERIAL_RXDATA_EMPTY_MASK) >>
+ SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT;
+
+ ch = (v & SIFIVE_SERIAL_RXDATA_DATA_MASK) >>
+ SIFIVE_SERIAL_RXDATA_DATA_SHIFT;
+
+ return ch;
+}
+
+/**
+ * __ssp_receive_chars() - receive multiple bytes from the UART
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Receive up to an RX FIFO's worth of bytes from the SiFive UART referred
+ * to by @ssp and pass them up to the Linux serial layer.
+ *
+ * Context: Expects ssp->port.lock to be held by caller.
+ */
+static void __ssp_receive_chars(struct sifive_serial_port *ssp)
+{
+ unsigned char ch;
+ char is_empty;
+ int c;
+
+ for (c = SIFIVE_RX_FIFO_DEPTH; c > 0; --c) {
+ ch = __ssp_receive_char(ssp, &is_empty);
+ if (is_empty)
+ break;
+
+ ssp->port.icount.rx++;
+ uart_insert_char(&ssp->port, 0, 0, ch, TTY_NORMAL);
+ }
+
+ spin_unlock(&ssp->port.lock);
+ tty_flip_buffer_push(&ssp->port.state->port);
+ spin_lock(&ssp->port.lock);
+}
+
+/**
+ * __ssp_update_div() - calculate the divisor setting by the line rate
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Calculate the appropriate value of the clock divisor for the UART
+ * and target line rate referred to by @ssp and write it into the
+ * hardware.
+ */
+static void __ssp_update_div(struct sifive_serial_port *ssp)
+{
+ u16 div;
+
+ div = DIV_ROUND_UP(ssp->clkin_rate, ssp->baud_rate) - 1;
+
+ __ssp_writel(div, SIFIVE_SERIAL_DIV_OFFS, ssp);
+}
+
+/**
+ * __ssp_update_baud_rate() - set the UART "baud rate"
+ * @ssp: pointer to a struct sifive_serial_port
+ * @rate: new target bit rate
+ *
+ * Calculate the UART divisor value for the target bit rate @rate for the
+ * SiFive UART described by @ssp and program it into the UART. There may
+ * be some error between the target bit rate and the actual bit rate implemented
+ * by the UART due to clock ratio granularity.
+ */
+static void __ssp_update_baud_rate(struct sifive_serial_port *ssp,
+ unsigned int rate)
+{
+ if (ssp->baud_rate == rate)
+ return;
+
+ ssp->baud_rate = rate;
+ __ssp_update_div(ssp);
+}
+
+/**
+ * __ssp_set_stop_bits() - set the number of stop bits
+ * @ssp: pointer to a struct sifive_serial_port
+ * @nstop: 1 or 2 (stop bits)
+ *
+ * Program the SiFive UART referred to by @ssp to use @nstop stop bits.
+ */
+static void __ssp_set_stop_bits(struct sifive_serial_port *ssp, char nstop)
+{
+ u32 v;
+
+ if (nstop < 1 || nstop > 2) {
+ WARN_ON(1);
+ return;
+ }
+
+ v = __ssp_readl(ssp, SIFIVE_SERIAL_TXCTRL_OFFS);
+ v &= ~SIFIVE_SERIAL_TXCTRL_NSTOP_MASK;
+ v |= (nstop - 1) << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT;
+ __ssp_writel(v, SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
+}
+
+/**
+ * __ssp_wait_for_xmitr() - wait for an empty slot on the TX FIFO
+ * @ssp: pointer to a struct sifive_serial_port
+ *
+ * Delay while the UART TX FIFO referred to by @ssp is marked as full.
+ *
+ * Context: Any context.
+ */
+static void __maybe_unused __ssp_wait_for_xmitr(struct sifive_serial_port *ssp)
+{
+ while (sifive_serial_is_txfifo_full(ssp))
+ udelay(1); /* XXX Could probably be more intelligent here */
+}
+
+/*
+ * Linux serial API functions
+ */
+
+static void sifive_serial_stop_tx(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_disable_txwm(ssp);
+}
+
+static void sifive_serial_stop_rx(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_disable_rxwm(ssp);
+}
+
+static void sifive_serial_start_tx(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_enable_txwm(ssp);
+}
+
+static irqreturn_t sifive_serial_irq(int irq, void *dev_id)
+{
+ struct sifive_serial_port *ssp = dev_id;
+ u32 ip;
+
+ spin_lock(&ssp->port.lock);
+
+ ip = __ssp_readl(ssp, SIFIVE_SERIAL_IP_OFFS);
+ if (!ip) {
+ spin_unlock(&ssp->port.lock);
+ return IRQ_NONE;
+ }
+
+ if (ip & SIFIVE_SERIAL_IP_RXWM_MASK)
+ __ssp_receive_chars(ssp);
+ if (ip & SIFIVE_SERIAL_IP_TXWM_MASK)
+ __ssp_transmit_chars(ssp);
+
+ spin_unlock(&ssp->port.lock);
+
+ return IRQ_HANDLED;
+}
+
+static unsigned int sifive_serial_tx_empty(struct uart_port *port)
+{
+ return TIOCSER_TEMT;
+}
+
+static unsigned int sifive_serial_get_mctrl(struct uart_port *port)
+{
+ return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
+}
+
+static void sifive_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+ /* IP block does not support these signals */
+}
+
+static void sifive_serial_break_ctl(struct uart_port *port, int break_state)
+{
+ /* IP block does not support sending a break */
+}
+
+static int sifive_serial_startup(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_enable_rxwm(ssp);
+
+ return 0;
+}
+
+static void sifive_serial_shutdown(struct uart_port *port)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_disable_rxwm(ssp);
+ __ssp_disable_txwm(ssp);
+}
+
+/**
+ * sifive_serial_clk_notifier() - clock post-rate-change notifier
+ * @nb: pointer to the struct notifier_block, from the notifier code
+ * @event: event mask from the notifier code
+ * @data: pointer to the struct clk_notifier_data from the notifier code
+ *
+ * On the V0 SoC, the UART IP block is derived from the CPU clock source
+ * after a synchronous divide-by-two divider, so any CPU clock rate change
+ * requires the UART baud rate to be updated. This presumably could corrupt any
+ * serial word currently being transmitted or received. It would probably
+ * be better to stop receives and transmits, then complete the baud rate
+ * change, then re-enable them.
+ */
+static int sifive_serial_clk_notifier(struct notifier_block *nb,
+ unsigned long event, void *data)
+{
+ struct clk_notifier_data *cnd = data;
+ struct sifive_serial_port *ssp = notifier_to_sifive_serial_port(nb);
+
+ if (event == POST_RATE_CHANGE && ssp->clkin_rate != cnd->new_rate) {
+ ssp->clkin_rate = cnd->new_rate;
+ __ssp_update_div(ssp);
+ }
+
+ return NOTIFY_OK;
+}
+
+static void sifive_serial_set_termios(struct uart_port *port,
+ struct ktermios *termios,
+ struct ktermios *old)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+ unsigned long flags;
+ u32 v, old_v;
+ int rate;
+ char nstop;
+
+ if ((termios->c_cflag & CSIZE) != CS8) {
+ dev_err(ssp->port.dev, "only 8-bit words supported\n");
+ return;
+ }
+
+ /* Set number of stop bits */
+ nstop = (termios->c_cflag & CSTOPB) ? 2 : 1;
+ __ssp_set_stop_bits(ssp, nstop);
+
+ /* Set line rate */
+ rate = uart_get_baud_rate(port, termios, old, 0, ssp->clkin_rate / 16);
+ __ssp_update_baud_rate(ssp, rate);
+
+ spin_lock_irqsave(&ssp->port.lock, flags);
+
+ /*
+ * Update the per-port timeout.
+ */
+ uart_update_timeout(port, termios->c_cflag, rate);
+
+ ssp->port.read_status_mask = 0;
+ if (termios->c_iflag & INPCK) {
+ dev_err(ssp->port.dev, "INPCK flag not supported\n");
+ goto ssst_out;
+ }
+ if (termios->c_iflag & (BRKINT | PARMRK)) {
+ dev_err(ssp->port.dev, "BRKINT/PARMRK flag not supported\n");
+ goto ssst_out;
+ }
+
+ /*
+ * ignore all characters if CREAD is not set
+ */
+ v = __ssp_readl(ssp, SIFIVE_SERIAL_RXCTRL_OFFS);
+ old_v = v;
+ if ((termios->c_cflag & CREAD) == 0)
+ v &= SIFIVE_SERIAL_RXCTRL_RXEN_MASK;
+ else
+ v |= SIFIVE_SERIAL_RXCTRL_RXEN_MASK;
+ if (v != old_v)
+ __ssp_writel(v, SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
+
+ssst_out:
+ spin_unlock_irqrestore(&ssp->port.lock, flags);
+}
+
+static void sifive_serial_release_port(struct uart_port *port)
+{
+}
+
+static int sifive_serial_request_port(struct uart_port *port)
+{
+ return 0;
+}
+
+static void sifive_serial_config_port(struct uart_port *port, int flags)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ ssp->port.type = PORT_SIFIVE_V0;
+}
+
+static int sifive_serial_verify_port(struct uart_port *port,
+ struct serial_struct *ser)
+{
+ return -EINVAL;
+}
+
+static const char *sifive_serial_type(struct uart_port *port)
+{
+ return port->type == PORT_SIFIVE_V0 ? "SiFive UART v0" : NULL;
+}
+
+/*
+ * Early console support
+ */
+
+#ifdef CONFIG_SERIAL_EARLYCON
+static void early_sifive_serial_putc(struct uart_port *port, int c)
+{
+ while (__ssp_early_readl(port, SIFIVE_SERIAL_TXDATA_OFFS) &
+ SIFIVE_SERIAL_TXDATA_FULL_MASK)
+ cpu_relax();
+
+ __ssp_early_writel(c, SIFIVE_SERIAL_TXDATA_OFFS, port);
+}
+
+static void early_sifive_serial_write(struct console *con, const char *s,
+ unsigned int n)
+{
+ struct earlycon_device *dev = con->data;
+ struct uart_port *port = &dev->port;
+
+ uart_console_write(port, s, n, early_sifive_serial_putc);
+}
+
+static int __init early_sifive_serial_setup(struct earlycon_device *dev,
+ const char *options)
+{
+ struct uart_port *port = &dev->port;
+
+ if (!port->membase)
+ return -ENODEV;
+
+ dev->con->write = early_sifive_serial_write;
+
+ return 0;
+}
+
+OF_EARLYCON_DECLARE(sifive, "sifive,uart0", early_sifive_serial_setup);
+OF_EARLYCON_DECLARE(sifive, "sifive,fu540-c000-uart0",
+ early_sifive_serial_setup);
+#endif /* CONFIG_SERIAL_EARLYCON */
+
+/*
+ * Linux console interface
+ */
+
+#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
+
+static struct sifive_serial_port *sifive_serial_console_ports[SIFIVE_SERIAL_MAX_PORTS];
+
+static void sifive_serial_console_putchar(struct uart_port *port, int ch)
+{
+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
+
+ __ssp_wait_for_xmitr(ssp);
+ __ssp_transmit_char(ssp, ch);
+}
+
+static void sifive_serial_console_write(struct console *co, const char *s,
+ unsigned int count)
+{
+ struct sifive_serial_port *ssp = sifive_serial_console_ports[co->index];
+ unsigned long flags;
+ unsigned int ier;
+ int locked = 1;
+
+ if (!ssp)
+ return;
+
+ local_irq_save(flags);
+ if (ssp->port.sysrq)
+ locked = 0;
+ else if (oops_in_progress)
+ locked = spin_trylock(&ssp->port.lock);
+ else
+ spin_lock(&ssp->port.lock);
+
+ ier = __ssp_readl(ssp, SIFIVE_SERIAL_IE_OFFS);
+ __ssp_writel(0, SIFIVE_SERIAL_IE_OFFS, ssp);
+
+ uart_console_write(&ssp->port, s, count, sifive_serial_console_putchar);
+
+ __ssp_writel(ier, SIFIVE_SERIAL_IE_OFFS, ssp);
+
+ if (locked)
+ spin_unlock(&ssp->port.lock);
+ local_irq_restore(flags);
+}
+
+static int __init sifive_serial_console_setup(struct console *co, char *options)
+{
+ struct sifive_serial_port *ssp;
+ int baud = SIFIVE_DEFAULT_BAUD_RATE;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ if (co->index < 0 || co->index >= SIFIVE_SERIAL_MAX_PORTS)
+ return -ENODEV;
+
+ ssp = sifive_serial_console_ports[co->index];
+ if (!ssp)
+ return -ENODEV;
+
+ if (options)
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+ return uart_set_options(&ssp->port, co, baud, parity, bits, flow);
+}
+
+static struct uart_driver sifive_serial_uart_driver;
+
+static struct console sifive_serial_console = {
+ .name = SIFIVE_TTY_PREFIX,
+ .write = sifive_serial_console_write,
+ .device = uart_console_device,
+ .setup = sifive_serial_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &sifive_serial_uart_driver,
+};
+
+static int __init sifive_console_init(void)
+{
+ register_console(&sifive_serial_console);
+ return 0;
+}
+
+console_initcall(sifive_console_init);
+
+static void __ssp_add_console_port(struct sifive_serial_port *ssp)
+{
+ sifive_serial_console_ports[ssp->port.line] = ssp;
+}
+
+static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
+{
+ sifive_serial_console_ports[ssp->port.line] = 0;
+}
+
+#define SIFIVE_SERIAL_CONSOLE (&sifive_serial_console)
+
+#else
+
+#define SIFIVE_SERIAL_CONSOLE NULL
+
+static inline void __ssp_add_console_port(struct sifive_serial_port *ssp)
+{}
+static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
+{}
+
+#endif
+
+static const struct uart_ops sifive_serial_uops = {
+ .tx_empty = sifive_serial_tx_empty,
+ .set_mctrl = sifive_serial_set_mctrl,
+ .get_mctrl = sifive_serial_get_mctrl,
+ .stop_tx = sifive_serial_stop_tx,
+ .start_tx = sifive_serial_start_tx,
+ .stop_rx = sifive_serial_stop_rx,
+ .break_ctl = sifive_serial_break_ctl,
+ .startup = sifive_serial_startup,
+ .shutdown = sifive_serial_shutdown,
+ .set_termios = sifive_serial_set_termios,
+ .type = sifive_serial_type,
+ .release_port = sifive_serial_release_port,
+ .request_port = sifive_serial_request_port,
+ .config_port = sifive_serial_config_port,
+ .verify_port = sifive_serial_verify_port,
+};
+
+static struct uart_driver sifive_serial_uart_driver = {
+ .owner = THIS_MODULE,
+ .driver_name = SIFIVE_SERIAL_NAME,
+ .dev_name = SIFIVE_TTY_PREFIX,
+ .nr = SIFIVE_SERIAL_MAX_PORTS,
+ .cons = SIFIVE_SERIAL_CONSOLE,
+};
+
+static int sifive_serial_probe(struct platform_device *pdev)
+{
+ struct sifive_serial_port *ssp;
+ struct resource *mem;
+ struct clk *clk;
+ void __iomem *base;
+ int irq, id, r;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "could not acquire interrupt\n");
+ return -EPROBE_DEFER;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(&pdev->dev, mem);
+ if (IS_ERR(base)) {
+ dev_err(&pdev->dev, "could not acquire device memory\n");
+ return PTR_ERR(base);
+ }
+
+ clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "unable to find controller clock\n");
+ return PTR_ERR(clk);
+ }
+
+ id = of_alias_get_id(pdev->dev.of_node, "serial");
+ if (id < 0) {
+ dev_err(&pdev->dev, "missing aliases entry\n");
+ return id;
+ }
+
+#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
+ if (id > SIFIVE_SERIAL_MAX_PORTS) {
+ dev_err(&pdev->dev, "too many UARTs (%d)\n", id);
+ return -EINVAL;
+ }
+#endif
+
+ ssp = devm_kzalloc(&pdev->dev, sizeof(*ssp), GFP_KERNEL);
+ if (!ssp)
+ return -ENOMEM;
+
+ ssp->port.dev = &pdev->dev;
+ ssp->port.type = PORT_SIFIVE_V0;
+ ssp->port.iotype = UPIO_MEM;
+ ssp->port.irq = irq;
+ ssp->port.fifosize = SIFIVE_TX_FIFO_DEPTH;
+ ssp->port.ops = &sifive_serial_uops;
+ ssp->port.line = id;
+ ssp->port.mapbase = mem->start;
+ ssp->port.membase = base;
+ ssp->dev = &pdev->dev;
+ ssp->clk = clk;
+ ssp->clk_notifier.notifier_call = sifive_serial_clk_notifier;
+
+ r = clk_notifier_register(ssp->clk, &ssp->clk_notifier);
+ if (r) {
+ dev_err(&pdev->dev, "could not register clock notifier: %d\n",
+ r);
+ goto probe_out1;
+ }
+
+ /* Set up clock divider */
+ ssp->clkin_rate = clk_get_rate(ssp->clk);
+ ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE;
+ __ssp_update_div(ssp);
+
+ platform_set_drvdata(pdev, ssp);
+
+ /* Enable transmits and set the watermark level to 1 */
+ __ssp_writel((1 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT) |
+ SIFIVE_SERIAL_TXCTRL_TXEN_MASK,
+ SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
+
+ /* Enable receives and set the watermark level to 0 */
+ __ssp_writel((0 << SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT) |
+ SIFIVE_SERIAL_RXCTRL_RXEN_MASK,
+ SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
+
+ r = request_irq(ssp->port.irq, sifive_serial_irq, ssp->port.irqflags,
+ dev_name(&pdev->dev), ssp);
+ if (r) {
+ dev_err(&pdev->dev, "could not attach interrupt: %d\n", r);
+ goto probe_out2;
+ }
+
+ __ssp_add_console_port(ssp);
+
+ r = uart_add_one_port(&sifive_serial_uart_driver, &ssp->port);
+ if (r != 0) {
+ dev_err(&pdev->dev, "could not add uart: %d\n", r);
+ goto probe_out3;
+ }
+
+ return 0;
+
+probe_out3:
+ __ssp_remove_console_port(ssp);
+ free_irq(ssp->port.irq, ssp);
+probe_out2:
+ clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
+probe_out1:
+ return r;
+}
+
+static int sifive_serial_remove(struct platform_device *dev)
+{
+ struct sifive_serial_port *ssp = platform_get_drvdata(dev);
+
+ __ssp_remove_console_port(ssp);
+ uart_remove_one_port(&sifive_serial_uart_driver, &ssp->port);
+ free_irq(ssp->port.irq, ssp);
+ clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
+
+ return 0;
+}
+
+static const struct of_device_id sifive_serial_of_match[] = {
+ { .compatible = "sifive,fu540-c000-uart0" },
+ { .compatible = "sifive,uart0" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sifive_serial_of_match);
+
+static struct platform_driver sifive_serial_platform_driver = {
+ .probe = sifive_serial_probe,
+ .remove = sifive_serial_remove,
+ .driver = {
+ .name = SIFIVE_SERIAL_NAME,
+ .of_match_table = of_match_ptr(sifive_serial_of_match),
+ },
+};
+
+static int __init sifive_serial_init(void)
+{
+ int r;
+
+ r = uart_register_driver(&sifive_serial_uart_driver);
+ if (r)
+ goto init_out1;
+
+ r = platform_driver_register(&sifive_serial_platform_driver);
+ if (r)
+ goto init_out2;
+
+ return 0;
+
+init_out2:
+ uart_unregister_driver(&sifive_serial_uart_driver);
+init_out1:
+ return r;
+}
+
+static void __exit sifive_serial_exit(void)
+{
+ platform_driver_unregister(&sifive_serial_platform_driver);
+ uart_unregister_driver(&sifive_serial_uart_driver);
+}
+
+module_init(sifive_serial_init);
+module_exit(sifive_serial_exit);
+
+MODULE_DESCRIPTION("SiFive UART serial driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Paul Walmsley <paul@pwsan.com>");
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index dce5f9dae121..569d5172d23c 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -281,4 +281,7 @@
/* MediaTek BTIF */
#define PORT_MTK_BTIF 117
+/* SiFive UART */
+#define PORT_SIFIVE_V0 118
+
#endif /* _UAPILINUX_SERIAL_CORE_H */
--
2.19.1
^ permalink raw reply related
* Re: [PATCH v2 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
From: Rob Herring @ 2018-10-20 14:21 UTC (permalink / raw)
To: Paul Walmsley
Cc: open list:SERIAL DRIVERS, devicetree, linux-riscv,
linux-kernel@vger.kernel.org, Greg Kroah-Hartman, Mark Rutland,
Palmer Dabbelt, Paul Walmsley
In-Reply-To: <4317548d-f831-29ba-3be9-35f080587db9@sifive.com>
On Fri, Oct 19, 2018 at 5:06 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
>
> On 10/19/18 1:45 PM, Rob Herring wrote:
> > On Fri, Oct 19, 2018 at 1:48 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
> >> Add DT binding documentation for the Linux driver for the SiFive
> >> asynchronous serial IP block. Nothing too exotic.
> >>
> >> Cc: linux-serial@vger.kernel.org
> >> Cc: devicetree@vger.kernel.org
> >> Cc: linux-riscv@lists.infradead.org
> >> Cc: linux-kernel@vger.kernel.org
> >> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> >> Cc: Rob Herring <robh+dt@kernel.org>
> >> Cc: Mark Rutland <mark.rutland@arm.com>
> >> Cc: Palmer Dabbelt <palmer@sifive.com>
> >> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
> >> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> >> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> >> ---
> >> .../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++
> >> 1 file changed, 21 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
> >> new file mode 100644
> >> index 000000000000..8982338512f5
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
> >> @@ -0,0 +1,21 @@
> >> +SiFive asynchronous serial interface (UART)
> >> +
> >> +Required properties:
> >> +
> >> +- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0"
> > I assume once again, the last '0' is a version?
>
>
> Yes.
>
>
> > Palmer mentioned the
> > compatible string is part of the IP block repository?
>
>
> It is, but there's no guarantee that the compatible string from the RTL
> will make it into a ROM for any given chip. For example, a customer may
> want the UART, but not want to take the DT ROM to keep area down.
Optional? Well, that's pointless to have then.
> This is one of the reasons why we'll likely switch to the usual
> software-maintained DTS files for Linux, just like the rest of arch/arm,
> arch/powerpc, etc.
Then you should probably just follow normal conventions.
I don't think DT in the h/w is the best strategy anyways. Ideally,
what the h/w should have are version and capabilities (assuming there
are configuration options) registers which aren't optional and can't
be forgotten to be updated. The version should probably have a vendor
too.
> > As I mentioned for the
> > intc and now the pwm block bindings, if you are going to do version
> > numbers please document the versioning scheme.
>
>
> Will add that to the binding document.
I don't seem to be making my point clear. I don't want any of this
added to a binding doc for particular IP blocks. Write a common doc
that explains the scheme and addresses the questions I asked. Then
just reference that doc here.
Maybe this is documented somewhere already? Otherwise, if one is
creating a new IP block, how do they know what the versioning scheme
is or what goes in the DT ROM?
>
>
> > Where does the
> > number come from?
>
>
> It comes from the RTL, which is public:
>
> https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/uart/UART.scala#L43
I'm not going to go read your RTL, sorry.
Rob
^ permalink raw reply
* Re: [[PATCH] 8/9] DMA-UART-Driver-for-AST2500
From: Vinod @ 2018-10-20 16:26 UTC (permalink / raw)
To: sudheer.v
Cc: Benjamin Herrenschmidt, Rob Herring, Mark Rutland,
Greg Kroah-Hartman, Joel Stanley, Andrew Jeffery, Russell King,
Dan Williams, Jiri Slaby, Thomas Gleixner, Marc Zyngier,
Christian Borntraeger, Michael Moese, Hendrik Brueckner,
Kate Stewart, Philippe Ombredanne, dmaengine, devicetree,
linux-kernel, linux-serial
In-Reply-To: <20181019071154.GE13642@Pilot130>
On 19-10-18, 12:41, sudheer.v wrote:
> On Fri, Oct 19, 2018 at 10:32:24AM +1100, Benjamin Herrenschmidt wrote:
> > On Thu, 2018-10-18 at 15:25 +0530, Vinod wrote:
> > >
> > > > It's not a dmaengine driver. It's a serial UART driver that happens to
> > > > use a dedicated DMA engine.
> > >
> > > Then I see no reason for it to use dmaengine APIs. The framework allows
> > > people to share a controller for many clients, but if you have dedicated
> > > one then you may use it directly
> >
> > Well... the engine is shared by a few UARTs, they have dedicated rings
> > but there's a common set of regs for interrupt handling etc.
> >
> > That said, I still think it could be contained within a UART driver,
> > there's little benefit in adding the framework overhead, esp since
> > these are really weak cores, any overhead will be felt.
> >
> > Ben.
> >
> > > > It's unclear whether it should be split into two drivers, or just have
> > > > the serial driver directly use the dma engine since that engine is
> > > > dedicated in HW to only work on those UARTs and nothing else...
> > > >
> > > > Cheers,
> > > > Ben.
>
> Initially we wanted to have a single driver,
> however we had an informal discussion with one of the maintainer
> and based on the feedback, followed the Linux DMA and UART architecture.
>
> If this seperate DMA-engine driver adds more overhead than benifit,
> we will merge them into a single UART driver and resubmitt the patches.
> Vinod,
> can this dma-controller driver sit under dma subsystem?.
> or better to move it under UART framework.
My advise would be to see what you can do with the DMA IP block. If this
can/would be used in different places then it would make sense to do a
dmaengine driver and solve the problem for everyone.
If this is always going to be hidden behind serial then maybe it makes
sense to be inside serial driver and not use dmaengine APIs
If you decide to prefer the former case, please move it to dmaengine and
resubmit :)
HTH
--
~Vinod
^ permalink raw reply
* [PATCH 0/1] tty: simplify getting .driver_data
From: Wolfram Sang @ 2018-10-21 20:00 UTC (permalink / raw)
To: linux-kernel; +Cc: linux-renesas-soc, Wolfram Sang, linux-serial
I got tired of fixing this in Renesas drivers manually, so I took the big
hammer. Remove this cumbersome code pattern which got copy-pasted too much
already:
- struct platform_device *pdev = to_platform_device(dev);
- struct ep93xx_keypad *keypad = platform_get_drvdata(pdev);
+ struct ep93xx_keypad *keypad = dev_get_drvdata(dev);
A branch, tested by buildbot, can be found here:
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git coccinelle/get_drvdata
I have been asked if it couldn't be done for dev_set_drvdata as well. I checked
it and did not find one occasion where it could be simplified like this. Not
much of a surprise because driver_data is usually set in probe() functions
which access struct platform_device in many other ways.
I am open for other comments, suggestions, too, of course.
Here is the cocci-script I created:
@@
struct device* d;
identifier pdev;
expression *ptr;
@@
(
- struct platform_device *pdev = to_platform_device(d);
|
- struct platform_device *pdev;
...
- pdev = to_platform_device(d);
)
<... when != pdev
- &pdev->dev
+ d
...>
ptr =
- platform_get_drvdata(pdev)
+ dev_get_drvdata(d)
<... when != pdev
- &pdev->dev
+ d
...>
Kind regards,
Wolfram
Wolfram Sang (1):
tty: serial: qcom_geni_serial: simplify getting .driver_data
drivers/tty/serial/qcom_geni_serial.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
--
2.19.0
^ permalink raw reply
* [PATCH 1/1] tty: serial: qcom_geni_serial: simplify getting .driver_data
From: Wolfram Sang @ 2018-10-21 20:00 UTC (permalink / raw)
To: linux-kernel
Cc: linux-renesas-soc, Wolfram Sang, Greg Kroah-Hartman, Jiri Slaby,
linux-serial
In-Reply-To: <20181021200059.2294-1-wsa+renesas@sang-engineering.com>
We should get 'driver_data' from 'struct device' directly. Going via
platform_device is an unneeded step back and forth.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
Build tested only. buildbot is happy.
drivers/tty/serial/qcom_geni_serial.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
index d3b5261ee80a..4c9dbfe96c1a 100644
--- a/drivers/tty/serial/qcom_geni_serial.c
+++ b/drivers/tty/serial/qcom_geni_serial.c
@@ -162,8 +162,7 @@ static struct qcom_geni_serial_port qcom_geni_uart_ports[GENI_UART_PORTS] = {
static ssize_t loopback_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- struct platform_device *pdev = to_platform_device(dev);
- struct qcom_geni_serial_port *port = platform_get_drvdata(pdev);
+ struct qcom_geni_serial_port *port = dev_get_drvdata(dev);
return snprintf(buf, sizeof(u32), "%d\n", port->loopback);
}
@@ -172,8 +171,7 @@ static ssize_t loopback_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t size)
{
- struct platform_device *pdev = to_platform_device(dev);
- struct qcom_geni_serial_port *port = platform_get_drvdata(pdev);
+ struct qcom_geni_serial_port *port = dev_get_drvdata(dev);
u32 loopback;
if (kstrtoint(buf, 0, &loopback) || loopback > MAX_LOOPBACK_CFG) {
--
2.19.0
^ permalink raw reply related
* Re: [RFC][PATCHv2 2/4] printk: move printk_safe macros to printk header
From: Petr Mladek @ 2018-10-22 14:30 UTC (permalink / raw)
To: Peter Zijlstra
Cc: Sergey Senozhatsky, linux-kernel, Steven Rostedt, Daniel Wang,
Andrew Morton, Linus Torvalds, Greg Kroah-Hartman, Alan Cox,
Jiri Slaby, Peter Feiner, linux-serial, Sergey Senozhatsky,
john.ogness
In-Reply-To: <20181017140044.GK3121@hirez.programming.kicks-ass.net>
On Wed 2018-10-17 16:00:44, Peter Zijlstra wrote:
> On Wed, Oct 17, 2018 at 12:50:15PM +0200, Petr Mladek wrote:
> > Also note that by deferred printk I mean deferring the console
> > handling! IMHO, there are _no more problems_ with storing
> > the messages into the buffer if we accept that the current
> > very limited use of printk_safe per-cpu buffers is easier
> > than any complicated generic lockless buffer.
>
> They hide messages. The whole two radically different printk paths is
> also quite horrible.
I agree that having everything in one buffer with unified
and safe access from any context would be a great win.
> And lockless buffers aren't all _that_ complicated, esp. not when
> performance isn't the top priority.
>
> And earlycon is mostly usable, esp. the serial ones. Those, when
> configured, should synchronously print along. The current design
> also makes that difficult.
>
> A wee little like so; typed in a hurry, never been near a compiler.
Thanks a lot for the code. I still need to find time to better
understand it. Anyway, it looks worth considering.
Best Regards,
Petr
^ permalink raw reply
* [PATCH stable v2 1/2] termios, tty/tty_baudrate.c: fix buffer overrun
From: H. Peter Anvin (Intel) @ 2018-10-22 16:19 UTC (permalink / raw)
To: linux-kernel, linux-serial
Cc: H. Peter Anvin, Greg Kroah-Hartman, Jiri Slaby, Al Viro,
Richard Henderson, Ivan Kokshaysky, Matt Turner, Thomas Gleixner,
Kate Stewart, Philippe Ombredanne, Eugene Syromiatnikov,
linux-alpha, Alan Cox, stable
From: "H. Peter Anvin" <hpa@zytor.com>
On architectures with CBAUDEX == 0 (Alpha and PowerPC), the code in tty_baudrate.c does
not do any limit checking on the tty_baudrate[] array, and in fact a
buffer overrun is possible on both architectures. Add a limit check to
prevent that situation.
This will be followed by a much bigger cleanup/simplification patch.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Requested-by: Cc: Johan Hovold <johan@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kate Stewart <kstewart@linuxfoundation.org>
Cc: Philippe Ombredanne <pombredanne@nexb.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Eugene Syromiatnikov <esyr@redhat.com>
Cc: <linux-alpha@vger.kernel.org>
Cc: <linux-serial@vger.kernel.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: <stable@vger.kernel.org>
---
drivers/tty/tty_baudrate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/tty_baudrate.c b/drivers/tty/tty_baudrate.c
index 7576ceace571..f438eaa68246 100644
--- a/drivers/tty/tty_baudrate.c
+++ b/drivers/tty/tty_baudrate.c
@@ -77,7 +77,7 @@ speed_t tty_termios_baud_rate(struct ktermios *termios)
else
cbaud += 15;
}
- return baud_table[cbaud];
+ return cbaud >= n_baud_table ? 0 : baud_table[cbaud];
}
EXPORT_SYMBOL(tty_termios_baud_rate);
@@ -113,7 +113,7 @@ speed_t tty_termios_input_baud_rate(struct ktermios *termios)
else
cbaud += 15;
}
- return baud_table[cbaud];
+ return cbaud >= n_baud_table ? 0 : baud_table[cbaud];
#else /* IBSHIFT */
return tty_termios_baud_rate(termios);
#endif /* IBSHIFT */
--
2.14.4
^ permalink raw reply related
* [PATCH stable v2 2/2] arch/alpha, termios: implement BOTHER, IBSHIFT and termios2
From: H. Peter Anvin (Intel) @ 2018-10-22 16:19 UTC (permalink / raw)
To: linux-kernel, linux-serial
Cc: H. Peter Anvin (Intel), Greg Kroah-Hartman, Jiri Slaby, Al Viro,
Richard Henderson, Ivan Kokshaysky, Matt Turner, Thomas Gleixner,
Kate Stewart, Philippe Ombredanne, Eugene Syromiatnikov,
linux-alpha, Johan Hovold, Alan Cox, stable
In-Reply-To: <20181022161905.26589-1-hpa@zytor.com>
Alpha has had c_ispeed and c_ospeed, but still set speeds in c_cflags
using arbitrary flags. Because BOTHER is not defined, the general
Linux code doesn't allow setting arbitrary baud rates, and because
CBAUDEX == 0, we can have an array overrun of the baud_rate[] table in
drivers/tty/tty_baudrate.c if (c_cflags & CBAUD) == 037.
Resolve both problems by #defining BOTHER to 037 on Alpha.
However, userspace still needs to know if setting BOTHER is actually
safe given legacy kernels (does anyone actually care about that on
Alpha anymore?), so enable the TCGETS2/TCSETS*2 ioctls on Alpha, even
though they use the same structure. Define struct termios2 just for
compatibility; it is the exact same structure as struct termios. In a
future patchset, this will be cleaned up so the uapi headers are
usable from libc.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kate Stewart <kstewart@linuxfoundation.org>
Cc: Philippe Ombredanne <pombredanne@nexb.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Eugene Syromiatnikov <esyr@redhat.com>
Cc: <linux-alpha@vger.kernel.org>
Cc: <linux-serial@vger.kernel.org>
Cc: Johan Hovold <johan@kernel.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: <stable@vger.kernel.org>
---
arch/alpha/include/asm/termios.h | 8 +++++++-
arch/alpha/include/uapi/asm/ioctls.h | 5 +++++
arch/alpha/include/uapi/asm/termbits.h | 17 +++++++++++++++++
3 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/alpha/include/asm/termios.h b/arch/alpha/include/asm/termios.h
index 6a8c53dec57e..b7c77bb1bfd2 100644
--- a/arch/alpha/include/asm/termios.h
+++ b/arch/alpha/include/asm/termios.h
@@ -73,9 +73,15 @@
})
#define user_termios_to_kernel_termios(k, u) \
- copy_from_user(k, u, sizeof(struct termios))
+ copy_from_user(k, u, sizeof(struct termios2))
#define kernel_termios_to_user_termios(u, k) \
+ copy_to_user(u, k, sizeof(struct termios2))
+
+#define user_termios_to_kernel_termios_1(k, u) \
+ copy_from_user(k, u, sizeof(struct termios))
+
+#define kernel_termios_to_user_termios_1(u, k) \
copy_to_user(u, k, sizeof(struct termios))
#endif /* _ALPHA_TERMIOS_H */
diff --git a/arch/alpha/include/uapi/asm/ioctls.h b/arch/alpha/include/uapi/asm/ioctls.h
index 3729d92d3fa8..dc8c20ac7191 100644
--- a/arch/alpha/include/uapi/asm/ioctls.h
+++ b/arch/alpha/include/uapi/asm/ioctls.h
@@ -32,6 +32,11 @@
#define TCXONC _IO('t', 30)
#define TCFLSH _IO('t', 31)
+#define TCGETS2 _IOR('T', 42, struct termios2)
+#define TCSETS2 _IOW('T', 43, struct termios2)
+#define TCSETSW2 _IOW('T', 44, struct termios2)
+#define TCSETSF2 _IOW('T', 45, struct termios2)
+
#define TIOCSWINSZ _IOW('t', 103, struct winsize)
#define TIOCGWINSZ _IOR('t', 104, struct winsize)
#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
diff --git a/arch/alpha/include/uapi/asm/termbits.h b/arch/alpha/include/uapi/asm/termbits.h
index de6c8360fbe3..4575ba34a0ea 100644
--- a/arch/alpha/include/uapi/asm/termbits.h
+++ b/arch/alpha/include/uapi/asm/termbits.h
@@ -26,6 +26,19 @@ struct termios {
speed_t c_ospeed; /* output speed */
};
+/* Alpha has identical termios and termios2 */
+
+struct termios2 {
+ tcflag_t c_iflag; /* input mode flags */
+ tcflag_t c_oflag; /* output mode flags */
+ tcflag_t c_cflag; /* control mode flags */
+ tcflag_t c_lflag; /* local mode flags */
+ cc_t c_cc[NCCS]; /* control characters */
+ cc_t c_line; /* line discipline (== c_cc[19]) */
+ speed_t c_ispeed; /* input speed */
+ speed_t c_ospeed; /* output speed */
+};
+
/* Alpha has matching termios and ktermios */
struct ktermios {
@@ -152,6 +165,7 @@ struct ktermios {
#define B3000000 00034
#define B3500000 00035
#define B4000000 00036
+#define BOTHER 00037
#define CSIZE 00001400
#define CS5 00000000
@@ -169,6 +183,9 @@ struct ktermios {
#define CMSPAR 010000000000 /* mark or space (stick) parity */
#define CRTSCTS 020000000000 /* flow control */
+#define CIBAUD 07600000
+#define IBSHIFT 16
+
/* c_lflag bits */
#define ISIG 0x00000080
#define ICANON 0x00000100
--
2.14.4
^ permalink raw reply related
* Re: [PATCH v2 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
From: Palmer Dabbelt @ 2018-10-22 16:41 UTC (permalink / raw)
To: robh+dt
Cc: Paul Walmsley, linux-serial, devicetree, linux-riscv,
linux-kernel, Greg KH, mark.rutland, paul
In-Reply-To: <CAL_JsqJBSqaxnETdJg1Mdp+H2ay+WKT0JaxLe6D4Fwo_99qUkw@mail.gmail.com>
On Fri, 19 Oct 2018 13:45:57 PDT (-0700), robh+dt@kernel.org wrote:
> On Fri, Oct 19, 2018 at 1:48 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>>
>> Add DT binding documentation for the Linux driver for the SiFive
>> asynchronous serial IP block. Nothing too exotic.
>>
>> Cc: linux-serial@vger.kernel.org
>> Cc: devicetree@vger.kernel.org
>> Cc: linux-riscv@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
>> Cc: Rob Herring <robh+dt@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: Palmer Dabbelt <palmer@sifive.com>
>> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
>> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
>> Signed-off-by: Paul Walmsley <paul@pwsan.com>
>> ---
>> .../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++
>> 1 file changed, 21 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
>>
>> diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
>> new file mode 100644
>> index 000000000000..8982338512f5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
>> @@ -0,0 +1,21 @@
>> +SiFive asynchronous serial interface (UART)
>> +
>> +Required properties:
>> +
>> +- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0"
>
> I assume once again, the last '0' is a version? As I mentioned for the
> intc and now the pwm block bindings, if you are going to do version
> numbers please document the versioning scheme. Palmer mentioned the
> compatible string is part of the IP block repository? Where does the
> number come from? What's the next version? Major vs. minor versions?
> ECO fixes? Is the version s/w readable? How do you ensure it gets
> updated? All that should be addressed.
The RISC-V ecosystem is a bit different than that of ARM, MIPS, or Intel in
that the ISA is an royalty-free open standard that anyone can implement (ie,
without even signing a license agreement), with only the "RISC-V" trademark
being held behind a pay+conformance wall. As a result, we don't actually have
any control over who builds a RISC-V chip so all we at SiFive can really to is
try to demonstrate good practices in software land and go from there.
As far as SiFive's codebase is concerned, the version number is embedded in the
RTL generator, and a device tree is generated along with the RTL. This device
tree is then embedded into a mask ROM on the chip, which allows the earliest
stage of boot to proceed. As I'm sure you know, boot is a very complicated
process and as a result the device tree passed to Linux doesn't necessarily
look like what's in the ROM, but the intent is to keep iterating until we can
get these as similar as possible -- that's why we're submitting every
devicetree binding to the standard.
Specifically as far as the UART is concerned, the compat string that's not
chip-specific lives here (the "sifive,fu540-c000-uart" string lives in an
internal chip repo that I can't point to):
https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/uart/UART.scala#L43
The version numbering scheme right now is pretty simple: I try to pay as much
attention as possible to how the hardware changes (both by looking and with
some automation), and I go yell at anyone who does something stupid. I know
it's not the most scalable of schemes, but it's the best we have. The UART is
actually an interesting case right now because we have an outstanding pull
request that adds a bit to the UART and then adds "sifive,uart1" to the compat
string
https://github.com/sifive/sifive-blocks/pull/90
My intent is to ensure that the device tree's compat string uniquely identifies
the software interface to a block. Thus, whenever a device's implementation
changes in a software-visible way (bug fix or feature addition) we change the
compat string -- either adding one (as is the case of the UART, where the
compat string will be both "sifive,uart1" and "sifive,uart0" since the new
feature is backwards compatible with the old software) or changing one (if the
interface change is not compatible with old software).
Like I said above, this is all a manual process right now and this only applies
to SiFive's implementations. I'm confident that I can at least ensure that,
for any given SiFive implementation, a block's compat string will uniquely
identify the software interface to it. For the rest of the RISC-V world all we
can do is set a good example and review the software.
> Otherwise, don't do version numbers because we have no visibility to
> what they mean.
>
>> +- reg: address and length of the register space
>> +- interrupt-parent: should contain a phandle pointing to the SoC interrupt
>> + controller device node that the UART interrupts are connected to
>
> Don't need to document interrupt-parent here.
>
>> +- interrupts: Should contain the UART interrupt identifier
>> +- clocks: Should contain a clock identifier for the UART's parent clock
>> +
>> +
>> +Example:
>> +
>> +uart0: serial@10010000 {
>> + compatible = "sifive,uart0";
>> + interrupt-parent = <&plic0>;
>> + interrupts = <80>;
>> + reg = <0x0 0x10010000 0x0 0x1000>;
>> + clocks = <&prci PRCI_CLK_TLCLK>;
>> +};
>> --
>> 2.19.1
>>
^ permalink raw reply
* Re: [RFC][PATCHv2 2/4] printk: move printk_safe macros to printk header
From: Sergey Senozhatsky @ 2018-10-23 6:25 UTC (permalink / raw)
To: Peter Zijlstra
Cc: Sergey Senozhatsky, linux-kernel, Petr Mladek, Steven Rostedt,
Daniel Wang, Andrew Morton, Linus Torvalds, Greg Kroah-Hartman,
Alan Cox, Jiri Slaby, Peter Feiner, linux-serial,
Sergey Senozhatsky
In-Reply-To: <20181016125415.GA3121@hirez.programming.kicks-ass.net>
On (10/16/18 14:54), Peter Zijlstra wrote:
>
> No, no wakups. irq_work to wake the printk-thread, at most.
>
There are cases when we probably prefer to be in "direct printk" mode.
E.g. sysrq or late PM stages (probably).
Doing irq_work->wake_up_process->printk_kthread from sysrq probably
might not work all the time, so direct printk path may look more
"reliable" in some cases. In *theory* (just in theory), we can do
void __handle_sysrq(int key, bool check_mask)
{
...
op_p->handler(key);
...
+ if (console_trylock())
+ console_unlock();
}
type of thing. So sysrq handler will just log_store() the data and we
will try to flush logbuf immediately once we are dont with sysrq handler.
This will require additional work, tho. Some sysrq handlers can print
significant (depends on serial console baud) amounts of data. For instance,
sysrq_handle_showstate() calls show_workqueue_state() and show_state(),
which do numerous printk()-s. Therefore, those functions touch NMI and
softlockup watchdogs:
void show_workqueue_state(void)
{
for_each_pwq(pwq, wq) {
...
touch_nmi_watchdog();
}
for_each_pool(pool, pi) {
...
touch_nmi_watchdog();
}
}
and
void show_state_filter(unsigned long state_filter)
{
for_each_process_thread(g, p) {
touch_nmi_watchdog();
touch_all_softlockup_watchdogs();
...
}
}
If we will move the actual printout to console_unlock() then we will
have to start touching watchdogs from console_unlock().
Another troubling moment might be that with completely async printk()
it's easier to cause logbuf wrap around; because CPU which does printk()
in a loop is always async, console drivers don't throttle it anymore;
currently it's sometimes sync (when console_sem is not locked, or locked
but we have active console_sem_owner) or async (when console_sem is
locked and there is no active console_sem_owner).
-ss
^ permalink raw reply
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