* [PATCH 1/2 v4] serial: mctrl_gpio: Check if GPIO property exisits before requesting it
From: Stefan Roese @ 2019-06-03 8:33 UTC (permalink / raw)
To: linux-serial
Cc: linux-kernel, Mika Westerberg, Andy Shevchenko, Yegor Yefremov,
Greg Kroah-Hartman, Giulio Benetti, Johan Hovold
This patch adds a check for the GPIOs property existence, before the
GPIO is requested. This fixes an issue seen when the 8250 mctrl_gpio
support is added (2nd patch in this patch series) on x86 platforms using
ACPI.
Here Mika's comments from 2016-08-09:
"
I noticed that with v4.8-rc1 serial console of some of our Broxton
systems does not work properly anymore. I'm able to see output but input
does not work.
I bisected it down to commit 4ef03d328769eddbfeca1f1c958fdb181a69c341
("tty/serial/8250: use mctrl_gpio helpers").
The reason why it fails is that in ACPI we do not have names for GPIOs
(except when _DSD is used) so we use the "idx" to index into _CRS GPIO
resources. Now mctrl_gpio_init_noauto() goes through a list of GPIOs
calling devm_gpiod_get_index_optional() passing "idx" of 0 for each. The
UART device in Broxton has following (simplified) ACPI description:
Device (URT4)
{
...
Name (_CRS, ResourceTemplate () {
GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
"\\_SB.GPO0", 0x00, ResourceConsumer)
{
0x003A
}
GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
"\\_SB.GPO0", 0x00, ResourceConsumer)
{
0x003D
}
})
In this case it finds the first GPIO (0x003A which happens to be RX pin
for that UART), turns it into GPIO which then breaks input for the UART
device. This also breaks systems with bluetooth connected to UART (those
typically have some GPIOs in their _CRS).
Any ideas how to fix this?
We cannot just drop the _CRS index lookup fallback because that would
break many existing machines out there so maybe we can limit this to
only DT enabled machines. Or alternatively probe if the property first
exists before trying to acquire the GPIOs (using
device_property_present()).
"
This patch implements the fix suggested by Mika in his statement above.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Giulio Benetti <giulio.benetti@micronovasrl.com>
Cc: Johan Hovold <johan@kernel.org>
---
v4:
- Add missing free() calls (Johan)
- Added Mika's reviewed by tag
- Added Johan to Cc
v3:
- No change
v2:
- Include the problem description and analysis from Mika into the commit
text, as suggested by Greg.
drivers/tty/serial/serial_mctrl_gpio.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/tty/serial/serial_mctrl_gpio.c b/drivers/tty/serial/serial_mctrl_gpio.c
index 39ed56214cd3..6367f389cdfc 100644
--- a/drivers/tty/serial/serial_mctrl_gpio.c
+++ b/drivers/tty/serial/serial_mctrl_gpio.c
@@ -116,6 +116,16 @@ struct mctrl_gpios *mctrl_gpio_init_noauto(struct device *dev, unsigned int idx)
for (i = 0; i < UART_GPIO_MAX; i++) {
enum gpiod_flags flags;
+ char *gpio_str;
+
+ /* Check if GPIO property exists and continue if not */
+ gpio_str = kasprintf(GFP_KERNEL, "%s-gpios",
+ mctrl_gpios_desc[i].name);
+ if (!device_property_present(dev, gpio_str)) {
+ kfree(gpio_str);
+ continue;
+ }
+ kfree(gpio_str);
if (mctrl_gpios_desc[i].dir_out)
flags = GPIOD_OUT_LOW;
--
2.21.0
^ permalink raw reply related
* [PATCH 2/2 v4] tty/serial/8250: use mctrl_gpio helpers
From: Stefan Roese @ 2019-06-03 8:33 UTC (permalink / raw)
To: linux-serial
Cc: linux-kernel, Yegor Yefremov, Mika Westerberg, Andy Shevchenko,
Giulio Benetti, Greg Kroah-Hartman, Johan Hovold
In-Reply-To: <20190603083332.12480-1-sr@denx.de>
From: Yegor Yefremov <yegorslists@googlemail.com>
This patch permits the usage for GPIOs to control
the CTS/RTS/DTR/DSR/DCD/RI signals.
Changed by Stefan:
Only call mctrl_gpio_init(), if the device has no ACPI companion device
to not break existing ACPI based systems. Also only use the mctrl_gpio_
functions when "gpios" is available.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Giulio Benetti <giulio.benetti@micronovasrl.com>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Johan Hovold <johan@kernel.org>
---
v4:
- Added Mika's reviewed by tag
- Added Johan to Cc
v3:
- Only call mctrl_gpio_init(), if the device has no ACPI companion device
to not break existing ACPI based systems, as suggested by Andy
v2:
- No change
Please note that this patch was already applied before [1]. And later
reverted [2] because it introduced problems on some x86 based boards
(ACPI GPIO related). Here a detailed description of the issue at that
time:
https://lkml.org/lkml/2016/8/9/357
http://www.spinics.net/lists/linux-serial/msg23071.html
This is a re-send of the original patch that was applied at that time.
With patch 1/2 from this series this issue should be fixed now (please
note that I can't test it on such an x86 platform causing these
problems).
Andy (or Mika), perhaps it would be possible for you to test this
patch again, now with patch 1/2 of this series applied as well?
That would be really helpful.
Thanks,
Stefan
[1] 4ef03d328769 ("tty/serial/8250: use mctrl_gpio helpers")
[2] 5db4f7f80d16 ("Revert "tty/serial/8250: use mctrl_gpio helpers"")
.../devicetree/bindings/serial/8250.txt | 19 +++++++++
drivers/tty/serial/8250/8250.h | 40 ++++++++++++++++++-
drivers/tty/serial/8250/8250_core.c | 17 ++++++++
drivers/tty/serial/8250/8250_omap.c | 31 ++++++++------
drivers/tty/serial/8250/8250_port.c | 9 +++++
drivers/tty/serial/8250/Kconfig | 1 +
include/linux/serial_8250.h | 1 +
7 files changed, 104 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt
index 3cba12f855b7..20d351f268ef 100644
--- a/Documentation/devicetree/bindings/serial/8250.txt
+++ b/Documentation/devicetree/bindings/serial/8250.txt
@@ -53,6 +53,9 @@ Optional properties:
programmable TX FIFO thresholds.
- resets : phandle + reset specifier pairs
- overrun-throttle-ms : how long to pause uart rx when input overrun is encountered.
+- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
+ line respectively. It will use specified GPIO instead of the peripheral
+ function pin for the UART feature. If unsure, don't specify this property.
Note:
* fsl,ns16550:
@@ -74,3 +77,19 @@ Example:
interrupts = <10>;
reg-shift = <2>;
};
+
+Example for OMAP UART using GPIO-based modem control signals:
+
+ uart4: serial@49042000 {
+ compatible = "ti,omap3-uart";
+ reg = <0x49042000 0x400>;
+ interrupts = <80>;
+ ti,hwmods = "uart4";
+ clock-frequency = <48000000>;
+ cts-gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
+ rts-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
+ dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+ dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+ dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+ rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+ };
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index ebfb0bd5bef5..441aab94264b 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -11,6 +11,8 @@
#include <linux/serial_reg.h>
#include <linux/dmaengine.h>
+#include "../serial_mctrl_gpio.h"
+
struct uart_8250_dma {
int (*tx_dma)(struct uart_8250_port *p);
int (*rx_dma)(struct uart_8250_port *p);
@@ -142,11 +144,47 @@ void serial8250_em485_destroy(struct uart_8250_port *p);
static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
{
serial_out(up, UART_MCR, value);
+
+ if (up->gpios) {
+ int mctrl_gpio = 0;
+
+ if (value & UART_MCR_RTS)
+ mctrl_gpio |= TIOCM_RTS;
+ if (value & UART_MCR_DTR)
+ mctrl_gpio |= TIOCM_DTR;
+
+ mctrl_gpio_set(up->gpios, mctrl_gpio);
+ }
}
static inline int serial8250_in_MCR(struct uart_8250_port *up)
{
- return serial_in(up, UART_MCR);
+ int mctrl;
+
+ mctrl = serial_in(up, UART_MCR);
+
+ if (up->gpios) {
+ int mctrl_gpio = 0;
+
+ /* save current MCR values */
+ if (mctrl & UART_MCR_RTS)
+ mctrl_gpio |= TIOCM_RTS;
+ if (mctrl & UART_MCR_DTR)
+ mctrl_gpio |= TIOCM_DTR;
+
+ mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
+ if (mctrl_gpio & TIOCM_RTS)
+ mctrl |= UART_MCR_RTS;
+ else
+ mctrl &= ~UART_MCR_RTS;
+
+ if (mctrl_gpio & TIOCM_DTR)
+ mctrl |= UART_MCR_DTR;
+ else
+ mctrl &= ~UART_MCR_DTR;
+ }
+
+ return mctrl;
}
#if defined(__alpha__) && !defined(CONFIG_PCI)
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index e441221e04b9..a4470771005f 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -14,6 +14,7 @@
* serial8250_register_8250_port() ports
*/
+#include <linux/acpi.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/ioport.h>
@@ -982,6 +983,8 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
uart = serial8250_find_match_or_unused(&up->port);
if (uart && uart->port.type != PORT_8250_CIR) {
+ struct mctrl_gpios *gpios;
+
if (uart->port.dev)
uart_remove_one_port(&serial8250_reg, &uart->port);
@@ -1016,6 +1019,20 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
if (up->port.flags & UPF_FIXED_TYPE)
uart->port.type = up->port.type;
+ /*
+ * Only call mctrl_gpio_init(), if the device has no ACPI
+ * companion device
+ */
+ if (!has_acpi_companion(uart->port.dev)) {
+ gpios = mctrl_gpio_init(&uart->port, 0);
+ if (IS_ERR(gpios)) {
+ if (PTR_ERR(gpios) != -ENOSYS)
+ return PTR_ERR(gpios);
+ } else {
+ uart->gpios = gpios;
+ }
+ }
+
serial8250_set_defaults(uart);
/* Possibly override default I/O functions. */
diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
index 0a8316632d75..562ac73d9f2f 100644
--- a/drivers/tty/serial/8250/8250_omap.c
+++ b/drivers/tty/serial/8250/8250_omap.c
@@ -141,18 +141,21 @@ static void omap8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
serial8250_do_set_mctrl(port, mctrl);
- /*
- * Turn off autoRTS if RTS is lowered and restore autoRTS setting
- * if RTS is raised
- */
- lcr = serial_in(up, UART_LCR);
- serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
- if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS))
- priv->efr |= UART_EFR_RTS;
- else
- priv->efr &= ~UART_EFR_RTS;
- serial_out(up, UART_EFR, priv->efr);
- serial_out(up, UART_LCR, lcr);
+ if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(up->gpios,
+ UART_GPIO_RTS))) {
+ /*
+ * Turn off autoRTS if RTS is lowered and restore autoRTS
+ * setting if RTS is raised
+ */
+ lcr = serial_in(up, UART_LCR);
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
+ if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS))
+ priv->efr |= UART_EFR_RTS;
+ else
+ priv->efr &= ~UART_EFR_RTS;
+ serial_out(up, UART_EFR, priv->efr);
+ serial_out(up, UART_LCR, lcr);
+ }
}
/*
@@ -453,7 +456,9 @@ static void omap_8250_set_termios(struct uart_port *port,
priv->efr = 0;
up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF);
- if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) {
+ if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW
+ && IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(up->gpios,
+ UART_GPIO_RTS))) {
/* Enable AUTOCTS (autoRTS is enabled when RTS is raised) */
up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
priv->efr |= UART_EFR_CTS;
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index 2304a84eee3b..1925e62f05bf 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -1662,6 +1662,9 @@ static void serial8250_disable_ms(struct uart_port *port)
if (up->bugs & UART_BUG_NOMSR)
return;
+ if (up->gpios)
+ mctrl_gpio_disable_ms(up->gpios);
+
up->ier &= ~UART_IER_MSI;
serial_port_out(port, UART_IER, up->ier);
}
@@ -1674,6 +1677,9 @@ static void serial8250_enable_ms(struct uart_port *port)
if (up->bugs & UART_BUG_NOMSR)
return;
+ if (up->gpios)
+ mctrl_gpio_enable_ms(up->gpios);
+
up->ier |= UART_IER_MSI;
serial8250_rpm_get(up);
@@ -1951,6 +1957,9 @@ unsigned int serial8250_do_get_mctrl(struct uart_port *port)
serial8250_rpm_put(up);
ret = 0;
+ if (up->gpios)
+ return mctrl_gpio_get(up->gpios, &ret);
+
if (status & UART_MSR_DCD)
ret |= TIOCM_CAR;
if (status & UART_MSR_RI)
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
index 296115f6a4d8..509f6a3bb9ff 100644
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
@@ -8,6 +8,7 @@ config SERIAL_8250
tristate "8250/16550 and compatible serial support"
depends on !S390
select SERIAL_CORE
+ select SERIAL_MCTRL_GPIO if GPIOLIB
---help---
This selects whether you want to include the driver for the standard
serial ports. The standard answer is Y. People who might say N
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index 5e0b59422a68..bb2bc99388ca 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -110,6 +110,7 @@ struct uart_8250_port {
* if no_console_suspend
*/
unsigned char probe;
+ struct mctrl_gpios *gpios;
#define UART_PROBE_RSA (1 << 0)
/*
--
2.21.0
^ permalink raw reply related
* [PATCH 00/10] STM32 usart power improvements
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Erwan Le Ray, Fabrice Gasnier
This series delivers power improvements for stm32-usart driver.
Bich Hemon (4):
dt-bindings: serial: add optional pinctrl states
serial: stm32: select pinctrl state in each suspend/resume function
ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
ARM: dts: stm32: Update UART4 pin states on stm32mp157a-dk1
Erwan Le Ray (6):
dt-bindings: serial: stm32: add wakeup option
serial: stm32: add pm_runtime support
serial: stm32: Use __maybe_unused instead of #if CONFIG_PM_SLEEP
serial: stm32: add support for no_console_suspend
ARM: dts: stm32: update uart4 pin configurations for low power
ARM: dts: stm32: add wakeup capability on each usart/uart on
stm32mp157c
.../devicetree/bindings/serial/st,stm32-usart.txt | 19 ++++-
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 17 +++++
arch/arm/boot/dts/stm32mp157a-dk1.dts | 5 +-
arch/arm/boot/dts/stm32mp157c-ed1.dts | 5 +-
arch/arm/boot/dts/stm32mp157c.dtsi | 40 ++++++++--
drivers/tty/serial/stm32-usart.c | 88 ++++++++++++++++++++--
drivers/tty/serial/stm32-usart.h | 1 +
7 files changed, 155 insertions(+), 20 deletions(-)
--
1.9.1
^ permalink raw reply
* [PATCH 01/10] dt-bindings: serial: stm32: add wakeup option
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Erwan Le Ray, Fabrice Gasnier, Bich Hemon
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
Add a note for enabling wakeup capabilities of usart
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 9d3efed..5ec80c1 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -19,6 +19,11 @@ Optional properties:
linux,rs485-enabled-at-boot-time: see rs485.txt.
- dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
- dma-names: "rx" and/or "tx"
+- wakeup-source: bool flag to indicate this device has wakeup capabilities
+- interrupt-names, if optional wake-up interrupt is used, should be:
+ - "event": the name for the interrupt line of the USART instance
+ - "wakeup" the name for the optional wake-up interrupt
+
Examples:
usart4: serial@40004c00 {
--
1.9.1
^ permalink raw reply related
* [PATCH 02/10] dt-bindings: serial: add optional pinctrl states
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Erwan Le Ray, Fabrice Gasnier, Bich Hemon
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
From: Bich Hemon <bich.hemon@st.com>
Add options for pinctrl states:
- "sleep" for low power
- "idle" for low power and wakeup capabilities enabled
- "no_console_suspend" for enabling console messages in low power
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 5ec80c1..64a5ea9 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -13,7 +13,14 @@ Required properties:
- clocks: The input clock of the USART instance
Optional properties:
-- pinctrl: The reference on the pins configuration
+- pinctrl-names: Set to "default". An additional "sleep" state can be defined
+ to set pins in sleep state when in low power. In case the device is used as
+ a wakeup source, "idle" state is defined in order to keep RX pin active.
+ For a console device, an optional state "no_console_suspend" can be defined
+ to enable console messages during suspend. Typically, "no_console_suspend" and
+ "default" states can refer to the same pin configuration.
+- pinctrl-n: Phandle(s) pointing to pin configuration nodes.
+ For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
- st,hw-flow-ctrl: bool flag to enable hardware flow control.
- rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low,
linux,rs485-enabled-at-boot-time: see rs485.txt.
@@ -31,8 +38,11 @@ usart4: serial@40004c00 {
reg = <0x40004c00 0x400>;
interrupts = <52>;
clocks = <&clk_pclk1>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep", "idle", "no_console_suspend";
pinctrl-0 = <&pinctrl_usart4>;
+ pinctrl-1 = <&pinctrl_usart4_sleep>;
+ pinctrl-2 = <&pinctrl_usart4_idle>;
+ pinctrl-3 = <&pinctrl_usart4>;
};
usart2: serial@40004400 {
--
1.9.1
^ permalink raw reply related
* [PATCH 03/10] serial: stm32: select pinctrl state in each suspend/resume function
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: devicetree, linux-kernel, Erwan Le Ray, linux-serial, Bich Hemon,
Fabrice Gasnier, linux-stm32, linux-arm-kernel
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
From: Bich Hemon <bich.hemon@st.com>
Select either pinctrl sleep state in suspend function or default state in
resume function.
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index e8d7a7b..8a7c582 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -1223,6 +1223,8 @@ static int stm32_serial_suspend(struct device *dev)
else
stm32_serial_enable_wakeup(port, false);
+ pinctrl_pm_select_sleep_state(dev);
+
return 0;
}
@@ -1230,6 +1232,8 @@ static int stm32_serial_resume(struct device *dev)
{
struct uart_port *port = dev_get_drvdata(dev);
+ pinctrl_pm_select_default_state(dev);
+
if (device_may_wakeup(dev))
stm32_serial_enable_wakeup(port, false);
--
1.9.1
^ permalink raw reply related
* [PATCH 04/10] serial: stm32: add pm_runtime support
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Erwan Le Ray, Fabrice Gasnier, Bich Hemon
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
Use pm_runtime for clock management.
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 8a7c582..05d2ef6 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -765,13 +765,13 @@ static void stm32_pm(struct uart_port *port, unsigned int state,
switch (state) {
case UART_PM_STATE_ON:
- clk_prepare_enable(stm32port->clk);
+ pm_runtime_get_sync(port->dev);
break;
case UART_PM_STATE_OFF:
spin_lock_irqsave(&port->lock, flags);
stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
spin_unlock_irqrestore(&port->lock, flags);
- clk_disable_unprepare(stm32port->clk);
+ pm_runtime_put_sync(port->dev);
break;
}
}
@@ -1040,6 +1040,11 @@ static int stm32_serial_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, &stm32port->port);
+ pm_runtime_get_noresume(&pdev->dev);
+ pm_runtime_set_active(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_put_sync(&pdev->dev);
+
return 0;
err_nowup:
@@ -1058,6 +1063,9 @@ static int stm32_serial_remove(struct platform_device *pdev)
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
struct stm32_usart_config *cfg = &stm32_port->info->cfg;
+ int err;
+
+ pm_runtime_get_sync(&pdev->dev);
stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
@@ -1084,7 +1092,12 @@ static int stm32_serial_remove(struct platform_device *pdev)
clk_disable_unprepare(stm32_port->clk);
- return uart_remove_one_port(&stm32_usart_driver, port);
+ err = uart_remove_one_port(&stm32_usart_driver, port);
+
+ pm_runtime_disable(&pdev->dev);
+ pm_runtime_put_noidle(&pdev->dev);
+
+ return err;
}
@@ -1241,7 +1254,29 @@ static int stm32_serial_resume(struct device *dev)
}
#endif /* CONFIG_PM_SLEEP */
+static int __maybe_unused stm32_serial_runtime_suspend(struct device *dev)
+{
+ struct uart_port *port = dev_get_drvdata(dev);
+ struct stm32_port *stm32port = container_of(port,
+ struct stm32_port, port);
+
+ clk_disable_unprepare(stm32port->clk);
+
+ return 0;
+}
+
+static int __maybe_unused stm32_serial_runtime_resume(struct device *dev)
+{
+ struct uart_port *port = dev_get_drvdata(dev);
+ struct stm32_port *stm32port = container_of(port,
+ struct stm32_port, port);
+
+ return clk_prepare_enable(stm32port->clk);
+}
+
static const struct dev_pm_ops stm32_serial_pm_ops = {
+ SET_RUNTIME_PM_OPS(stm32_serial_runtime_suspend,
+ stm32_serial_runtime_resume, NULL)
SET_SYSTEM_SLEEP_PM_OPS(stm32_serial_suspend, stm32_serial_resume)
};
--
1.9.1
^ permalink raw reply related
* [PATCH 05/10] serial: stm32: Use __maybe_unused instead of #if CONFIG_PM_SLEEP
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Erwan Le Ray, Fabrice Gasnier
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
Use __maybe_unused for power management related functionsinstead of
#if CONFIG_PM_SLEEP to simply the code.
fixes: 270e5a74fe4c ("serial: stm32: add wakeup mechanism")
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 05d2ef6..aa3da1c 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -1200,8 +1200,8 @@ static int stm32_console_setup(struct console *co, char *options)
.cons = STM32_SERIAL_CONSOLE,
};
-#ifdef CONFIG_PM_SLEEP
-static void stm32_serial_enable_wakeup(struct uart_port *port, bool enable)
+static void __maybe_unused stm32_serial_enable_wakeup(struct uart_port *port,
+ bool enable)
{
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
@@ -1225,7 +1225,7 @@ static void stm32_serial_enable_wakeup(struct uart_port *port, bool enable)
}
}
-static int stm32_serial_suspend(struct device *dev)
+static int __maybe_unused stm32_serial_suspend(struct device *dev)
{
struct uart_port *port = dev_get_drvdata(dev);
@@ -1241,7 +1241,7 @@ static int stm32_serial_suspend(struct device *dev)
return 0;
}
-static int stm32_serial_resume(struct device *dev)
+static int __maybe_unused stm32_serial_resume(struct device *dev)
{
struct uart_port *port = dev_get_drvdata(dev);
@@ -1252,7 +1252,6 @@ static int stm32_serial_resume(struct device *dev)
return uart_resume_port(&stm32_usart_driver, port);
}
-#endif /* CONFIG_PM_SLEEP */
static int __maybe_unused stm32_serial_runtime_suspend(struct device *dev)
{
--
1.9.1
^ permalink raw reply related
* [PATCH 06/10] serial: stm32: add support for no_console_suspend
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Erwan Le Ray, Fabrice Gasnier, Bich Hemon
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
In order to display console messages in low power mode, console pins
must be kept active after suspend call.
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index aa3da1c..573eae1 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -24,6 +24,8 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/devinfo.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/pm_wakeirq.h>
@@ -802,6 +804,7 @@ static int stm32_init_port(struct stm32_port *stm32port,
{
struct uart_port *port = &stm32port->port;
struct resource *res;
+ struct pinctrl *uart_pinctrl;
int ret;
port->iotype = UPIO_MEM;
@@ -816,6 +819,24 @@ static int stm32_init_port(struct stm32_port *stm32port,
stm32port->wakeirq = platform_get_irq(pdev, 1);
stm32port->fifoen = stm32port->info->cfg.has_fifo;
+ uart_pinctrl = devm_pinctrl_get(&pdev->dev);
+ if (IS_ERR(uart_pinctrl)) {
+ ret = PTR_ERR(uart_pinctrl);
+ if (ret != -ENODEV) {
+ dev_err(&pdev->dev, "Can't get pinctrl, error %d\n",
+ ret);
+ return ret;
+ }
+ stm32port->console_pins = ERR_PTR(-ENODEV);
+ } else {
+ stm32port->console_pins = pinctrl_lookup_state
+ (uart_pinctrl, "no_console_suspend");
+ }
+
+ if (IS_ERR(stm32port->console_pins) && PTR_ERR(stm32port->console_pins)
+ != -ENODEV)
+ return PTR_ERR(stm32port->console_pins);
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
port->membase = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(port->membase))
@@ -1228,6 +1249,7 @@ static void __maybe_unused stm32_serial_enable_wakeup(struct uart_port *port,
static int __maybe_unused stm32_serial_suspend(struct device *dev)
{
struct uart_port *port = dev_get_drvdata(dev);
+ struct stm32_port *stm32_port = to_stm32_port(port);
uart_suspend_port(&stm32_usart_driver, port);
@@ -1236,7 +1258,19 @@ static int __maybe_unused stm32_serial_suspend(struct device *dev)
else
stm32_serial_enable_wakeup(port, false);
- pinctrl_pm_select_sleep_state(dev);
+ if (uart_console(port) && !console_suspend_enabled) {
+ if (IS_ERR(stm32_port->console_pins)) {
+ dev_err(dev, "no_console_suspend pinctrl not found\n");
+ return PTR_ERR(stm32_port->console_pins);
+ }
+
+ pinctrl_select_state(dev->pins->p, stm32_port->console_pins);
+ } else {
+ if (device_may_wakeup(dev))
+ pinctrl_pm_select_idle_state(dev);
+ else
+ pinctrl_pm_select_sleep_state(dev);
+ }
return 0;
}
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 6f294e2..6957d50 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -261,6 +261,7 @@ struct stm32_port {
bool hw_flow_control;
bool fifoen;
int wakeirq;
+ struct pinctrl_state *console_pins;
};
static struct stm32_port stm32_ports[STM32_MAX_PORTS];
--
1.9.1
^ permalink raw reply related
* [PATCH 07/10] ARM: dts: stm32: update uart4 pin configurations for low power
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: devicetree, linux-kernel, Erwan Le Ray, linux-serial, Bich Hemon,
Fabrice Gasnier, linux-stm32, linux-arm-kernel
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
Currently, pinctrl states defines only one "sleep" configuration for pins,
no matter the possible uart low power modes (Rx pin always kept active).
Sleep pin configuration is refined for low power modes:
- "sleep" (no wakeup & console suspend enabled): put pins in analog state
to optimize power
- "idle" (wakeup capability): keep Rx pin in alternate function
- "default" state remains untouched, to be used while the UART is active
or in case the no_console_suspend mode is enabled
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 85c417d..2e1ab1b 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -599,6 +599,23 @@
bias-disable;
};
};
+
+ uart4_idle_pins_a: uart4-idle-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+ bias-disable;
+ };
+ };
+
+ uart4_sleep_pins_a: uart4-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
+ <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
+ };
+ };
};
pinctrl_z: pin-controller-z@54004000 {
--
1.9.1
^ permalink raw reply related
* [PATCH 08/10] ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: devicetree, linux-kernel, Erwan Le Ray, linux-serial, Bich Hemon,
Fabrice Gasnier, linux-stm32, linux-arm-kernel
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
From: Bich Hemon <bich.hemon@st.com>
Add idle and no_console_suspend states to uart4 pin configuration
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 62a8c78..34cc847 100644
--- a/arch/arm/boot/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts
@@ -251,8 +251,11 @@
};
&uart4 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep", "idle", "no_console_suspend";
pinctrl-0 = <&uart4_pins_a>;
+ pinctrl-1 = <&uart4_sleep_pins_a>;
+ pinctrl-2 = <&uart4_idle_pins_a>;
+ pinctrl-3 = <&uart4_pins_a>;
status = "okay";
};
--
1.9.1
^ permalink raw reply related
* [PATCH 09/10] ARM: dts: stm32: Update UART4 pin states on stm32mp157a-dk1
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Erwan Le Ray, Fabrice Gasnier, Bich Hemon
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
From: Bich Hemon <bich.hemon@st.com>
Add idle and no_console_suspend states to uart4 pin configuration.
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index 098dbfb..b851f80 100644
--- a/arch/arm/boot/dts/stm32mp157a-dk1.dts
+++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts
@@ -244,7 +244,10 @@
};
&uart4 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep", "idle", "no_console_suspend";
pinctrl-0 = <&uart4_pins_a>;
+ pinctrl-1 = <&uart4_sleep_pins_a>;
+ pinctrl-2 = <&uart4_idle_pins_a>;
+ pinctrl-3 = <&uart4_pins_a>;
status = "okay";
};
--
1.9.1
^ permalink raw reply related
* [PATCH 10/10] ARM: dts: stm32: add wakeup capability on each usart/uart on stm32mp157c
From: Erwan Le Ray @ 2019-06-04 8:55 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Erwan Le Ray, Fabrice Gasnier
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
- Mark all usart/uart devices as wakeup source.
- Identify all dedicated interrupts with a specific interrupt name (either
"event" or "wakeup").
- add interrupts-extended wakeup interrupt
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 2afeee6..de5b1bf 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -395,32 +395,44 @@
usart2: serial@4000e000 {
compatible = "st,stm32h7-uart";
reg = <0x4000e000 0x400>;
- interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 27 1>;
clocks = <&rcc USART2_K>;
+ wakeup-source;
status = "disabled";
};
usart3: serial@4000f000 {
compatible = "st,stm32h7-uart";
reg = <0x4000f000 0x400>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 28 1>;
clocks = <&rcc USART3_K>;
+ wakeup-source;
status = "disabled";
};
uart4: serial@40010000 {
compatible = "st,stm32h7-uart";
reg = <0x40010000 0x400>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 30 1>;
clocks = <&rcc UART4_K>;
+ wakeup-source;
status = "disabled";
};
uart5: serial@40011000 {
compatible = "st,stm32h7-uart";
reg = <0x40011000 0x400>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 31 1>;
clocks = <&rcc UART5_K>;
+ wakeup-source;
status = "disabled";
};
@@ -512,16 +524,22 @@
uart7: serial@40018000 {
compatible = "st,stm32h7-uart";
reg = <0x40018000 0x400>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 32 1>;
clocks = <&rcc UART7_K>;
+ wakeup-source;
status = "disabled";
};
uart8: serial@40019000 {
compatible = "st,stm32h7-uart";
reg = <0x40019000 0x400>;
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 33 1>;
clocks = <&rcc UART8_K>;
+ wakeup-source;
status = "disabled";
};
@@ -588,8 +606,11 @@
usart6: serial@44003000 {
compatible = "st,stm32h7-uart";
reg = <0x44003000 0x400>;
- interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 29 1>;
clocks = <&rcc USART6_K>;
+ wakeup-source;
status = "disabled";
};
@@ -1201,8 +1222,11 @@
usart1: serial@5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 26 1>;
clocks = <&rcc USART1_K>;
+ wakeup-source;
status = "disabled";
};
--
1.9.1
^ permalink raw reply related
* [PATCH] serial: stm32: fix a recursive locking in stm32_config_rs485
From: Borut Seljak @ 2019-06-04 9:54 UTC (permalink / raw)
Cc: Maxime Coquelin, Alexandre Torgue, Greg Kroah-Hartman,
linux-kernel, borut.seljak, linux-serial, Jiri Slaby, linux-stm32,
linux-arm-kernel
Remove spin_lock_irqsave in stm32_config_rs485, it cause recursive locking.
Already locked in uart_set_rs485_config.
Signed-off-by: Borut Seljak <borut.seljak@t-2.net>
---
drivers/tty/serial/stm32-usart.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index e8d7a7bb4339..da373a465f51 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -107,7 +107,6 @@ static int stm32_config_rs485(struct uart_port *port,
bool over8;
unsigned long flags;
- spin_lock_irqsave(&port->lock, flags);
stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
port->rs485 = *rs485conf;
@@ -147,7 +146,6 @@ static int stm32_config_rs485(struct uart_port *port,
}
stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
- spin_unlock_irqrestore(&port->lock, flags);
return 0;
}
--
2.17.1
^ permalink raw reply related
* Re: [PATCH v2] serial: sa1100: add note about modem control signals
From: Russell King - ARM Linux admin @ 2019-06-04 11:16 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Greg Kroah-Hartman, linux-arm-kernel, linux-serial, Jiri Slaby
In-Reply-To: <20190531212702.cmqbaqwdybgkb3ug@pengutronix.de>
On Fri, May 31, 2019 at 11:27:02PM +0200, Uwe Kleine-König wrote:
> Hello Russell,
>
> On Fri, May 31, 2019 at 05:01:42PM +0100, Russell King wrote:
> > As suggested by Uwe, add a note indicating that the modem control
> > signals do not support interrupts, which precludes the driver from
> > using mctrl_gpio_init().
> >
> > Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> > ---
> > drivers/tty/serial/sa1100.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c
> > index 97bdfeccbea9..8e618129e65c 100644
> > --- a/drivers/tty/serial/sa1100.c
> > +++ b/drivers/tty/serial/sa1100.c
> > @@ -860,6 +860,10 @@ static int sa1100_serial_resume(struct platform_device *dev)
> > static int sa1100_serial_add_one_port(struct sa1100_port *sport, struct platform_device *dev)
> > {
> > sport->port.dev = &dev->dev;
> > +
> > + // mctrl_gpio_init() requires that the GPIO driver supports interrupts,
> > + // but we need to support GPIO drivers for hardware that has no such
> > + // interrupts. Use mctrl_gpio_init_noauto() instead.
>
> I hope it's not an impostor who claimed to be Linus to spread deviance
> from K&R :-)
>
> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
>
> If you want to, squash this in the commit that introduced
> mctrl_gpio_init_noauto while keeping my Ack on the resulting patch.
I'd prefer to keep it separate to avoid invalidating the acks that I
already have on the first patch.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
^ permalink raw reply
* Re: Fwd: [PATCH] serial: stm32: fix a recursive locking in stm32_config_rs485
From: Erwan LE RAY @ 2019-06-04 13:41 UTC (permalink / raw)
To: Borut Seljak, Maxime Coquelin, Alexandre TORGUE,
Greg Kroah-Hartman, linux-kernel@vger.kernel.org,
linux-serial@vger.kernel.org, Jiri Slaby,
linux-stm32@st-md-mailman.stormreply.com,
"; linux-arm-kernel"@lists.infradead.org
In-Reply-To: <f2a264ac-e334-63b7-18c9-e45cde7bdf95@st.com>
Hi Borut,
Please add the following line in the commit message (before your
sign-off) in a V2 of your patch:
fixes: 1bcda09d291081 ("serial: stm32: add support for RS485 hardware
control mode")
I'm OK with the patch itself.
Erwan.
Subject: [PATCH] serial: stm32: fix a recursive locking in
> stm32_config_rs485
> Date: Tue, 4 Jun 2019 11:54:51 +0200
> From: Borut Seljak <borut.seljak@t-2.net>
> CC: Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue
> <alexandre.torgue@st.com>, Greg Kroah-Hartman
> <gregkh@linuxfoundation.org>, linux-kernel@vger.kernel.org,
> borut.seljak@t-2.net, linux-serial@vger.kernel.org, Jiri Slaby
> <jslaby@suse.com>, linux-stm32@st-md-mailman.stormreply.com,
> linux-arm-kernel@lists.infradead.org
>
> Remove spin_lock_irqsave in stm32_config_rs485, it cause recursive locking.
> Already locked in uart_set_rs485_config.
>
> Signed-off-by: Borut Seljak <borut.seljak@t-2.net>
> ---
> drivers/tty/serial/stm32-usart.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/tty/serial/stm32-usart.c
> b/drivers/tty/serial/stm32-usart.c
> index e8d7a7bb4339..da373a465f51 100644
> --- a/drivers/tty/serial/stm32-usart.c
> +++ b/drivers/tty/serial/stm32-usart.c
> @@ -107,7 +107,6 @@ static int stm32_config_rs485(struct uart_port *port,
> bool over8;
> unsigned long flags;
> - spin_lock_irqsave(&port->lock, flags);
> stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
> port->rs485 = *rs485conf;
> @@ -147,7 +146,6 @@ static int stm32_config_rs485(struct uart_port *port,
> }
> stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
> - spin_unlock_irqrestore(&port->lock, flags);
> return 0;
> }
^ permalink raw reply
* Re: Fwd: [PATCH] serial: stm32: fix a recursive locking in stm32_config_rs485
From: Erwan LE RAY @ 2019-06-04 13:55 UTC (permalink / raw)
To: Borut Seljak, Maxime Coquelin, Alexandre TORGUE,
Greg Kroah-Hartman, linux-kernel@vger.kernel.org,
linux-serial@vger.kernel.org, Jiri Slaby,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <41dddd5f-5c1c-3346-890a-8018f26ebd49@st.com>
> Hi Borut,
>
> Please add the following line in the commit message (before your
> sign-off) in a V2 of your patch:
>
> fixes: 1bcda09d291081 ("serial: stm32: add support for RS485 hardware
> control mode")
>
> I'm OK with the patch itself.
>
> Erwan.
>
>
> Subject: [PATCH] serial: stm32: fix a recursive locking in
>> stm32_config_rs485
>> Date: Tue, 4 Jun 2019 11:54:51 +0200
>> From: Borut Seljak <borut.seljak@t-2.net>
>> CC: Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue
>> <alexandre.torgue@st.com>, Greg Kroah-Hartman
>> <gregkh@linuxfoundation.org>, linux-kernel@vger.kernel.org,
>> borut.seljak@t-2.net, linux-serial@vger.kernel.org, Jiri Slaby
>> <jslaby@suse.com>, linux-stm32@st-md-mailman.stormreply.com,
>> linux-arm-kernel@lists.infradead.org
>>
>> Remove spin_lock_irqsave in stm32_config_rs485, it cause recursive
>> locking.
>> Already locked in uart_set_rs485_config.
>>
>> Signed-off-by: Borut Seljak <borut.seljak@t-2.net>
>> ---
>> drivers/tty/serial/stm32-usart.c | 2 --
>> 1 file changed, 2 deletions(-)
>>
>> diff --git a/drivers/tty/serial/stm32-usart.c
>> b/drivers/tty/serial/stm32-usart.c
>> index e8d7a7bb4339..da373a465f51 100644
>> --- a/drivers/tty/serial/stm32-usart.c
>> +++ b/drivers/tty/serial/stm32-usart.c
>> @@ -107,7 +107,6 @@ static int stm32_config_rs485(struct uart_port
>> *port,
>> bool over8;
>> unsigned long flags;
>> - spin_lock_irqsave(&port->lock, flags);
>> stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
>> port->rs485 = *rs485conf;
>> @@ -147,7 +146,6 @@ static int stm32_config_rs485(struct uart_port
>> *port,
>> }
>> stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
>> - spin_unlock_irqrestore(&port->lock, flags);
>> return 0;
>> }
^ permalink raw reply
* [PATCH v2] serial: stm32: fix a recursive locking in stm32_config_rs485
From: Borut Seljak @ 2019-06-04 16:14 UTC (permalink / raw)
To: borut.seljak
Cc: Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin, Alexandre Torgue,
linux-serial, linux-stm32, linux-arm-kernel, linux-kernel
In-Reply-To: <20190604095452.6360-1-borut.seljak@t-2.net>
Remove spin_lock_irqsave in stm32_config_rs485, it cause recursive locking.
Already locked in uart_set_rs485_config.
fixes: 1bcda09d291081 ("serial: stm32: add support for RS485 hardware control mode")
Signed-off-by: Borut Seljak <borut.seljak@t-2.net>
---
drivers/tty/serial/stm32-usart.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index e8d7a7bb4339..da373a465f51 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -107,7 +107,6 @@ static int stm32_config_rs485(struct uart_port *port,
bool over8;
unsigned long flags;
- spin_lock_irqsave(&port->lock, flags);
stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
port->rs485 = *rs485conf;
@@ -147,7 +146,6 @@ static int stm32_config_rs485(struct uart_port *port,
}
stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
- spin_unlock_irqrestore(&port->lock, flags);
return 0;
}
--
2.17.1
^ permalink raw reply related
* Re: [PATCH 1/2 v4] serial: mctrl_gpio: Check if GPIO property exisits before requesting it
From: Andy Shevchenko @ 2019-06-04 16:45 UTC (permalink / raw)
To: Stefan Roese
Cc: linux-serial, linux-kernel, Mika Westerberg, Yegor Yefremov,
Greg Kroah-Hartman, Giulio Benetti, Johan Hovold
In-Reply-To: <20190603083332.12480-1-sr@denx.de>
On Mon, Jun 03, 2019 at 10:33:31AM +0200, Stefan Roese wrote:
> This patch adds a check for the GPIOs property existence, before the
> GPIO is requested. This fixes an issue seen when the 8250 mctrl_gpio
> support is added (2nd patch in this patch series) on x86 platforms using
> ACPI.
> for (i = 0; i < UART_GPIO_MAX; i++) {
> enum gpiod_flags flags;
> + char *gpio_str;
> +
> + /* Check if GPIO property exists and continue if not */
> + gpio_str = kasprintf(GFP_KERNEL, "%s-gpios",
> + mctrl_gpios_desc[i].name);
> + if (!device_property_present(dev, gpio_str)) {
> + kfree(gpio_str);
> + continue;
> + }
> + kfree(gpio_str);
Can we rather do something like
bool present;
... = kasprintf(...);
// (1)
present = device_property_present(...);
kfree(...);
if (!present)
continue;
?
On top of this, if gpio_str is NULL, we will have KABOOM.
Something like
if (!gpio_str)
continue;
in (1).
>
> if (mctrl_gpios_desc[i].dir_out)
> flags = GPIOD_OUT_LOW;
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH 2/2 v4] tty/serial/8250: use mctrl_gpio helpers
From: Andy Shevchenko @ 2019-06-04 16:52 UTC (permalink / raw)
To: Stefan Roese
Cc: linux-serial, linux-kernel, Yegor Yefremov, Mika Westerberg,
Giulio Benetti, Greg Kroah-Hartman, Johan Hovold
In-Reply-To: <20190603083332.12480-2-sr@denx.de>
On Mon, Jun 03, 2019 at 10:33:32AM +0200, Stefan Roese wrote:
> From: Yegor Yefremov <yegorslists@googlemail.com>
>
> This patch permits the usage for GPIOs to control
> the CTS/RTS/DTR/DSR/DCD/RI signals.
> + if (up->gpios) {
> + mctrl_gpio_set(up->gpios, mctrl_gpio);
> + }
...
> + if (up->gpios) {
> + mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
> + }
...
> + gpios = mctrl_gpio_init(&uart->port, 0);
> + if (IS_ERR(gpios)) {
> + if (PTR_ERR(gpios) != -ENOSYS)
> + return PTR_ERR(gpios);
> + }
...
> + if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(up->gpios,
> + UART_GPIO_RTS))) {
> + }
...
> - if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) {
> + if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW
> + && IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(up->gpios,
> + UART_GPIO_RTS))) {
> }
...
> + if (up->gpios)
> + mctrl_gpio_disable_ms(up->gpios);
...
> + if (up->gpios)
> + mctrl_gpio_enable_ms(up->gpios);
...
> + if (up->gpios)
> + return mctrl_gpio_get(up->gpios, &ret);
Can we rather make this mimic the gpiod_get_optional() API?
So, if we get an error, it's an error, otherwise with NULL pointer the
operations goes to be no-op.
[IS_ERR_OR_NULL() -> IS_ERR(), if (up->gpios) -> /dev/null, etc]
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH 2/2 v4] tty/serial/8250: use mctrl_gpio helpers
From: Stefan Roese @ 2019-06-05 9:35 UTC (permalink / raw)
To: Andy Shevchenko
Cc: linux-serial, linux-kernel, Yegor Yefremov, Mika Westerberg,
Giulio Benetti, Greg Kroah-Hartman, Johan Hovold
In-Reply-To: <20190604165224.GP9224@smile.fi.intel.com>
On 04.06.19 18:52, Andy Shevchenko wrote:
> On Mon, Jun 03, 2019 at 10:33:32AM +0200, Stefan Roese wrote:
>> From: Yegor Yefremov <yegorslists@googlemail.com>
>>
>> This patch permits the usage for GPIOs to control
>> the CTS/RTS/DTR/DSR/DCD/RI signals.
>
>> + if (up->gpios) {
>
>> + mctrl_gpio_set(up->gpios, mctrl_gpio);
>> + }
>
> ...
>
>> + if (up->gpios) {
>
>> + mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
>
>> + }
>
> ...
>
>> + gpios = mctrl_gpio_init(&uart->port, 0);
>> + if (IS_ERR(gpios)) {
>> + if (PTR_ERR(gpios) != -ENOSYS)
>> + return PTR_ERR(gpios);
>> + }
>
> ...
>
>> + if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(up->gpios,
>> + UART_GPIO_RTS))) {
>
>> + }
>
> ...
>
>> - if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) {
>> + if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW
>> + && IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(up->gpios,
>> + UART_GPIO_RTS))) {
>
>> }
>
> ...
>
>> + if (up->gpios)
>> + mctrl_gpio_disable_ms(up->gpios);
>
> ...
>
>> + if (up->gpios)
>> + mctrl_gpio_enable_ms(up->gpios);
>
> ...
>
>> + if (up->gpios)
>> + return mctrl_gpio_get(up->gpios, &ret);
>
>
> Can we rather make this mimic the gpiod_get_optional() API?
>
> So, if we get an error, it's an error, otherwise with NULL pointer the
> operations goes to be no-op.
>
> [IS_ERR_OR_NULL() -> IS_ERR(), if (up->gpios) -> /dev/null, etc]
So you want me to drop all "if (up->gpios)" checks? I can do this in
some cases (e.g. serial8250_disable_ms()). But I would like to keep
it in other cases, like serial8250_out_MCR(), where this check prevents
some unnecessary code execution in the "non-gpios mode" (and vice-versa).
Would this be acceptable?
BTW: Regarding the OMAP specific code: I'm not the author of this code
and I don't have access to such hardware to do some tests here. But
changing IS_ERR_OR_NULL() -> IS_ERR() in this OMAP code does not
seem correct. IIUTC, these "if" clauses are extended here by
IS_ERR_OR_NULL(mctrl_gpio_to_gpiod()) to check if the GPIO's are not
enabled / used. Currently this will probably break, since when called
with "gpios == NULL", mctrl_gpio_to_gpiod() will crash [1].
If you don't object (or have other suggestions), I'll change this to
use "up->gpios == 0" instead. This seems to be what the original author
wanted to achieve.
Okay?
Thanks,
Stefan
[1]
struct gpio_desc *mctrl_gpio_to_gpiod(struct mctrl_gpios *gpios,
enum mctrl_gpio_idx gidx)
{
return gpios->gpio[gidx];
}
^ permalink raw reply
* Re: Fwd: [PATCH -next] serial: stm32: Make stm32_get_databits static
From: Erwan LE RAY @ 2019-06-05 9:52 UTC (permalink / raw)
To: YueHaibing, gregkh@linuxfoundation.org, jslaby@suse.com,
mcoquelin.stm32@gmail.com, Alexandre TORGUE
In-Reply-To: <e7a74cb7-fd9f-89d2-8314-5e216eae2d13@st.com>
OK for me.
Erwan.
On 6/5/19 9:08 AM, Fabrice Gasnier wrote:
> Un autre qu'on avait pas vu...
>
>
> -------- Forwarded Message --------
> Subject: [PATCH -next] serial: stm32: Make stm32_get_databits static
> Date: Tue, 28 May 2019 17:04:49 +0800
> From: YueHaibing <yuehaibing@huawei.com>
> To: gregkh@linuxfoundation.org, jslaby@suse.com,
> mcoquelin.stm32@gmail.com, alexandre.torgue@st.com
> CC: YueHaibing <yuehaibing@huawei.com>, linux-serial@vger.kernel.org,
> linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
> linux-stm32@st-md-mailman.stormreply.com
>
> Fix sparse warning:
>
> drivers/tty/serial/stm32-usart.c:603:14: warning:
> symbol 'stm32_get_databits' was not declared. Should it be static?
>
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
> ---
> drivers/tty/serial/stm32-usart.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/stm32-usart.c
> b/drivers/tty/serial/stm32-usart.c
> index 9c2b04e..4517f2b 100644
> --- a/drivers/tty/serial/stm32-usart.c
> +++ b/drivers/tty/serial/stm32-usart.c
> @@ -600,7 +600,7 @@ static void stm32_shutdown(struct uart_port *port)
> free_irq(port->irq, port);
> }
> -unsigned int stm32_get_databits(struct ktermios *termios)
> +static unsigned int stm32_get_databits(struct ktermios *termios)
> {
> unsigned int bits;
> -- 2.7.4
>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [patch 0/5] *** Cover Letter: patch submission for AST2500 UART driver ***
From: sudheer.v @ 2019-06-05 12:23 UTC (permalink / raw)
To: gregkh, mchehab+samsung, jslaby, joel, andrew, benh, robh+dt,
mark.rutland, shivahshankar.shankarnarayanrao, sudheer.veliseti
Cc: devicetree, linux-aspeed, linux-serial, linux-arm-kernel,
sudheer Kumar veliseti
From: sudheer Kumar veliseti <sudheer.open@gmail.com>
Hi,
The below mentioned patches are for AST2500 UART driver.
AST2500 has dedicated Uart DMA controller which has 12 sets of
Tx and RX channels connected to UART controller directly.
Since the DMA controller have dedicated buffers and registers,
there would be little benifit in adding DMA framework overhead.
So the software for DMA controller is included within the UART driver itself.
Thanks and Regards
Sudheer.V
sudheer veliseti (5):
AST2500 DMA UART driver
build configuration for AST2500 DMA UART driver
DT nodes for AST2500 DMA UART driver
defconfig and MAINTAINERS updated for AST2500 DMA UART driver
Documentation: DT bindings AST2500 DMA UART driver
.../bindings/serial/ast2500-dma-uart.txt | 40 +
MAINTAINERS | 13 +
arch/arm/boot/dts/aspeed-ast2500-evb.dts | 21 +
arch/arm/boot/dts/aspeed-g5.dtsi | 71 +-
arch/arm/configs/aspeed_g5_defconfig | 1 +
.../tty/serial/8250/8250_ast2500_uart_dma.c | 1928 +++++++++++++++++
drivers/tty/serial/8250/Kconfig | 35 +-
drivers/tty/serial/8250/Makefile | 1 +
8 files changed, 2105 insertions(+), 5 deletions(-)
create mode 100644 Documentation/devicetree/bindings/serial/ast2500-dma-uart.txt
create mode 100644 drivers/tty/serial/8250/8250_ast2500_uart_dma.c
--
2.17.1
^ permalink raw reply
* [patch 1/5] AST2500 DMA UART driver
From: sudheer.v @ 2019-06-05 12:23 UTC (permalink / raw)
To: gregkh, mchehab+samsung, jslaby, joel, andrew, benh, robh+dt,
mark.rutland, shivahshankar.shankarnarayanrao, sudheer.veliseti
Cc: devicetree, linux-aspeed, linux-serial, linux-arm-kernel,
sudheer Kumar veliseti
In-Reply-To: <1559737395-28542-1-git-send-email-open.sudheer@gmail.com>
From: sudheer Kumar veliseti <sudheer.open@gmail.com>
Signed-off-by: sudheer veliseti <sudheer.open@gmail.com>
---
.../tty/serial/8250/8250_ast2500_uart_dma.c | 1928 +++++++++++++++++
1 file changed, 1928 insertions(+)
create mode 100644 drivers/tty/serial/8250/8250_ast2500_uart_dma.c
diff --git a/drivers/tty/serial/8250/8250_ast2500_uart_dma.c b/drivers/tty/serial/8250/8250_ast2500_uart_dma.c
new file mode 100644
index 000000000000..6f3adcac9190
--- /dev/null
+++ b/drivers/tty/serial/8250/8250_ast2500_uart_dma.c
@@ -0,0 +1,1928 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DMA UART Driver for ASPEED BMC chip: AST2500
+ *
+ * Copyright (C) 2019 sudheer Kumar veliseti, Aspeed technology Inc.
+ * <open.sudheer@gmail.com>
+ *
+ */
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/mutex.h>
+#include <linux/nmi.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/serial.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+
+#include "8250.h"
+
+#define DMA_BUFF_SIZE 0x1000 // 4096
+#define SDMA_RX_BUFF_SIZE 0x10000 // 65536
+
+#define SDDMA_RX_FIX 1
+/* enum ast_uart_chan_op
+ * operation codes passed to the DMA code by the user, and also used
+ * to inform the current channel owner of any changes to the system state
+ */
+
+enum ast_uart_chan_op {
+ AST_UART_DMAOP_TRIGGER,
+ AST_UART_DMAOP_STOP,
+ AST_UART_DMAOP_PAUSE,
+};
+
+/* ast_uart_dma_cbfn_t * * buffer callback routine type */
+typedef void (*ast_uart_dma_cbfn_t)(void *dev_id, u16 len);
+
+struct ast_sdma_info {
+ u8 ch_no;
+ u8 direction;
+ u8 enable;
+ void *priv;
+ char *sdma_virt_addr;
+ dma_addr_t dma_phy_addr;
+ /* cdriver callbacks */
+ ast_uart_dma_cbfn_t callback_fn; /* buffer done callback */
+};
+
+#define AST_UART_SDMA_CH 12
+
+struct ast_sdma_ch {
+ struct ast_sdma_info tx_dma_info[AST_UART_SDMA_CH];
+ struct ast_sdma_info rx_dma_info[AST_UART_SDMA_CH];
+};
+
+struct ast_sdma {
+ void __iomem *reg_base;
+ int dma_irq;
+ struct ast_sdma_ch *dma_ch;
+ struct regmap *map;
+};
+
+
+
+#define UART_TX_SDMA_EN 0x00
+#define UART_RX_SDMA_EN 0x04
+#define UART_SDMA_CONF 0x08
+#define UART_SDMA_TIMER 0x0C
+#define UART_TX_SDMA_REST 0x20
+#define UART_RX_SDMA_REST 0x24
+#define UART_TX_SDMA_IER 0x30
+#define UART_TX_SDMA_ISR 0x34
+#define UART_RX_SDMA_IER 0x38
+#define UART_RX_SDMA_ISR 0x3C
+#define UART_TX_R_POINT(x) (0x40 + (x * 0x20))
+#define UART_TX_W_POINT(x) (0x44 + (x * 0x20))
+#define UART_TX_SDMA_ADDR(x) (0x48 + (x * 0x20))
+#define UART_RX_R_POINT(x) (0x50 + (x * 0x20))
+#define UART_RX_W_POINT(x) (0x54 + (x * 0x20))
+#define UART_RX_SDMA_ADDR(x) (0x58 + (x * 0x20))
+
+/* UART_TX_SDMA_EN-0x00 : UART TX DMA Enable */
+/* UART_RX_SDMA_EN-0x04 : UART RX DMA Enable */
+#define SDMA_CH_EN(x) (0x1 << (x))
+
+/* UART_SDMA_CONF - 0x08 : Misc, Buffer size */
+#define SDMA_TX_BUFF_SIZE_MASK (0x3)
+#define SDMA_SET_TX_BUFF_SIZE(x) (x)
+#define SDMA_BUFF_SIZE_1KB (0x0)
+#define SDMA_BUFF_SIZE_4KB (0x1)
+#define SDMA_BUFF_SIZE_16KB (0x2)
+#define SDMA_BUFF_SIZE_64KB (0x3)
+#define SDMA_RX_BUFF_SIZE_MASK (0x3 << 2)
+#define SDMA_SET_RX_BUFF_SIZE(x) (x << 2)
+#define SDMA_TIMEOUT_DIS (0x1 << 4)
+
+/* UART_SDMA_TIMER-0x0C : UART DMA time out timer */
+
+/* UART_TX_SDMA_IER 0x30 */
+/* UART_TX_SDMA_ISR 0x34 */
+
+#define UART_SDMA11_INT (1 << 11)
+#define UART_SDMA10_INT (1 << 10)
+#define UART_SDMA9_INT (1 << 9)
+#define UART_SDMA8_INT (1 << 8)
+#define UART_SDMA7_INT (1 << 7)
+#define UART_SDMA6_INT (1 << 6)
+#define UART_SDMA5_INT (1 << 5)
+#define UART_SDMA4_INT (1 << 4)
+#define UART_SDMA3_INT (1 << 3)
+#define UART_SDMA2_INT (1 << 2)
+#define UART_SDMA1_INT (1 << 1)
+#define UART_SDMA0_INT (1 << 0)
+
+
+#define CONFIG_UART_DMA_DEBUG
+
+#ifdef CONFIG_UART_DMA_DEBUG
+#define UART_DBG(fmt, args...) pr_debug("%s() " fmt, __func__, ## args)
+#else
+#define UART_DBG(fmt, args...)
+#endif
+
+#define CONFIG_UART_TX_DMA_DEBUG 1
+
+#ifdef CONFIG_UART_TX_DMA_DEBUG
+#define UART_TX_DBG(fmt, args...) pr_debug("%s()"fmt, __func__, ## args)
+#else
+#define UART_TX_DBG(fmt, args...)
+#endif
+
+/*
+ * Configuration:
+ * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
+ * is unsafe when used on edge-triggered interrupts.
+ */
+static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
+
+static unsigned int nr_uarts = CONFIG_AST_RUNTIME_DMA_UARTS;
+
+/*
+ * Debugging.
+ */
+#ifdef CONFIG_UART_DMA_DEBUG
+#define DEBUG_AUTOCONF(fmt...) UART_DBG(fmt)
+#else
+#define DEBUG_AUTOCONF(fmt...) \
+ do { \
+ } while (0)
+#endif
+
+#ifdef CONFIG_UART_DMA_DEBUG
+#define DEBUG_INTR(fmt...) UART_DBG(fmt)
+#else
+#define DEBUG_INTR(fmt...) \
+ do { \
+ } while (0)
+#endif
+
+#define PASS_LIMIT 256
+
+#include <asm/serial.h>
+
+#define UART_DMA_NR CONFIG_AST_NR_DMA_UARTS
+
+
+
+struct ast_uart_priv_data {
+
+ unsigned short line; //index of uart port
+ struct uart_8250_port *up;
+ u8 dma_ch; // dma channel number
+ struct circ_buf rx_dma_buf;
+ struct circ_buf tx_dma_buf;
+ dma_addr_t dma_rx_addr; /* Mapped ADMA descr. table */
+ dma_addr_t dma_tx_addr; /* Mapped ADMA descr. table */
+#ifdef SDDMA_RX_FIX
+ struct tasklet_struct rx_tasklet;
+#else
+ struct timer_list rx_timer;
+#endif
+ struct tasklet_struct tx_tasklet;
+ spinlock_t lock;
+ int tx_done;
+ int tx_count;
+};
+
+
+static inline struct uart_8250_port *
+to_uart_8250_port(struct uart_port *uart) {
+ return container_of(uart, struct uart_8250_port, port);
+}
+
+struct irq_info {
+ spinlock_t lock;
+ struct uart_8250_port *up;
+};
+
+static struct irq_info ast_uart_irq[1];
+static DEFINE_MUTEX(ast_uart_mutex);
+
+/*
+ * Here we define the default xmit fifo size used for each type of UART.
+ */
+static const struct serial8250_config uart_config[] = {
+ [PORT_UNKNOWN] = {
+ .name = "unknown",
+ .fifo_size = 1,
+ .tx_loadsz = 1,
+ },
+ [PORT_8250] = {
+ .name = "8250",
+ .fifo_size = 1,
+ .tx_loadsz = 1,
+ },
+ [PORT_16450] = {
+ .name = "16450",
+ .fifo_size = 1,
+ .tx_loadsz = 1,
+ },
+ [PORT_16550] = {
+ .name = "16550",
+ .fifo_size = 1,
+ .tx_loadsz = 1,
+ },
+ [PORT_16550A] = {
+ .name = "16550A",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10
+ | UART_FCR_DMA_SELECT,
+ .flags = UART_CAP_FIFO,
+ },
+};
+
+/* sane hardware needs no mapping */
+#define map_8250_in_reg(up, offset) (offset)
+#define map_8250_out_reg(up, offset) (offset)
+
+// SDMA - software Layer : ast-uart-sdma.c
+
+#define AST_UART_SDMA_DEBUG 1
+
+#ifdef AST_UART_SDMA_DEBUG
+#define SDMADBUG(fmt, args...) pr_debug("%s() " fmt, __func__, ## args)
+#else
+#define SDMADBUG(fmt, args...)
+#endif
+
+static inline void ast_uart_sdma_write(struct ast_sdma *sdma,
+ u32 val, u32 reg)
+{
+ // SDMADBUG("uart dma write : val: %x , reg : %x\n",val,reg);
+ writel(val, sdma->reg_base + reg);
+}
+
+static inline u32 ast_uart_sdma_read(struct ast_sdma *sdma, u32 reg)
+{
+ return readl(sdma->reg_base + reg);
+}
+
+struct ast_sdma ast_uart_sdma;
+
+int ast_uart_rx_sdma_enqueue(u8 ch, dma_addr_t rx_buff)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+
+ SDMADBUG("ch = %d, rx buff = %x\n", ch, rx_buff);
+
+ local_irq_save(flags);
+ ast_uart_sdma_write(sdma, rx_buff, UART_RX_SDMA_ADDR(ch));
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+int ast_uart_tx_sdma_enqueue(u8 ch, dma_addr_t tx_buff)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+
+ SDMADBUG("ch = %d, tx buff = %x\n", ch, tx_buff);
+
+ local_irq_save(flags);
+ ast_uart_sdma_write(sdma, tx_buff, UART_TX_SDMA_ADDR(ch));
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+int ast_uart_rx_sdma_ctrl(u8 ch, enum ast_uart_chan_op op)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+ struct ast_sdma_info *dma_ch = &(sdma->dma_ch->rx_dma_info[ch]);
+
+ SDMADBUG("RX DMA CTRL [ch %d]\n", ch);
+
+ local_irq_save(flags);
+
+ switch (op) {
+ case AST_UART_DMAOP_TRIGGER:
+ SDMADBUG("Trigger\n");
+ dma_ch->enable = 1;
+#ifdef SDDMA_RX_FIX
+#else
+ ast_uart_set_sdma_time_out(0xffff);
+#endif
+ // set enable
+ ast_uart_sdma_write(sdma,
+ ast_uart_sdma_read(sdma, UART_RX_SDMA_EN) | (0x1 << ch),
+ UART_RX_SDMA_EN);
+ break;
+ case AST_UART_DMAOP_STOP:
+ // disable engine
+ SDMADBUG("STOP\n");
+ dma_ch->enable = 0;
+ ast_uart_sdma_write(sdma, ast_uart_sdma_read(sdma, UART_RX_SDMA_EN) &
+ ~(0x1 << ch),
+ UART_RX_SDMA_EN);
+ // set reset
+ ast_uart_sdma_write(sdma, ast_uart_sdma_read(sdma, UART_RX_SDMA_REST) |
+ (0x1 << ch),
+ UART_RX_SDMA_REST);
+ ast_uart_sdma_write(sdma, ast_uart_sdma_read(sdma, UART_RX_SDMA_REST) &
+ ~(0x1 << ch),
+ UART_RX_SDMA_REST);
+
+ ast_uart_sdma_write(sdma, 0, UART_RX_R_POINT(ch));
+ ast_uart_sdma_write(sdma, dma_ch->dma_phy_addr, UART_RX_SDMA_ADDR(ch));
+ break;
+ case AST_UART_DMAOP_PAUSE:
+ // disable engine
+ dma_ch->enable = 0;
+ ast_uart_sdma_write(sdma, ast_uart_sdma_read(sdma, UART_RX_SDMA_EN) &
+ ~(0x1 << ch),
+ UART_RX_SDMA_EN);
+ break;
+ }
+
+ local_irq_restore(flags);
+ return 0;
+}
+
+int ast_uart_tx_sdma_ctrl(u8 ch, enum ast_uart_chan_op op)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+ struct ast_sdma_info *dma_ch = &(sdma->dma_ch->tx_dma_info[ch]);
+
+ SDMADBUG("TX DMA CTRL [ch %d]\n", ch);
+
+ local_irq_save(flags);
+
+ switch (op) {
+ case AST_UART_DMAOP_TRIGGER:
+ SDMADBUG("TRIGGER : Enable\n");
+ dma_ch->enable = 1;
+ // set enable
+ ast_uart_sdma_write(sdma,
+ ast_uart_sdma_read(sdma, UART_TX_SDMA_EN) | (0x1 << ch),
+ UART_TX_SDMA_EN);
+ break;
+ case AST_UART_DMAOP_STOP:
+ SDMADBUG("STOP : DISABLE & RESET\n");
+ dma_ch->enable = 0;
+ // disable engine
+ ast_uart_sdma_write(sdma, ast_uart_sdma_read(sdma, UART_TX_SDMA_EN) &
+ ~(0x1 << ch),
+ UART_TX_SDMA_EN);
+ // set reset
+ ast_uart_sdma_write(sdma, ast_uart_sdma_read(sdma, UART_TX_SDMA_REST) |
+ (0x1 << ch),
+ UART_TX_SDMA_REST);
+ ast_uart_sdma_write(sdma, ast_uart_sdma_read(sdma, UART_TX_SDMA_REST) &
+ ~(0x1 << ch),
+ UART_TX_SDMA_REST);
+
+ ast_uart_sdma_write(sdma, 0, UART_TX_W_POINT(ch));
+ break;
+ case AST_UART_DMAOP_PAUSE:
+ SDMADBUG("PAUSE : DISABLE\n");
+ dma_ch->enable = 0;
+ // disable engine
+ ast_uart_sdma_write(sdma, ast_uart_sdma_read(sdma, UART_TX_SDMA_EN) &
+ ~(0x1 << ch),
+ UART_TX_SDMA_EN);
+ }
+
+ local_irq_restore(flags);
+ return 0;
+}
+
+u32 ast_uart_get_tx_sdma_pt(u8 ch)
+{
+ struct ast_sdma *sdma = &ast_uart_sdma;
+
+ return ast_uart_sdma_read(sdma, UART_TX_R_POINT(ch));
+}
+
+int ast_uart_tx_sdma_update(u8 ch, u16 point)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+
+ SDMADBUG("TX DMA CTRL [ch %d] point %d\n", ch, point);
+ local_irq_save(flags);
+ ast_uart_sdma_write(sdma, point, UART_TX_W_POINT(ch));
+ local_irq_restore(flags);
+ return 0;
+}
+
+int ast_uart_tx_sdma_request(u8 ch, ast_uart_dma_cbfn_t rtn, void *id)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+ struct ast_sdma_info *dma_ch = &(sdma->dma_ch->tx_dma_info[ch]);
+
+ SDMADBUG("TX DMA REQUEST ch = %d\n", ch);
+
+ local_irq_save(flags);
+
+ if (dma_ch->enable) {
+ local_irq_restore(flags);
+ return -EBUSY;
+ }
+ dma_ch->priv = id;
+ dma_ch->callback_fn = rtn;
+
+ // DMA IRQ En
+ ast_uart_sdma_write(sdma,
+ ast_uart_sdma_read(sdma, UART_TX_SDMA_IER) | (1 << ch),
+ UART_TX_SDMA_IER);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+int ast_uart_rx_sdma_update(u8 ch, u16 point)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+
+ SDMADBUG("RX DMA CTRL [ch %d] point %x\n", ch, point);
+
+ local_irq_save(flags);
+ ast_uart_sdma_write(sdma, point, UART_RX_R_POINT(ch));
+ local_irq_restore(flags);
+ return 0;
+}
+
+#ifdef SDDMA_RX_FIX
+char *ast_uart_rx_sdma_request(u8 ch, ast_uart_dma_cbfn_t rtn, void *id)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+ struct ast_sdma_info *dma_ch = &(sdma->dma_ch->rx_dma_info[ch]);
+
+ SDMADBUG("RX DMA REQUEST ch = %d\n", ch);
+
+ local_irq_save(flags);
+
+ if (dma_ch->enable) {
+ local_irq_restore(flags);
+ return 0;
+ }
+ dma_ch->priv = id;
+
+ dma_ch->callback_fn = rtn;
+
+ // DMA IRQ En
+ ast_uart_sdma_write(sdma,
+ ast_uart_sdma_read(sdma, UART_RX_SDMA_IER) | (1 << ch),
+ UART_RX_SDMA_IER);
+
+ local_irq_restore(flags);
+
+ return dma_ch->sdma_virt_addr;
+}
+
+#else
+char *ast_uart_rx_sdma_request(u8 ch, void *id)
+{
+ unsigned long flags;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+ struct ast_sdma_info *dma_ch = &(sdma->dma_ch->rx_dma_info[ch]);
+
+ SDMADBUG("RX DMA REQUEST ch = %d\n", ch);
+
+ local_irq_save(flags);
+
+ if (dma_ch->enable) {
+ local_irq_restore(flags);
+ return -EBUSY;
+ }
+ dma_ch->priv = id;
+
+ local_irq_restore(flags);
+ return dma_ch->sdma_virt_addr;
+}
+#endif
+
+u16 ast_uart_get_rx_sdma_pt(u8 ch)
+{
+ struct ast_sdma *sdma = &ast_uart_sdma;
+
+ return ast_uart_sdma_read(sdma, UART_RX_W_POINT(ch));
+}
+
+void ast_uart_set_sdma_time_out(u16 val)
+{
+ struct ast_sdma *sdma = &ast_uart_sdma;
+
+ ast_uart_sdma_write(sdma, val, UART_SDMA_TIMER);
+}
+
+static inline void ast_sdma_bufffdone(struct ast_sdma_info *sdma_ch)
+{
+ u32 len;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+
+ if (sdma_ch->enable == 0) {
+ SDMADBUG("sdma Please check ch_no %x %s!!!!!\n",
+ sdma_ch->ch_no, sdma_ch->direction ? "TX" : "RX");
+ if (sdma_ch->direction) {
+ ast_uart_sdma_write(sdma,
+ ast_uart_sdma_read(sdma, UART_TX_SDMA_EN)
+ & ~(0x1 << sdma_ch->ch_no), UART_TX_SDMA_EN);
+ } else {
+ ast_uart_sdma_write(sdma,
+ ast_uart_sdma_read(sdma, UART_RX_SDMA_EN) &
+ ~(0x1 << sdma_ch->ch_no), UART_RX_SDMA_EN);
+ ast_uart_rx_sdma_update(sdma_ch->ch_no,
+ ast_uart_get_rx_sdma_pt(sdma_ch->ch_no));
+ SDMADBUG("OFFSET : UART_RX_SDMA_EN = %x\n ",
+ ast_uart_sdma_read(sdma, UART_RX_SDMA_EN));
+ }
+ return;
+ }
+
+ if (sdma_ch->direction) {
+ len = ast_uart_sdma_read(sdma, UART_TX_R_POINT(sdma_ch->ch_no));
+ SDMADBUG("tx rp %x , wp %x\n",
+ ast_uart_sdma_read(sdma, UART_TX_R_POINT(sdma_ch->ch_no)),
+ ast_uart_sdma_read(sdma, UART_TX_W_POINT(sdma_ch->ch_no))
+ );
+ } else {
+ SDMADBUG("rx rp %x , wp %x\n",
+ ast_uart_sdma_read(sdma, UART_RX_R_POINT(sdma_ch->ch_no)),
+ ast_uart_sdma_read(sdma, UART_RX_W_POINT(sdma_ch->ch_no))
+ );
+ len = ast_uart_sdma_read(sdma, UART_RX_W_POINT(sdma_ch->ch_no));
+ }
+
+ SDMADBUG("<dma dwn>: ch[%d] : %s ,len : %d\n", sdma_ch->ch_no,
+ sdma_ch->direction ? "tx" : "rx", len);
+
+ if (sdma_ch->callback_fn != NULL)
+ (sdma_ch->callback_fn)(sdma_ch->priv, len);
+}
+
+static irqreturn_t ast_uart_sdma_irq(int irq, void *dev_id)
+{
+ struct ast_sdma *sdma = (struct ast_sdma *)dev_id;
+
+ u32 tx_sts = ast_uart_sdma_read(sdma, UART_TX_SDMA_ISR);
+ u32 rx_sts = ast_uart_sdma_read(sdma, UART_RX_SDMA_ISR);
+
+ SDMADBUG("tx sts : %x, rx sts : %x\n", tx_sts, rx_sts);
+
+ if ((tx_sts == 0) && (rx_sts == 0)) {
+ SDMADBUG("SDMA IRQ ERROR !!!\n");
+ return IRQ_HANDLED;
+ }
+
+ if (rx_sts & UART_SDMA0_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA0_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[0]));
+ } else if (rx_sts & UART_SDMA1_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA1_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[1]));
+ } else if (rx_sts & UART_SDMA2_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA2_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[2]));
+ } else if (rx_sts & UART_SDMA3_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA3_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[3]));
+ } else if (rx_sts & UART_SDMA4_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA4_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[4]));
+ } else if (rx_sts & UART_SDMA5_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA5_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[5]));
+ } else if (rx_sts & UART_SDMA6_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA6_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[6]));
+ } else if (rx_sts & UART_SDMA7_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA7_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[7]));
+ } else if (rx_sts & UART_SDMA8_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA8_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[8]));
+ } else if (rx_sts & UART_SDMA9_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA9_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[9]));
+ } else if (rx_sts & UART_SDMA10_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA10_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[10]));
+ } else if (rx_sts & UART_SDMA11_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA11_INT, UART_RX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->rx_dma_info[11]));
+ } else {
+
+ }
+
+ if (tx_sts & UART_SDMA0_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA0_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[0]));
+ } else if (tx_sts & UART_SDMA1_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA1_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[1]));
+ } else if (tx_sts & UART_SDMA2_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA2_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[2]));
+ } else if (tx_sts & UART_SDMA3_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA3_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[3]));
+ } else if (tx_sts & UART_SDMA4_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA4_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[4]));
+ } else if (tx_sts & UART_SDMA5_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA5_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[5]));
+ } else if (tx_sts & UART_SDMA6_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA6_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[6]));
+ } else if (tx_sts & UART_SDMA7_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA7_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[7]));
+ } else if (tx_sts & UART_SDMA8_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA8_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[8]));
+ } else if (tx_sts & UART_SDMA9_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA9_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[9]));
+ } else if (tx_sts & UART_SDMA10_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA10_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[10]));
+ } else if (tx_sts & UART_SDMA11_INT) {
+ ast_uart_sdma_write(sdma, UART_SDMA11_INT, UART_TX_SDMA_ISR);
+ ast_sdma_bufffdone(&(sdma->dma_ch->tx_dma_info[11]));
+ } else {
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int ast_uart_sdma_probe(void)
+{
+ int i;
+ struct device_node *node;
+ int ret;
+ struct ast_sdma *sdma = &ast_uart_sdma;
+ char *rx_dma_virt_addr;
+ dma_addr_t rx_dma_phy_addr;
+
+ sdma->dma_ch = kzalloc(sizeof(struct ast_sdma_ch), GFP_KERNEL);
+ if (!sdma->dma_ch)
+ return -ENOMEM;
+
+ // sdma memory mapping
+ node = of_find_compatible_node(NULL, NULL, "aspeed,ast-uart-sdma");
+ if (!node)
+ return -ENODEV;
+
+ sdma->reg_base = of_iomap(node, 0);
+ if (IS_ERR(sdma->reg_base))
+ return PTR_ERR(sdma->map);
+ rx_dma_virt_addr = dma_alloc_coherent(NULL,
+ SDMA_RX_BUFF_SIZE * AST_UART_SDMA_CH, &rx_dma_phy_addr, GFP_KERNEL);
+
+ if (!rx_dma_virt_addr)
+ SDMADBUG(" rx_dma_virt_addr Errr : unable top alloc\n");
+
+ for (i = 0; i < AST_UART_SDMA_CH; i++) {
+ // TX ------------------------
+ sdma->dma_ch->tx_dma_info[i].enable = 0;
+ sdma->dma_ch->tx_dma_info[i].ch_no = i;
+ sdma->dma_ch->tx_dma_info[i].direction = 1;
+ ast_uart_sdma_write(sdma, 0, UART_TX_W_POINT(i));
+ // RX ------------------------
+ sdma->dma_ch->rx_dma_info[i].enable = 0;
+ sdma->dma_ch->rx_dma_info[i].ch_no = i;
+ sdma->dma_ch->rx_dma_info[i].direction = 0;
+ sdma->dma_ch->rx_dma_info[i].sdma_virt_addr =
+ rx_dma_virt_addr + (SDMA_RX_BUFF_SIZE * i);
+ sdma->dma_ch->rx_dma_info[i].dma_phy_addr =
+ rx_dma_phy_addr + (SDMA_RX_BUFF_SIZE * i);
+ ast_uart_sdma_write(sdma,
+ sdma->dma_ch->rx_dma_info[i].dma_phy_addr,
+ UART_RX_SDMA_ADDR(i));
+ ast_uart_sdma_write(sdma, 0, UART_RX_R_POINT(i));
+ }
+
+ ast_uart_sdma_write(sdma, 0xffffffff, UART_TX_SDMA_REST);
+ ast_uart_sdma_write(sdma, 0x0, UART_TX_SDMA_REST);
+
+ ast_uart_sdma_write(sdma, 0xffffffff, UART_RX_SDMA_REST);
+ ast_uart_sdma_write(sdma, 0x0, UART_RX_SDMA_REST);
+
+ ast_uart_sdma_write(sdma, 0, UART_TX_SDMA_EN);
+ ast_uart_sdma_write(sdma, 0, UART_RX_SDMA_EN);
+
+#ifdef SDDMA_RX_FIX
+ ast_uart_sdma_write(sdma, 0x200, UART_SDMA_TIMER);
+#else
+ ast_uart_sdma_write(sdma, 0xffff, UART_SDMA_TIMER);
+#endif
+
+ // TX
+ ast_uart_sdma_write(sdma, 0xfff, UART_TX_SDMA_ISR);
+ ast_uart_sdma_write(sdma, 0, UART_TX_SDMA_IER);
+
+ // RX
+ ast_uart_sdma_write(sdma, 0xfff, UART_RX_SDMA_ISR);
+ ast_uart_sdma_write(sdma, 0, UART_RX_SDMA_IER);
+
+ sdma->dma_irq = of_irq_get(node, 0);
+ ret = request_irq(sdma->dma_irq, ast_uart_sdma_irq, 0,
+ "sdma-intr", sdma);
+ if (ret) {
+ SDMADBUG("Unable to get UART SDMA IRQ %x\n", ret);
+ return -ENODEV;
+ }
+
+ ast_uart_sdma_write(sdma, SDMA_SET_TX_BUFF_SIZE(SDMA_BUFF_SIZE_4KB) |
+ SDMA_SET_RX_BUFF_SIZE(SDMA_BUFF_SIZE_64KB),
+ UART_SDMA_CONF);
+ return 0;
+}
+
+// END of SDMA Layer
+
+// UART Driver Layer
+
+static unsigned int ast_serial_in(struct uart_8250_port *up, int offset)
+{
+ offset = map_8250_in_reg(up, offset) << up->port.regshift;
+ return readb(up->port.membase + offset);
+}
+
+static void ast_serial_out(struct uart_8250_port *up, int offset, int value)
+{
+ /* Save the offset before it's remapped */
+ offset = map_8250_out_reg(up, offset) << up->port.regshift;
+ writeb(value, up->port.membase + offset);
+}
+
+/*
+ * We used to support using pause I/O for certain machines. We
+ * haven't supported this for a while, but just in case it's badly
+ * needed for certain old 386 machines, I've left these #define's
+ * in....
+ */
+#define serial_inp(up, offset) ast_serial_in(up, offset)
+#define serial_outp(up, offset, value) ast_serial_out(up, offset, value)
+
+/* Uart divisor latch read */
+static inline int _serial_dl_read(struct uart_8250_port *up)
+{
+ return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
+}
+
+/* Uart divisor latch write */
+static inline void _serial_dl_write(struct uart_8250_port *up, int value)
+{
+ serial_outp(up, UART_DLL, value & 0xff);
+ serial_outp(up, UART_DLM, value >> 8 & 0xff);
+}
+
+#define serial_dl_read(up) _serial_dl_read(up)
+#define serial_dl_write(up, value) _serial_dl_write(up, value)
+
+static void ast_uart_tx_sdma_tasklet_func(unsigned long data)
+{
+
+ struct ast_uart_priv_data *priv = (struct ast_uart_priv_data *)data;
+ struct uart_8250_port *up = priv->up;
+ struct circ_buf *xmit = NULL;
+ u32 tx_pt;
+
+
+ if (!up)
+ return;
+ xmit = &up->port.state->xmit;
+ spin_lock(&up->port.lock);
+ priv->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
+ dma_sync_single_for_device(up->port.dev, priv->dma_tx_addr,
+ UART_XMIT_SIZE, DMA_TO_DEVICE);
+ tx_pt = ast_uart_get_tx_sdma_pt(priv->dma_ch);
+
+ if (tx_pt > xmit->head) {
+ if ((tx_pt & 0xfffc) == 0)
+ ast_uart_tx_sdma_update(priv->dma_ch, 0xffff);
+ else
+ ast_uart_tx_sdma_update(priv->dma_ch, 0);
+ } else {
+ ast_uart_tx_sdma_update(priv->dma_ch, xmit->head);
+ }
+ ast_uart_tx_sdma_update(priv->dma_ch, xmit->head);
+ spin_unlock(&up->port.lock);
+}
+
+static void ast_uart_tx_buffdone(void *dev_id, u16 len)
+{
+
+ struct ast_uart_priv_data *priv = (struct ast_uart_priv_data *)dev_id;
+ struct uart_8250_port *up = priv->up;
+ struct circ_buf *xmit;
+
+ if (!up)
+ return;
+ xmit = &(up->port.state->xmit);
+
+ UART_TX_DBG("line[%d] : tx len = % d\n", priv->line, len);
+ spin_lock(&up->port.lock);
+ xmit->tail = len;
+ UART_TX_DBG(" line[%d], xmit->head = %d, xmit->tail = % d\n",
+ priv->line, xmit->head, xmit->tail);
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(&up->port);
+
+ if (xmit->head != xmit->tail)
+ tasklet_schedule(&priv->tx_tasklet);
+
+ spin_unlock(&up->port.lock);
+}
+
+#ifdef SDDMA_RX_FIX
+static void ast_uart_rx_sdma_tasklet_func(unsigned long data)
+{
+ struct ast_uart_priv_data *priv = (struct ast_uart_priv_data *)data;
+ struct circ_buf *rx_ring = &priv->rx_dma_buf;
+ struct tty_port *ttyport;
+ int count;
+ int copy = 0;
+ struct uart_8250_port *up = priv->up;
+
+ if (!up)
+ return;
+
+ ttyport = &up->port.state->port;
+
+ UART_DBG("line[%d], rx_ring->head = % d, rx_ring->tail = % d\n",
+ up->port.line, rx_ring->head, rx_ring->tail);
+ spin_lock(&up->port.lock);
+ if (rx_ring->head > rx_ring->tail) {
+ count = rx_ring->head - rx_ring->tail;
+ copy = tty_insert_flip_string(ttyport,
+ rx_ring->buf + rx_ring->tail, count);
+ } else if (rx_ring->head < rx_ring->tail) {
+ count = SDMA_RX_BUFF_SIZE - rx_ring->tail;
+ copy = tty_insert_flip_string(ttyport,
+ rx_ring->buf + rx_ring->tail, count);
+ } else {
+ count = 0;
+ }
+
+ if (copy != count)
+ UART_DBG(" !!!!!!!!ERROR 111\n");
+ if (count) {
+ rx_ring->tail += count;
+ rx_ring->tail &= (SDMA_RX_BUFF_SIZE - 1);
+ up->port.icount.rx += count;
+ tty_flip_buffer_push(ttyport);
+ ast_uart_rx_sdma_update(priv->dma_ch, rx_ring->tail);
+ }
+ spin_unlock(&up->port.lock);
+}
+
+static void ast_uart_rx_buffdone(void *dev_id, u16 len)
+{
+ struct ast_uart_priv_data *priv = (struct ast_uart_priv_data *)dev_id;
+ struct circ_buf *rx_ring = &priv->rx_dma_buf;
+ struct uart_8250_port *up = priv->up;
+
+ if (!up)
+ return;
+ UART_DBG("line[%d], head = %d,len:%d\n",
+ priv->line, priv->rx_dma_buf.head, len);
+ spin_lock(&up->port.lock);
+ rx_ring->head = len;
+ spin_unlock(&up->port.lock);
+ tasklet_schedule(&priv->rx_tasklet);
+}
+
+#else
+static void ast_uart_rx_timer_func(unsigned long data)
+{
+ struct ast_uart_priv_data *priv = (struct ast_uart_priv_data *)data;
+ struct uart_8250_port *up = priv->up;
+ struct tty_port *ttyport;
+ struct circ_buf *rx_ring;
+ struct tty_struct *tty;
+ char flag;
+ int count;
+ int copy;
+
+
+ if (!up)
+ return;
+ ttyport = &up->port.state->port;
+ rx_ring = &up->rx_dma_buf;
+ tty = up->port.state->port.tty;
+
+ UART_DBG("line[%d], rx_ring->head = % d, rx_ring->tail = % d\n",
+ up->port.line, rx_ring->head, rx_ring->tail);
+ rx_ring->head = ast_uart_get_rx_sdma_pt(priv->dma_ch);
+ del_timer(&up->rx_timer);
+
+ if (rx_ring->head > rx_ring->tail) {
+ ast_uart_set_sdma_time_out(0xffff);
+ count = rx_ring->head - rx_ring->tail;
+ copy = tty_insert_flip_string(ttyport,
+ rx_ring->buf + rx_ring->tail, count);
+ } else if (rx_ring->head < rx_ring->tail) {
+ ast_uart_set_sdma_time_out(0xffff);
+ count = SDMA_RX_BUFF_SIZE - rx_ring->tail;
+ copy = tty_insert_flip_string(ttyport,
+ rx_ring->buf + rx_ring->tail, count);
+ } else {
+ count = 0;
+ // UART_DBG("@@--%s-- ch = 0x%x\n", __func__, ch);
+ }
+
+ if (copy != count)
+ UART_DBG(" !!!!!!!!ERROR 111\n");
+ rx_ring->tail += count;
+ rx_ring->tail &= (SDMA_RX_BUFF_SIZE - 1);
+
+ if (count) {
+ //UART_DBG("\n count = % d\n", count);
+ up->port.icount.rx += count;
+ spin_lock(&up->port.lock);
+ tty_flip_buffer_push(ttyport);
+ spin_unlock(&up->port.lock);
+ //UART_DBG("update rx_ring->tail % x\n", rx_ring->tail);
+ ast_uart_rx_sdma_update(priv->dma_ch, rx_ring->tail);
+ priv->workaround = 1;
+ } else {
+ if (priv->workaround) {
+ priv->workaround++;
+ if (priv->workaround > 1)
+ ast_uart_set_sdma_time_out(0);
+ else
+ ast_uart_set_sdma_time_out(0xffff);
+ }
+ }
+ add_timer(&up->rx_timer);
+}
+#endif
+
+/*
+ * FIFO support.
+ */
+static inline void ast25xx_uart_clear_fifos(struct uart_8250_port *p)
+{
+ serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
+ serial_outp(p, UART_FCR,
+ UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
+ serial_outp(p, UART_FCR, 0);
+}
+
+/*
+ * This routine is called by rs_init() to initialize a specific serial
+ * port.
+ */
+static void autoconfig(struct uart_8250_port *up)
+{
+ unsigned long flags;
+
+ UART_DBG("line[%d]\n", up->port.line);
+ if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
+ return;
+
+ DEBUG_AUTOCONF("ttyDMA%d : autoconf (0x%04lx, 0x%p) : ", up->port.line,
+ up->port.iobase, up->port.membase);
+
+ spin_lock_irqsave(&up->port.lock, flags);
+
+ up->capabilities = 0;
+ up->bugs = 0;
+
+ up->port.type = PORT_16550A;
+ up->capabilities |= UART_CAP_FIFO;
+
+ up->port.fifosize = uart_config[up->port.type].fifo_size;
+ up->capabilities = uart_config[up->port.type].flags;
+ up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
+
+ if (up->port.type == PORT_UNKNOWN)
+ goto out;
+
+ /*
+ * Reset the UART.
+ */
+ ast25xx_uart_clear_fifos(up);
+ ast_serial_in(up, UART_RX);
+ serial_outp(up, UART_IER, 0);
+
+out:
+ spin_unlock_irqrestore(&up->port.lock, flags);
+ DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
+}
+
+static inline void __stop_tx(struct uart_8250_port *p)
+{
+ if (p->ier & UART_IER_THRI) {
+ p->ier &= ~UART_IER_THRI;
+ ast_serial_out(p, UART_IER, p->ier);
+ }
+}
+
+static void ast25xx_uart_stop_tx(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+
+ UART_TX_DBG("line[%d]\n", up->port.line);
+ __stop_tx(up);
+}
+
+static void transmit_chars(struct uart_8250_port *up);
+
+static void ast25xx_uart_start_tx(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ struct ast_uart_priv_data *priv = up->port.private_data;
+
+ UART_TX_DBG("line[%d]\n", port->line);
+ tasklet_schedule(&priv->tx_tasklet);
+}
+
+static void ast25xx_uart_stop_rx(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+
+ UART_DBG("line[%d]\n", port->line);
+ up->ier &= ~UART_IER_RLSI;
+ up->port.read_status_mask &= ~UART_LSR_DR;
+ ast_serial_out(up, UART_IER, up->ier);
+}
+
+static void ast25xx_uart_enable_ms(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+
+ UART_DBG("line[%d]\n", port->line);
+ up->ier |= UART_IER_MSI;
+ ast_serial_out(up, UART_IER, up->ier);
+}
+
+static void transmit_chars(struct uart_8250_port *up)
+{
+ struct circ_buf *xmit = &up->port.state->xmit;
+ int count;
+
+ if (up->port.x_char) {
+ serial_outp(up, UART_TX, up->port.x_char);
+ up->port.icount.tx++;
+ up->port.x_char = 0;
+ return;
+ }
+ if (uart_tx_stopped(&up->port)) {
+ ast25xx_uart_stop_tx(&up->port);
+ return;
+ }
+ if (uart_circ_empty(xmit)) {
+ __stop_tx(up);
+ return;
+ }
+
+ count = up->tx_loadsz;
+ do {
+ ast_serial_out(up, UART_TX, xmit->buf[xmit->tail]);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ up->port.icount.tx++;
+ if (uart_circ_empty(xmit))
+ break;
+ } while (--count > 0);
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(&up->port);
+
+ if (uart_circ_empty(xmit))
+ __stop_tx(up);
+}
+
+static unsigned int check_modem_status(struct uart_8250_port *up)
+{
+ unsigned int status = ast_serial_in(up, UART_MSR);
+
+ UART_DBG("line[%d]\n", up->port.line);
+ status |= up->msr_saved_flags;
+ up->msr_saved_flags = 0;
+ if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI
+ && up->port.state != NULL) {
+ if (status & UART_MSR_TERI)
+ up->port.icount.rng++;
+ if (status & UART_MSR_DDSR)
+ up->port.icount.dsr++;
+ if (status & UART_MSR_DDCD)
+ uart_handle_dcd_change(&up->port,
+ status & UART_MSR_DCD);
+ if (status & UART_MSR_DCTS)
+ uart_handle_cts_change(&up->port,
+ status & UART_MSR_CTS);
+
+ wake_up_interruptible(&up->port.state->port.delta_msr_wait);
+ }
+
+ return status;
+}
+
+/*
+ * This handles the interrupt from one port.
+ */
+static inline void ast25xx_uart_handle_port(struct uart_8250_port *up)
+{
+ unsigned int status;
+ unsigned long flags;
+
+ spin_lock_irqsave(&up->port.lock, flags);
+
+ status = serial_inp(up, UART_LSR);
+
+ DEBUG_INTR("status = %x...", status);
+
+ check_modem_status(up);
+ if (status & UART_LSR_THRE)
+ transmit_chars(up);
+
+ spin_unlock_irqrestore(&up->port.lock, flags);
+}
+
+/*
+ * This is the serial driver's interrupt routine.
+ */
+static irqreturn_t ast_uart_interrupt(int irq, void *dev_id)
+{
+ struct irq_info *i = dev_id;
+ int pass_counter = 0, handled = 0, end = 0;
+
+ DEBUG_INTR("(%d) ", irq);
+ spin_lock(&i->lock);
+
+ do {
+ struct uart_8250_port *up;
+ unsigned int iir;
+
+ up = (struct uart_8250_port *)(i->up);
+
+ iir = ast_serial_in(up, UART_IIR);
+ if (!(iir & UART_IIR_NO_INT)) {
+ ast25xx_uart_handle_port(up);
+ handled = 1;
+
+ } else
+ end = 1;
+
+ if (pass_counter++ > PASS_LIMIT) {
+ /* If we hit this, we're dead. */
+ UART_DBG(KERN_ERR
+ "ast-uart-dma:too much work for irq%d\n", irq);
+ break;
+ }
+ } while (end);
+
+ spin_unlock(&i->lock);
+
+ DEBUG_INTR("end.\n");
+
+ return IRQ_RETVAL(handled);
+}
+
+static unsigned int ast25xx_uart_tx_empty(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ unsigned long flags;
+ unsigned int lsr;
+
+ UART_TX_DBG("line[%d]\n", up->port.line);
+
+ spin_lock_irqsave(&up->port.lock, flags);
+ lsr = ast_serial_in(up, UART_LSR);
+ up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
+}
+
+static unsigned int ast25xx_uart_get_mctrl(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ unsigned int status;
+ unsigned int ret;
+
+ status = check_modem_status(up);
+
+ ret = 0;
+ if (status & UART_MSR_DCD)
+ ret |= TIOCM_CAR;
+ if (status & UART_MSR_RI)
+ ret |= TIOCM_RNG;
+ if (status & UART_MSR_DSR)
+ ret |= TIOCM_DSR;
+ if (status & UART_MSR_CTS)
+ ret |= TIOCM_CTS;
+ return ret;
+}
+
+static void ast25xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ unsigned char mcr = 0;
+
+ mctrl = 0;
+
+ if (mctrl & TIOCM_RTS)
+ mcr |= UART_MCR_RTS;
+ if (mctrl & TIOCM_DTR)
+ mcr |= UART_MCR_DTR;
+ if (mctrl & TIOCM_OUT1)
+ mcr |= UART_MCR_OUT1;
+ if (mctrl & TIOCM_OUT2)
+ mcr |= UART_MCR_OUT2;
+ if (mctrl & TIOCM_LOOP)
+ mcr |= UART_MCR_LOOP;
+
+ mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
+
+ ast_serial_out(up, UART_MCR, mcr);
+
+}
+
+static void ast25xx_uart_break_ctl(struct uart_port *port, int break_state)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ unsigned long flags;
+
+ spin_lock_irqsave(&up->port.lock, flags);
+ if (break_state == -1)
+ up->lcr |= UART_LCR_SBC;
+ else
+ up->lcr &= ~UART_LCR_SBC;
+ ast_serial_out(up, UART_LCR, up->lcr);
+ spin_unlock_irqrestore(&up->port.lock, flags);
+}
+
+static int ast25xx_uart_startup(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ // TX DMA
+ struct circ_buf *xmit = &up->port.state->xmit;
+ struct ast_uart_priv_data *priv = up->port.private_data;
+ unsigned long flags;
+ unsigned char lsr, iir;
+ int retval;
+ int irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
+
+ UART_DBG("%s\n", __func__);
+
+ priv->up = up;
+
+ UART_DBG("line[%d]\n", port->line);
+ up->capabilities = uart_config[up->port.type].flags;
+ up->mcr = 0;
+ /*
+ * Clear the FIFO buffers and disable them.
+ * (they will be reenabled in set_termios())
+ */
+ ast25xx_uart_clear_fifos(up);
+ /*
+ * Clear the interrupt registers.
+ */
+ (void)serial_inp(up, UART_LSR);
+ (void)serial_inp(up, UART_RX);
+ (void)serial_inp(up, UART_IIR);
+ (void)serial_inp(up, UART_MSR);
+
+ ast_uart_irq[0].up = up;
+ retval = request_irq(up->port.irq, ast_uart_interrupt, irq_flags,
+ "ast-uart-dma", ast_uart_irq);
+ if (retval)
+ return retval;
+
+ /*
+ * Now, initialize the UART
+ */
+ serial_outp(up, UART_LCR, UART_LCR_WLEN8);
+
+ spin_lock_irqsave(&up->port.lock, flags);
+ up->port.mctrl |= TIOCM_OUT2;
+
+ ast25xx_uart_set_mctrl(&up->port, up->port.mctrl);
+
+ /*
+ * Do a quick test to see if we receive an
+ * interrupt when we enable the TX irq.
+ */
+ serial_outp(up, UART_IER, UART_IER_THRI);
+ lsr = ast_serial_in(up, UART_LSR);
+ iir = ast_serial_in(up, UART_IIR);
+ serial_outp(up, UART_IER, 0);
+
+ if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
+ if (!(up->bugs & UART_BUG_TXEN)) {
+ up->bugs |= UART_BUG_TXEN;
+ UART_DBG("ttyDMA%d - enabling bad tx status\n",
+ port->line);
+ }
+ } else {
+ up->bugs &= ~UART_BUG_TXEN;
+ }
+
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ /*
+ * Clear the interrupt registers again for luck, and clear the
+ * saved flags to avoid getting false values from polling
+ * routines or the previous session.
+ */
+ serial_inp(up, UART_LSR);
+ serial_inp(up, UART_RX);
+ serial_inp(up, UART_IIR);
+ serial_inp(up, UART_MSR);
+ up->lsr_saved_flags = 0;
+ up->msr_saved_flags = 0;
+
+ // RX DMA
+ priv->rx_dma_buf.head = 0;
+ priv->rx_dma_buf.tail = 0;
+ up->port.icount.rx = 0;
+
+ priv->tx_done = 1;
+ priv->tx_count = 0;
+
+ priv->rx_dma_buf.head = 0;
+ priv->rx_dma_buf.tail = 0;
+#ifdef SDDMA_RX_FIX
+#else
+ priv->workaround = 0;
+#endif
+ // UART_DBG("Sending trigger for % x\n", priv->dma_ch);
+ ast_uart_rx_sdma_ctrl(priv->dma_ch, AST_UART_DMAOP_STOP);
+ ast_uart_rx_sdma_ctrl(priv->dma_ch, AST_UART_DMAOP_TRIGGER);
+#ifdef SDDMA_RX_FIX
+#else
+ add_timer(&priv->rx_timer);
+#endif
+ priv->tx_dma_buf.head = 0;
+ priv->tx_dma_buf.tail = 0;
+ priv->tx_dma_buf.buf = xmit->buf;
+
+ UART_DBG("head:0x%x tail:0x%x\n", xmit->head, xmit->tail);
+ xmit->head = 0;
+ xmit->tail = 0;
+
+ priv->dma_tx_addr = dma_map_single(port->dev, priv->tx_dma_buf.buf,
+ UART_XMIT_SIZE, DMA_TO_DEVICE);
+
+ ast_uart_tx_sdma_ctrl(priv->dma_ch, AST_UART_DMAOP_STOP);
+ ast_uart_tx_sdma_enqueue(priv->dma_ch, priv->dma_tx_addr);
+ ast_uart_tx_sdma_update(priv->dma_ch, 0);
+ ast_uart_tx_sdma_ctrl(priv->dma_ch, AST_UART_DMAOP_TRIGGER);
+ return 0;
+}
+
+static void ast25xx_uart_shutdown(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ struct ast_uart_priv_data *priv = up->port.private_data;
+ unsigned long flags;
+
+ UART_DBG("line[%d]\n", port->line);
+ priv->up = NULL;
+
+ up->ier = 0;
+ serial_outp(up, UART_IER, 0);
+
+ spin_lock_irqsave(&up->port.lock, flags);
+ up->port.mctrl &= ~TIOCM_OUT2;
+
+ ast25xx_uart_set_mctrl(&up->port, up->port.mctrl);
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ /*
+ * Disable break condition and FIFOs
+ */
+ ast_serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
+ ast25xx_uart_clear_fifos(up);
+
+ (void)ast_serial_in(up, UART_RX);
+
+ ast_uart_rx_sdma_ctrl(priv->dma_ch, AST_UART_DMAOP_PAUSE);
+ ast_uart_tx_sdma_ctrl(priv->dma_ch, AST_UART_DMAOP_PAUSE);
+#ifdef SDDMA_RX_FIX
+#else
+ del_timer_sync(&up->rx_timer);
+#endif
+
+ // Tx buffer will free by serial_core.c
+ free_irq(up->port.irq, ast_uart_irq);
+}
+
+static unsigned int ast25xx_uart_get_divisor(struct uart_port *port,
+ unsigned int baud)
+{
+ unsigned int quot;
+
+ quot = uart_get_divisor(port, baud);
+
+ return quot;
+}
+
+static void ast25xx_uart_set_termios(struct uart_port *port,
+ struct ktermios *termios,
+ struct ktermios *old)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ unsigned char cval, fcr = 0;
+ unsigned long flags;
+ unsigned int baud, quot;
+
+ switch (termios->c_cflag & CSIZE) {
+ case CS5:
+ cval = UART_LCR_WLEN5;
+ break;
+ case CS6:
+ cval = UART_LCR_WLEN6;
+ break;
+ case CS7:
+ cval = UART_LCR_WLEN7;
+ break;
+ default:
+ case CS8:
+ cval = UART_LCR_WLEN8;
+ break;
+ }
+
+ if (termios->c_cflag & CSTOPB)
+ cval |= UART_LCR_STOP;
+ if (termios->c_cflag & PARENB)
+ cval |= UART_LCR_PARITY;
+ if (!(termios->c_cflag & PARODD))
+ cval |= UART_LCR_EPAR;
+#ifdef CMSPAR
+ if (termios->c_cflag & CMSPAR)
+ cval |= UART_LCR_SPAR;
+#endif
+
+ /*
+ * Ask the core to calculate the divisor for us.
+ */
+ baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
+ quot = ast25xx_uart_get_divisor(port, baud);
+
+ if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
+ if (baud < 2400)
+ fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
+ else
+ fcr = uart_config[up->port.type].fcr;
+ }
+
+ /*
+ * Ok, we're now changing the port state. Do it with
+ * interrupts disabled.
+ */
+ spin_lock_irqsave(&up->port.lock, flags);
+
+ /*
+ * Update the per-port timeout.
+ */
+ uart_update_timeout(port, termios->c_cflag, baud);
+
+ up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
+ if (termios->c_iflag & INPCK)
+ up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
+ if (termios->c_iflag & (BRKINT | PARMRK))
+ up->port.read_status_mask |= UART_LSR_BI;
+
+ /*
+ * Characteres to ignore
+ */
+ up->port.ignore_status_mask = 0;
+ if (termios->c_iflag & IGNPAR)
+ up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
+ if (termios->c_iflag & IGNBRK) {
+ up->port.ignore_status_mask |= UART_LSR_BI;
+ /*
+ * If we're ignoring parity and break indicators,
+ * ignore overruns too (for real raw support).
+ */
+ if (termios->c_iflag & IGNPAR)
+ up->port.ignore_status_mask |= UART_LSR_OE;
+ }
+
+ /*
+ * ignore all characters if CREAD is not set
+ */
+ if ((termios->c_cflag & CREAD) == 0)
+ up->port.ignore_status_mask |= UART_LSR_DR;
+
+ /*
+ * CTS flow control flag and modem status interrupts
+ */
+ up->ier &= ~UART_IER_MSI;
+ if (UART_ENABLE_MS(&up->port, termios->c_cflag))
+ up->ier |= UART_IER_MSI;
+
+ ast_serial_out(up, UART_IER, up->ier);
+
+ serial_outp(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
+
+ serial_dl_write(up, quot);
+
+ /*
+ * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
+ * is written without DLAB set, this mode will be disabled.
+ */
+
+ serial_outp(up, UART_LCR, cval); /* reset DLAB */
+ up->lcr = cval; /* Save LCR */
+ if (fcr & UART_FCR_ENABLE_FIFO) {
+ /* emulated UARTs (Lucent Venus 167x) need two steps */
+ serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
+ }
+ serial_outp(up, UART_FCR, fcr); /* set fcr */
+ ast25xx_uart_set_mctrl(&up->port, up->port.mctrl);
+ spin_unlock_irqrestore(&up->port.lock, flags);
+ /* Don't rewrite B0 */
+ if (tty_termios_baud_rate(termios))
+ tty_termios_encode_baud_rate(termios, baud, baud);
+}
+
+/*
+ * Resource handling.
+ */
+static int ast25xx_uart_request_std_resource(struct uart_8250_port *up)
+{
+ unsigned int size = 8 << up->port.regshift;
+ int ret = 0;
+
+ if (!up->port.mapbase)
+ return ret;
+
+ if (!request_mem_region(up->port.mapbase, size, "ast-uart-dma")) {
+ ret = -EBUSY;
+ return ret;
+ }
+
+ if (up->port.flags & UPF_IOREMAP) {
+ up->port.membase = ioremap_nocache(up->port.mapbase, size);
+ if (!up->port.membase) {
+ release_mem_region(up->port.mapbase, size);
+ ret = -ENOMEM;
+ return ret;
+ }
+ }
+ return ret;
+}
+
+static void ast25xx_uart_release_std_resource(struct uart_8250_port *up)
+{
+ unsigned int size = 8 << up->port.regshift;
+
+ if (!up->port.mapbase)
+ return;
+
+ if (up->port.flags & UPF_IOREMAP) {
+ iounmap(up->port.membase);
+ up->port.membase = NULL;
+ }
+
+ release_mem_region(up->port.mapbase, size);
+}
+
+static void ast25xx_uart_release_port(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+
+ ast25xx_uart_release_std_resource(up);
+}
+
+static int ast25xx_uart_request_port(struct uart_port *port)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ int ret;
+
+ ret = ast25xx_uart_request_std_resource(up);
+ if (ret == 0)
+ ast25xx_uart_release_std_resource(up);
+
+ return ret;
+}
+
+static void ast25xx_uart_config_port(struct uart_port *port, int flags)
+{
+ struct uart_8250_port *up = to_uart_8250_port(port);
+ int ret;
+
+ /*
+ * Find the region that we can probe for. This in turn
+ * tells us whether we can probe for the type of port.
+ */
+ ret = ast25xx_uart_request_std_resource(up);
+ if (ret < 0)
+ return;
+
+ if (flags & UART_CONFIG_TYPE)
+ autoconfig(up);
+
+ if (up->port.type == PORT_UNKNOWN)
+ ast25xx_uart_release_std_resource(up);
+}
+
+static int ast25xx_uart_verify_port(struct uart_port *port,
+ struct serial_struct *ser)
+{
+ return 0;
+}
+
+static const char *ast25xx_uart_type(struct uart_port *port)
+{
+ int type = port->type;
+
+ if (type >= ARRAY_SIZE(uart_config))
+ type = 0;
+ return uart_config[type].name;
+}
+
+
+
+static unsigned int ast25xx_uart_serial_in(struct uart_port *port, int offset)
+{
+ offset = offset << port->regshift;
+ return readb(port->membase + offset);
+
+}
+
+
+static void ast25xx_uart_serial_out(struct uart_port *port,
+ int offset, int value)
+{
+ offset = offset << port->regshift;
+ writeb(value, port->membase + offset);
+}
+
+static const struct uart_ops ast25xx_uart_pops = {
+ .tx_empty = ast25xx_uart_tx_empty,
+ .set_mctrl = ast25xx_uart_set_mctrl,
+ .get_mctrl = ast25xx_uart_get_mctrl,
+ .stop_tx = ast25xx_uart_stop_tx,
+ .start_tx = ast25xx_uart_start_tx,
+ .stop_rx = ast25xx_uart_stop_rx,
+ .enable_ms = ast25xx_uart_enable_ms,
+ .break_ctl = ast25xx_uart_break_ctl,
+ .startup = ast25xx_uart_startup,
+ .shutdown = ast25xx_uart_shutdown,
+ .set_termios = ast25xx_uart_set_termios,
+ .type = ast25xx_uart_type,
+ .release_port = ast25xx_uart_release_port,
+ .request_port = ast25xx_uart_request_port,
+ .config_port = ast25xx_uart_config_port,
+ .verify_port = ast25xx_uart_verify_port,
+};
+
+
+
+/*
+ * Register a set of serial devices attached to a platform device. The
+ * list is terminated with a zero flags entry, which means we expect
+ * all entries to have at least UPF_BOOT_AUTOCONF set.
+ */
+struct clk *clk;
+
+static int ast25xx_uart_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct ast_uart_priv_data *priv;
+ struct uart_8250_port port_8250;
+ struct uart_8250_port *up;
+ int ret;
+ u32 read, dma_channel = 0;
+ struct resource *res;
+
+ if (UART_XMIT_SIZE > DMA_BUFF_SIZE)
+ UART_DBG("UART_XMIT_SIZE > DMA_BUFF_SIZE : Please Check\n");
+
+ priv = (struct ast_uart_priv_data *)devm_kzalloc(&pdev->dev,
+ sizeof(struct ast_uart_priv_data), GFP_KERNEL);
+ if (priv == NULL)
+ return -ENOMEM;
+
+ up = &port_8250;
+ memset(up, 0, sizeof(struct uart_8250_port));
+ up->port.flags = UPF_IOREMAP;
+
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (res == NULL) {
+ dev_err(&pdev->dev, "IRQ resource not found");
+ return -ENODEV;
+ }
+ up->port.irq = res->start;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "Register base not found");
+ return -ENODEV;
+ }
+ up->port.mapbase = res->start;
+
+ ret = ast25xx_uart_request_std_resource(up);
+ if (ret) {
+ dev_err(&pdev->dev, "ioremap_nocache Failed");
+ return ret;
+ }
+
+ clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(clk))
+ dev_err(&pdev->dev, "missing controller clock");
+
+ ret = clk_prepare_enable(clk);
+ if (ret)
+ dev_err(&pdev->dev, "failed to enable DMA UART Clk");
+
+ up->port.uartclk = clk_get_rate(clk);
+
+ if (of_property_read_u32(np, "reg-shift", &read) == 0)
+ up->port.regshift = read;
+ if (of_property_read_u32(np, "dma-channel", &read) == 0) {
+ dma_channel = read;
+ priv->dma_ch = dma_channel;
+ }
+ up->port.iotype = UPIO_MEM;
+ up->port.flags |= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
+ up->port.dev = &pdev->dev;
+ if (share_irqs)
+ up->port.flags |= UPF_SHARE_IRQ;
+ up->port.fifosize = uart_config[up->port.type].fifo_size;
+ up->port.type = PORT_16550;
+ up->port.iotype = UPIO_MEM;
+ up->port.flags = UPF_FIXED_TYPE;
+ up->port.startup = ast25xx_uart_startup;
+ up->port.shutdown = ast25xx_uart_shutdown;
+ up->port.set_termios = ast25xx_uart_set_termios;
+ up->port.set_mctrl = ast25xx_uart_set_mctrl;
+ up->port.serial_in = ast25xx_uart_serial_in;
+ up->port.serial_out = ast25xx_uart_serial_out;
+ up->capabilities = uart_config[up->port.type].flags;
+ up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
+ up->capabilities |= UART_CAP_FIFO;
+
+ up->port.private_data = priv;
+
+ ret = serial8250_register_8250_port(up);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "unable to registr port (IO%lx MEM%llx IRQ%d):%d\n",
+ up->port.iobase, (unsigned long long)up->port.mapbase,
+ up->port.irq, ret);
+ return ret;
+ }
+ priv->line = ret;
+
+ tasklet_init(&priv->tx_tasklet, ast_uart_tx_sdma_tasklet_func,
+ (unsigned long)priv);
+#ifdef SDDMA_RX_FIX
+ tasklet_init(&priv->rx_tasklet, ast_uart_rx_sdma_tasklet_func,
+ (unsigned long)priv);
+#else
+ uart->rx_timer.data = (unsigned long)port;
+ uart->rx_timer.expires = jiffies + (HZ);
+ uart->rx_timer.function = ast_uart_rx_timer_func;
+ init_timer(&priv->rx_timer);
+#endif
+
+//DMA request
+#ifdef SDDMA_RX_FIX
+ priv->rx_dma_buf.buf =
+ ast_uart_rx_sdma_request(priv->dma_ch, ast_uart_rx_buffdone,
+ priv);
+ if (priv->rx_dma_buf.buf < 0) {
+ UART_DBG("Error : failed to get rx dma channel[%d]\n",
+ priv->dma_ch);
+ return -EBUSY;
+}
+#else
+ priv->rx_dma_buf.buf = ast_uart_rx_sdma_request(
+ priv->dma_ch, priv);
+ if (priv->rx_dma_buf.buf < 0) {
+ UART_DBG("Error : failed to get rx dma channel[%d]\n",
+ priv->dma_ch);
+ return -EBUSY;
+ }
+#endif
+ if (ast_uart_tx_sdma_request(
+ priv->dma_ch, ast_uart_tx_buffdone, priv) < 0) {
+ UART_DBG("Error : failed to get tx dma channel[%d]\n",
+ priv->dma_ch);
+ return -EBUSY;
+ }
+
+
+ platform_set_drvdata(pdev, priv);
+ return 0;
+}
+
+/*
+ * Remove serial ports registered against a platform device.
+ */
+static int ast25xx_uart_remove(struct platform_device *pdev)
+{
+ struct ast_uart_priv_data *priv;
+
+ priv = platform_get_drvdata(pdev);
+ serial8250_unregister_port(priv->line);
+ return 0;
+}
+
+static int ast25xx_uart_suspend(struct platform_device *pdev,
+ pm_message_t state)
+{
+ struct ast_uart_priv_data *priv;
+
+ priv = platform_get_drvdata(pdev);
+ serial8250_suspend_port(priv->line);
+ return 0;
+}
+
+static int ast25xx_uart_resume(struct platform_device *pdev)
+{
+ struct ast_uart_priv_data *priv;
+
+ priv = platform_get_drvdata(pdev);
+ serial8250_resume_port(priv->line);
+ return 0;
+}
+
+static const struct of_device_id ast_serial_dt_ids[] = {
+ { .compatible = "aspeed,ast-sdma-uart", },
+ { /* sentinel */ }
+};
+
+static struct platform_driver ast25xx_uart_driver = {
+ .probe = ast25xx_uart_probe,
+ .remove = ast25xx_uart_remove,
+ .suspend = ast25xx_uart_suspend,
+ .resume = ast25xx_uart_resume,
+ .driver = {
+ .name = "ast-uart-dma",
+ .of_match_table = of_match_ptr(ast_serial_dt_ids),
+ },
+};
+
+static int __init ast_uart_init(void)
+{
+ int ret;
+
+ if (nr_uarts > UART_DMA_NR)
+ nr_uarts = UART_DMA_NR;
+
+ ret = ast_uart_sdma_probe();
+ if (ret) {
+ UART_DBG("ast_uart_sdma_probe Failed ret = %d\n", ret);
+ goto out;
+ }
+ UART_DBG(KERN_INFO
+ "ast-uart-dma:UART driver with DMA%d ports IRQ sharing %sabled\n",
+ nr_uarts, share_irqs ? "en" : "dis");
+
+ spin_lock_init(&ast_uart_irq[0].lock);
+
+ ret = platform_driver_register(&ast25xx_uart_driver);
+ if (ret == 0)
+ goto out;
+
+out:
+ return ret;
+}
+
+static void __exit ast_uart_exit(void)
+{
+
+ platform_driver_unregister(&ast25xx_uart_driver);
+
+}
+module_init(ast_uart_init);
+module_exit(ast_uart_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("AST DMA serial driver");
+MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
--
2.17.1
^ permalink raw reply related
* [patch 2/5] build configuration for AST2500 DMA UART driver
From: sudheer.v @ 2019-06-05 12:23 UTC (permalink / raw)
To: gregkh, mchehab+samsung, jslaby, joel, andrew, benh, robh+dt,
mark.rutland, shivahshankar.shankarnarayanrao, sudheer.veliseti
Cc: devicetree, linux-aspeed, linux-serial, linux-arm-kernel,
sudheer Kumar veliseti
In-Reply-To: <1559737395-28542-1-git-send-email-open.sudheer@gmail.com>
From: sudheer Kumar veliseti <sudheer.open@gmail.com>
Signed-off-by: sudheer veliseti <sudheer.open@gmail.com>
---
drivers/tty/serial/8250/Kconfig | 35 +++++++++++++++++++++++++++++++-
drivers/tty/serial/8250/Makefile | 1 +
2 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
index 15c2c5463835..c793466a1c47 100644
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
@@ -45,7 +45,7 @@ config SERIAL_8250_DEPRECATED_OPTIONS
keep the 8250_core.* options around until they revert the changes
they already did.
- If 8250 is built as a module, this adds 8250_core alias instead.
+ If 8250 is built as a module, this adds 8250_core alias instead.
If you did not notice yet and/or you have userspace from pre-3.7, it
is safe (and recommended) to say N here.
@@ -189,6 +189,39 @@ config SERIAL_8250_RUNTIME_UARTS
with the module parameter "nr_uarts", or boot-time parameter
8250.nr_uarts
+config AST_SERIAL_DMA_UART
+ tristate "AST UART driver with DMA"
+ select SERIAL_CORE
+ help
+ UART driver with DMA support for Aspeed BMC AST25XX.
+ this driver supports UARTs in AST2500,AST2600. It uses
+ DMA channel of DMA engines present in these chips.
+ since this dma engine is used only by UARTs it is not
+ added as a separate DMA driver instead added as a layer
+ within UART driver.
+
+
+config AST_NR_DMA_UARTS
+ int "Maximum number of uart dma serial ports"
+ depends on AST_SERIAL_DMA_UART
+ default "4"
+ help
+ Set this to the number of serial ports you want the driver
+ to support. This includes any ports discovered via ACPI or
+ PCI enumeration and any ports that may be added at run-time
+ via hot-plug, or any ISA multi-port serial cards.
+
+config AST_RUNTIME_DMA_UARTS
+ int "Number of uart dma serial ports to register at runtime"
+ depends on AST_SERIAL_DMA_UART
+ range 0 AST_NR_DMA_UARTS
+ default "4"
+ help
+ Set this to the maximum number of serial ports you want
+ the kernel to register at boot time. This can be overridden
+ with the module parameter "nr_uarts", or boot-time parameter
+ 8250.nr_uarts
+
config SERIAL_8250_EXTENDED
bool "Extended 8250/16550 serial driver options"
depends on SERIAL_8250
diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile
index 18751bc63a84..54d40e5c6e2a 100644
--- a/drivers/tty/serial/8250/Makefile
+++ b/drivers/tty/serial/8250/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o
obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o
obj-$(CONFIG_SERIAL_8250_MOXA) += 8250_moxa.o
obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o
+obj-$(CONFIG_AST_SERIAL_DMA_UART) += 8250_ast2500_uart_dma.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o
CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
--
2.17.1
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