* [PATCH] tty: n_tty: order lockless input availability checks
From: Cen Zhang @ 2026-05-04 7:23 UTC (permalink / raw)
To: gregkh, jirislaby
Cc: peter, linux-kernel, linux-serial, baijiaju1990, Cen Zhang
The N_TTY read buffer uses release/acquire ordering for its
lockless ring indices. Input producers release-publish canon_head and
commit_head after updating the buffer and delimiter flags, and readers
acquire those heads before copying data. Readers also release-publish
read_tail before producers use it to calculate room.
chars_in_buffer() and input_available_p() sample the same indices
for availability and flow-control decisions, but use plain loads. That
can miss the ordering used by the data-copy paths and can also let
poll() observe termios-synthesized availability with weaker ordering
than normal receive-side publication.
Use acquire loads for the lockless head/tail samples in those
helpers. When n_tty_set_termios() updates canonical/noncanonical
availability, publish the updated heads with release stores as well.
Keep the cached icanon bit as an intentionally lockless mode snapshot
and annotate that access.
Fixes: 70aca71f92ca ("n_tty: Fix unordered accesses to lockless read buffer")
Signed-off-by: Cen Zhang <zzzccc427@gmail.com>
---
drivers/tty/n_tty.c | 32 +++++++++++++++++++++++---------
1 file changed, 23 insertions(+), 9 deletions(-)
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index e6a0f5b40d0a..56b0cd96a453 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -213,9 +213,17 @@ static void n_tty_kick_worker(const struct tty_struct *tty)
static ssize_t chars_in_buffer(const struct tty_struct *tty)
{
const struct n_tty_data *ldata = tty->disc_data;
- size_t head = ldata->icanon ? ldata->canon_head : ldata->commit_head;
+ bool icanon = data_race((int)ldata->icanon); /* lockless snapshot */
+ size_t head;
+ size_t tail;
- return head - ldata->read_tail;
+ if (icanon)
+ head = smp_load_acquire(&ldata->canon_head); /* producer publish */
+ else
+ head = smp_load_acquire(&ldata->commit_head); /* producer publish */
+ tail = smp_load_acquire(&ldata->read_tail); /* consumer publish */
+
+ return head - tail;
}
/**
@@ -1779,14 +1787,14 @@ static void n_tty_set_termios(struct tty_struct *tty, const struct ktermios *old
bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE);
ldata->line_start = ldata->read_tail;
if (!L_ICANON(tty) || !read_cnt(ldata)) {
- ldata->canon_head = ldata->read_tail;
+ smp_store_release(&ldata->canon_head, ldata->read_tail); /* publish */
ldata->push = 0;
} else {
set_bit(MASK(ldata->read_head - 1), ldata->read_flags);
- ldata->canon_head = ldata->read_head;
+ smp_store_release(&ldata->canon_head, ldata->read_head); /* publish */
ldata->push = 1;
}
- ldata->commit_head = ldata->read_head;
+ smp_store_release(&ldata->commit_head, ldata->read_head); /* publish */
ldata->erasing = 0;
ldata->lnext = 0;
}
@@ -1908,11 +1916,17 @@ static inline int input_available_p(const struct tty_struct *tty, int poll)
{
const struct n_tty_data *ldata = tty->disc_data;
int amt = poll && !TIME_CHAR(tty) && MIN_CHAR(tty) ? MIN_CHAR(tty) : 1;
+ bool icanon = data_race((int)ldata->icanon); /* lockless snapshot */
+ size_t tail = smp_load_acquire(&ldata->read_tail); /* consumer publish */
+ size_t head;
- if (ldata->icanon && !L_EXTPROC(tty))
- return ldata->canon_head != ldata->read_tail;
- else
- return ldata->commit_head - ldata->read_tail >= amt;
+ if (icanon && !L_EXTPROC(tty)) {
+ head = smp_load_acquire(&ldata->canon_head); /* producer publish */
+ return head != tail;
+ }
+
+ head = smp_load_acquire(&ldata->commit_head); /* producer publish */
+ return head - tail >= amt;
}
/**
--
2.43.0
^ permalink raw reply related
* Re: [PATCH] tty: n_tty: order lockless input availability checks
From: Greg KH @ 2026-05-04 7:34 UTC (permalink / raw)
To: Cen Zhang; +Cc: jirislaby, peter, linux-kernel, linux-serial, baijiaju1990
In-Reply-To: <20260504072321.928921-1-zzzccc427@gmail.com>
On Mon, May 04, 2026 at 03:23:21PM +0800, Cen Zhang wrote:
> The N_TTY read buffer uses release/acquire ordering for its
> lockless ring indices. Input producers release-publish canon_head and
> commit_head after updating the buffer and delimiter flags, and readers
> acquire those heads before copying data. Readers also release-publish
> read_tail before producers use it to calculate room.
>
> chars_in_buffer() and input_available_p() sample the same indices
> for availability and flow-control decisions, but use plain loads. That
> can miss the ordering used by the data-copy paths and can also let
> poll() observe termios-synthesized availability with weaker ordering
> than normal receive-side publication.
>
> Use acquire loads for the lockless head/tail samples in those
> helpers. When n_tty_set_termios() updates canonical/noncanonical
> availability, publish the updated heads with release stores as well.
> Keep the cached icanon bit as an intentionally lockless mode snapshot
> and annotate that access.
>
> Fixes: 70aca71f92ca ("n_tty: Fix unordered accesses to lockless read buffer")
> Signed-off-by: Cen Zhang <zzzccc427@gmail.com>
What tests show that this is needed? That commit was a long time ago,
and surely we would have had some bug reports since then, right?
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH] tty: n_tty: order lockless input availability checks
From: Cen Zhang @ 2026-05-04 7:47 UTC (permalink / raw)
To: Greg KH; +Cc: jirislaby, peter, linux-kernel, linux-serial, baijiaju1990
In-Reply-To: <2026050451-tree-trustful-a841@gregkh>
Dear Greg KH
Thanks for taking a look, and sorry if the changelog made this sound
stronger than the evidence I have.
> What tests show that this is needed? That commit was a long time ago,
> and surely we would have had some bug reports since then, right?
>
> thanks,
>
> greg k-h
The evidence I have is from data-race reports produced while stressing
pty/tty ioctls. The relevant stacks, mapped to current v7.0.3 source,
are:
- read/unthrottle side:
chars_in_buffer() at drivers/tty/n_tty.c:216
n_tty_check_unthrottle() at drivers/tty/n_tty.c:275
n_tty_read()
racing with the receive side:
n_tty_receive_char_canon() at drivers/tty/n_tty.c:1258
__receive_buf() at drivers/tty/n_tty.c:1588
- poll/select side:
input_available_p() at drivers/tty/n_tty.c:1912-1915
n_tty_poll() at drivers/tty/n_tty.c:2440/2444
racing with termios changes:
n_tty_set_termios() at drivers/tty/n_tty.c:1782,
drivers/tty/n_tty.c:1786 and drivers/tty/n_tty.c:1789
My reasoning was that these helpers sample the same lockless read-buffer
availability state that the read/copy paths already handle with
smp_store_release()/smp_load_acquire(), but I do not have a test showing
a concrete functional failure beyond the data-race reports.
Would you prefer that I drop the Fixes tag and respin the changelog to
describe this as a conservative KCSAN/LKMM cleanup? Or do you think the
evidence is too weak for a change here?
Thanks,
Cen
^ permalink raw reply
* Re: [PATCH] tty: n_tty: order lockless input availability checks
From: Greg KH @ 2026-05-04 7:53 UTC (permalink / raw)
To: Cen Zhang; +Cc: jirislaby, peter, linux-kernel, linux-serial, baijiaju1990
In-Reply-To: <CAFRLqsVMYRESR4dhpcsxXF17FvaX5obXyT0ZXZMkHymnw-6K6Q@mail.gmail.com>
On Mon, May 04, 2026 at 03:47:01PM +0800, Cen Zhang wrote:
> Dear Greg KH
>
> Thanks for taking a look, and sorry if the changelog made this sound
> stronger than the evidence I have.
>
> > What tests show that this is needed? That commit was a long time ago,
> > and surely we would have had some bug reports since then, right?
> >
> > thanks,
> >
> > greg k-h
>
> The evidence I have is from data-race reports produced while stressing
> pty/tty ioctls. The relevant stacks, mapped to current v7.0.3 source,
> are:
Cool, where are those reports?
> - read/unthrottle side:
> chars_in_buffer() at drivers/tty/n_tty.c:216
> n_tty_check_unthrottle() at drivers/tty/n_tty.c:275
> n_tty_read()
>
> racing with the receive side:
> n_tty_receive_char_canon() at drivers/tty/n_tty.c:1258
> __receive_buf() at drivers/tty/n_tty.c:1588
>
> - poll/select side:
> input_available_p() at drivers/tty/n_tty.c:1912-1915
> n_tty_poll() at drivers/tty/n_tty.c:2440/2444
>
> racing with termios changes:
> n_tty_set_termios() at drivers/tty/n_tty.c:1782,
> drivers/tty/n_tty.c:1786 and drivers/tty/n_tty.c:1789
>
> My reasoning was that these helpers sample the same lockless read-buffer
> availability state that the read/copy paths already handle with
> smp_store_release()/smp_load_acquire(), but I do not have a test showing
> a concrete functional failure beyond the data-race reports.
>
> Would you prefer that I drop the Fixes tag and respin the changelog to
> describe this as a conservative KCSAN/LKMM cleanup? Or do you think the
> evidence is too weak for a change here?
I don't really know as I haven't seen any such reports before that I can
recall.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH] tty: n_tty: order lockless input availability checks
From: Cen Zhang @ 2026-05-04 8:11 UTC (permalink / raw)
To: Greg KH; +Cc: jirislaby, peter, linux-kernel, linux-serial, baijiaju1990
In-Reply-To: <2026050455-secret-monetary-bb37@gregkh>
Dear Greg KH
Thanks for taking a look.
> Cool, where are those reports?
Sorry, I should have been clearer.
These are local data-race reports from my pty/tty fuzzing run.
They were produced on v6.17-rc5:
76eeb9b8de98 ("Linux 6.17-rc5")
The stack line numbers below are from that tested tree. I also checked
current v7.0.3, and the same relevant plain lockless accesses are still
present there, although some surrounding line numbers have moved.
Report 1:
============ DATARACE ============
Function: chars_in_buffer drivers/tty/n_tty.c:216 [inline]
Function: n_tty_check_unthrottle+0x25c/0xbd0 drivers/tty/n_tty.c:275
Function: tty_io_nonblock include/linux/tty.h:323 [inline]
Function: n_tty_wait_for_input drivers/tty/n_tty.c:2163 [inline]
Function: n_tty_read+0xed5/0x41f0 drivers/tty/n_tty.c:2264
Function: tty_read+0x532/0xf50 drivers/tty/tty_io.c:904
Function: new_sync_read fs/read_write.c:489 [inline]
Function: vfs_read+0x5fe/0xb70 fs/read_write.c:572
Function: ksys_read+0xf7/0x1e0 fs/read_write.c:712
============OTHER_INFO============
Function: n_tty_receive_char_canon drivers/tty/n_tty.c:1259 [inline]
Function: n_tty_receive_char_special drivers/tty/n_tty.c:1372 [inline]
Function: n_tty_receive_buf_common+0x2cb0/0x3410 drivers/tty/n_tty.c:1588
Function: n_tty_receive_buf2+0x51/0x80 drivers/tty/n_tty.c:1487
Function: tty_flip_buffer_commit drivers/tty/tty_buffer.c:515 [inline]
Function: tty_ldisc_receive_buf+0x1e8/0x450 drivers/tty/tty_buffer.c:532
Function: paste_selection+0x781/0xcd0
Report 2:
============ DATARACE ============
Function: input_available_p drivers/tty/n_tty.c:1926 [inline]
Function: n_tty_poll+0x623/0x16b0 drivers/tty/n_tty.c:2452
Function: tty_poll+0x224/0x4a0 drivers/tty/tty_io.c:2199
Function: do_select+0xce7/0x13d0 fs/select.c:536
Function: __do_sys_pselect6+0x1d8/0x240 fs/select.c:793
============OTHER_INFO============
Function: n_tty_set_termios+0x82b/0x37a0 drivers/tty/n_tty.c:1799
Function: tty_set_termios+0x112d/0x1b80 drivers/tty/tty_ioctl.c:348
Function: set_termios+0xc1b/0xca0 drivers/tty/tty_ioctl.c:512
Function: n_tty_ioctl_helper+0xe5/0x8f0 drivers/tty/tty_ioctl.c:982
Function: n_tty_ioctl+0x253/0x730 drivers/tty/n_tty.c:2509
Function: tty_ioctl+0x1cfb/0x3070 drivers/tty/tty_io.c:2801
In current v7.0.3, the same relevant source pattern is still present at:
- chars_in_buffer():
drivers/tty/n_tty.c:216-218
- input_available_p():
drivers/tty/n_tty.c:1912-1915
- n_tty_set_termios():
drivers/tty/n_tty.c:1782
drivers/tty/n_tty.c:1786
drivers/tty/n_tty.c:1789
Thanks,
Cen
^ permalink raw reply
* Re: [PATCH v2 02/15] serial: core: add uart_iotype_mmio/legacy_io helper functions
From: Andy Shevchenko @ 2026-05-04 8:48 UTC (permalink / raw)
To: Maciej W. Rozycki
Cc: Hugo Villeneuve, Greg Kroah-Hartman, Jiri Slaby,
Ilpo Järvinen, linux-kernel, linux-serial, Hugo Villeneuve
In-Reply-To: <alpine.DEB.2.21.2605030016120.23161@angie.orcam.me.uk>
On Sun, May 03, 2026 at 12:25:24AM +0100, Maciej W. Rozycki wrote:
> On Thu, 30 Apr 2026, Andy Shevchenko wrote:
>
> > > +bool uart_iotype_legacy_io(enum uart_iotype iotype)
> >
> > Why do we use 'legacy'? Still in use in modern CPUs...
>
> Deprecated in PCIe and not available in numerous systems. Also actually
> called "legacy" in some serial port datasheets aged ~20 years now. While
> some contemporary CPUs indeed retain the port I/O address space, it's for
> legacy use anyway, you don't want to rely on it in new designs.
For the holder of the new (modern) CPU which supports the IO ports, this is
definitely not a legacy interface despite on whatever PCIe or other datasheets
call it.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH 00/15] serial: 8250: add MUEx50 support for Moxa PCIe boards
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
This series moves Moxa PCIe multiport serial board support out of
8250_pci into a dedicated 8250_mxpcie driver, and then extends that
driver to make use of MUEx50-specific UART features.
The split keeps the Moxa-specific logic out of the generic PCI 8250
driver and makes the follow-up changes easier to review. The new driver
continues to use the 8250 core, but adds support for MUEx50 features
such as programmable FIFO trigger levels, automatic hardware and
software flow control, interface mode switching, RS485 break handling,
and FIFO window based RX/TX paths.
The 8250 core changes in this series are limited to wiring optional
low-level driver callbacks for break control and rx_trig_bytes
handling. The hardware-specific behavior remains in the Moxa driver.
The patches are organized as follows:
- split Moxa PCIe board support out of 8250_pci
- add the MUEx50 port type
- add MUEx50-specific driver support and optimizations
- extend the 8250 layer where MUEx50 requires driver-specific handling
Crescent Hsieh (15):
serial: 8250: split Moxa PCIe serial board support out of 8250_pci
serial: 8250: add Moxa MUEx50 UART port type
serial: 8250_mxpcie: enable enhanced mode and program FIFO trigger
levels
serial: 8250_mxpcie: enable automatic RTS/CTS flow control
serial: 8250_mxpcie: offload XON/XOFF flow control to MUEx50 hardware
serial: 8250_mxpcie: add custom handle_irq callback
serial: 8250_mxpcie: speed up RX using memory-mapped FIFO window
serial: 8250_mxpcie: speed up TX using memory-mapped FIFO window
serial: 8250_mxpcie: introduce per-port private data structure
serial: 8250_mxpcie: defer uart_write_wakeup() to workqueue
serial: 8250_mxpcie: support serial interface mode switching
serial: 8250: allow low-level drivers to override break control
serial: 8250_mxpcie: add break support for RS485 using MUEx50 features
serial: 8250: allow UART drivers to override rx_trig_bytes handling
serial: 8250_mxpcie: implement rx_trig_bytes callbacks via MUEx50 RTL
drivers/tty/serial/8250/8250_core.c | 6 +
drivers/tty/serial/8250/8250_mxpcie.c | 691 ++++++++++++++++++++++++++
drivers/tty/serial/8250/8250_pci.c | 208 +-------
drivers/tty/serial/8250/8250_port.c | 33 +-
drivers/tty/serial/8250/Kconfig | 11 +
drivers/tty/serial/8250/Makefile | 1 +
include/linux/serial_8250.h | 1 +
include/linux/serial_core.h | 3 +
include/uapi/linux/serial_core.h | 3 +
9 files changed, 749 insertions(+), 208 deletions(-)
create mode 100644 drivers/tty/serial/8250/8250_mxpcie.c
--
2.43.0
^ permalink raw reply
* [PATCH 01/15] serial: 8250: split Moxa PCIe serial board support out of 8250_pci
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
The Moxa PCIe multiport serial boards are currently handled as part of
8250_pci.c. In preparation for adding Moxa-specific UART features and
optimizations, move the Moxa PCIe implementation into a dedicated
driver.
This introduces drivers/tty/serial/8250/8250_mxpcie.c and wires it up
via Kconfig and Makefile, while preserving the existing probe flow and
device IDs.
This change was suggested during earlier review by Andy Shevchenko.
No functional change intended.
Link: https://lore.kernel.org/all/ZmQovC6TbDpTb3c8@surfacebook.localdomain/
Link: https://lore.kernel.org/all/CAHp75VeDsVt0GQYUFxLM+obfmqXBPa3hM3YMsFbc26uzWZG-SQ@mail.gmail.com/
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 292 ++++++++++++++++++++++++++
drivers/tty/serial/8250/8250_pci.c | 208 +-----------------
drivers/tty/serial/8250/Kconfig | 11 +
drivers/tty/serial/8250/Makefile | 1 +
4 files changed, 307 insertions(+), 205 deletions(-)
create mode 100644 drivers/tty/serial/8250/8250_mxpcie.c
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
new file mode 100644
index 000000000000..aa0afdbed791
--- /dev/null
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -0,0 +1,292 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Moxa PCIe multiport serial device driver
+ *
+ * Copyright (C) 2025 Moxa Inc. (support@moxa.com)
+ * Author: Crescent Hsieh <crescentcy.hsieh@moxa.com>
+ */
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/device.h>
+#include <linux/dev_printk.h>
+#include <linux/types.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/bits.h>
+#include <linux/bitfield.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+#include <linux/8250_pci.h>
+
+#include "8250.h"
+#include "8250_pcilib.h"
+
+#define PCI_DEVICE_ID_MOXA_CP102E 0x1024
+#define PCI_DEVICE_ID_MOXA_CP102EL 0x1025
+#define PCI_DEVICE_ID_MOXA_CP102N 0x1027
+#define PCI_DEVICE_ID_MOXA_CP104EL_A 0x1045
+#define PCI_DEVICE_ID_MOXA_CP104N 0x1046
+#define PCI_DEVICE_ID_MOXA_CP112N 0x1121
+#define PCI_DEVICE_ID_MOXA_CP114EL 0x1144
+#define PCI_DEVICE_ID_MOXA_CP114N 0x1145
+#define PCI_DEVICE_ID_MOXA_CP116E_A_A 0x1160
+#define PCI_DEVICE_ID_MOXA_CP116E_A_B 0x1161
+#define PCI_DEVICE_ID_MOXA_CP118EL_A 0x1182
+#define PCI_DEVICE_ID_MOXA_CP118E_A_I 0x1183
+#define PCI_DEVICE_ID_MOXA_CP132EL 0x1322
+#define PCI_DEVICE_ID_MOXA_CP132N 0x1323
+#define PCI_DEVICE_ID_MOXA_CP134EL_A 0x1342
+#define PCI_DEVICE_ID_MOXA_CP134N 0x1343
+#define PCI_DEVICE_ID_MOXA_CP138E_A 0x1381
+#define PCI_DEVICE_ID_MOXA_CP168EL_A 0x1683
+
+/* Bits in PCI device ID encoding board capabilities */
+#define MOXA_DEV_ID_IFACE_MASK GENMASK(11, 8) /* Supported serial interface */
+#define MOXA_DEV_ID_NPORTS_MASK GENMASK(7, 4) /* Number of UART ports */
+
+/* UART */
+#define MOXA_PUART_BASE_BAUD 921600
+#define MOXA_PUART_OFFSET 0x200
+
+#define MOXA_GPIO_DIRECTION 0x09
+#define MOXA_GPIO_OUTPUT 0x0A
+
+#define MOXA_GPIO_PIN2 BIT(2)
+
+#define MOXA_UIR_OFFSET 0x04
+#define MOXA_UIR_RS232 0x00
+#define MOXA_UIR_RS422 0x01
+#define MOXA_UIR_RS485_4W 0x0B
+#define MOXA_UIR_RS485_2W 0x0F
+
+#define MOXA_EVEN_RS_MASK GENMASK(3, 0)
+#define MOXA_ODD_RS_MASK GENMASK(7, 4)
+
+struct mxpcie8250 {
+ unsigned int supp_rs;
+ unsigned int num_ports;
+ void __iomem *bar1_base; /* UART registers (MMIO) */
+ void __iomem *bar2_base; /* UIR / GPIO / CPLD (IO) */
+ int line[];
+};
+
+enum {
+ MOXA_SUPP_RS232 = BIT(0),
+ MOXA_SUPP_RS422 = BIT(1),
+ MOXA_SUPP_RS485 = BIT(2),
+};
+
+static bool mxpcie8250_is_mini_pcie(unsigned short device)
+{
+ if (device == PCI_DEVICE_ID_MOXA_CP102N ||
+ device == PCI_DEVICE_ID_MOXA_CP104N ||
+ device == PCI_DEVICE_ID_MOXA_CP112N ||
+ device == PCI_DEVICE_ID_MOXA_CP114N ||
+ device == PCI_DEVICE_ID_MOXA_CP132N ||
+ device == PCI_DEVICE_ID_MOXA_CP134N)
+ return true;
+
+ return false;
+}
+
+static unsigned int mxpcie8250_get_supp_rs(unsigned short device)
+{
+ switch (device & MOXA_DEV_ID_IFACE_MASK) {
+ case 0x0000:
+ case 0x0600:
+ return MOXA_SUPP_RS232;
+ case 0x0100:
+ return MOXA_SUPP_RS232 | MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
+ case 0x0300:
+ return MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
+ }
+
+ return 0;
+}
+
+static unsigned short mxpcie8250_get_nports(unsigned short device)
+{
+ switch (device) {
+ case PCI_DEVICE_ID_MOXA_CP116E_A_A:
+ case PCI_DEVICE_ID_MOXA_CP116E_A_B:
+ return 8;
+ }
+
+ return FIELD_GET(MOXA_DEV_ID_NPORTS_MASK, device);
+}
+
+static void mxpcie8250_set_interface(struct mxpcie8250 *priv,
+ unsigned int port_idx,
+ u8 mode)
+{
+ void __iomem *uir_addr = priv->bar2_base + MOXA_UIR_OFFSET + port_idx / 2;
+ u8 cval;
+
+ cval = ioread8(uir_addr);
+
+ if (port_idx & 1)
+ cval = FIELD_MODIFY(MOXA_ODD_RS_MASK, &cval, mode);
+ else
+ cval = FIELD_MODIFY(MOXA_EVEN_RS_MASK, &cval, mode);
+
+ iowrite8(cval, uir_addr);
+}
+
+static void mxpcie8250_init_board(struct pci_dev *pdev, struct mxpcie8250 *priv)
+{
+ void __iomem *bar2_base = priv->bar2_base;
+ unsigned short device = pdev->device;
+ u8 cval;
+
+ /* Initial terminator */
+ if (device == PCI_DEVICE_ID_MOXA_CP114EL ||
+ device == PCI_DEVICE_ID_MOXA_CP118EL_A) {
+ iowrite8(0xff, bar2_base + MOXA_GPIO_DIRECTION);
+ iowrite8(0x00, bar2_base + MOXA_GPIO_OUTPUT);
+ }
+ /*
+ * Enable hardware buffer to prevent break signal output when system boots up.
+ * This hardware buffer is only supported on Mini PCIe series.
+ */
+ if (mxpcie8250_is_mini_pcie(device)) {
+ /* Set GPIO direction */
+ cval = ioread8(bar2_base + MOXA_GPIO_DIRECTION);
+ cval |= MOXA_GPIO_PIN2;
+ iowrite8(cval, bar2_base + MOXA_GPIO_DIRECTION);
+ /* Enable low GPIO */
+ cval = ioread8(bar2_base + MOXA_GPIO_OUTPUT);
+ cval &= ~MOXA_GPIO_PIN2;
+ iowrite8(cval, bar2_base + MOXA_GPIO_OUTPUT);
+ }
+}
+
+static void mxpcie8250_setup_port(struct pci_dev *pdev,
+ struct mxpcie8250 *priv,
+ struct uart_8250_port *up,
+ int idx)
+{
+ unsigned short device = pdev->device;
+ int offset = idx * MOXA_PUART_OFFSET;
+ u8 init_mode = MOXA_UIR_RS232;
+
+ if (!(priv->supp_rs & MOXA_SUPP_RS232))
+ init_mode = MOXA_UIR_RS422;
+
+ mxpcie8250_set_interface(priv, idx, init_mode);
+
+ if (idx == 3 &&
+ (device == PCI_DEVICE_ID_MOXA_CP104EL_A ||
+ device == PCI_DEVICE_ID_MOXA_CP114EL ||
+ device == PCI_DEVICE_ID_MOXA_CP134EL_A))
+ offset = 7 * MOXA_PUART_OFFSET;
+
+ up->port.mapbase = pci_resource_start(pdev, FL_BASE1) + offset;
+ up->port.membase = pcim_iomap_table(pdev)[FL_BASE1] + offset;
+}
+
+static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+ struct device *dev = &pdev->dev;
+ struct uart_8250_port up = {};
+ struct mxpcie8250 *priv;
+ unsigned short device = pdev->device;
+ unsigned int i, num_ports;
+ int ret;
+
+ ret = pcim_enable_device(pdev);
+ if (ret)
+ return ret;
+
+ num_ports = mxpcie8250_get_nports(device);
+
+ priv = devm_kzalloc(dev, struct_size(priv, line, num_ports), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->supp_rs = mxpcie8250_get_supp_rs(device);
+ priv->num_ports = num_ports;
+
+ priv->bar1_base = pcim_iomap(pdev, FL_BASE1, 0);
+ if (!priv->bar1_base)
+ return -ENOMEM;
+
+ priv->bar2_base = pcim_iomap(pdev, FL_BASE2, 0);
+ if (!priv->bar2_base)
+ return -ENOMEM;
+
+ mxpcie8250_init_board(pdev, priv);
+
+ up.port.dev = dev;
+ up.port.irq = pdev->irq;
+ up.port.uartclk = MOXA_PUART_BASE_BAUD * 16;
+ up.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
+
+ up.port.iotype = UPIO_MEM;
+ up.port.iobase = 0;
+ up.port.regshift = 0;
+
+ for (i = 0; i < num_ports; i++) {
+ mxpcie8250_setup_port(pdev, priv, &up, i);
+
+ dev_dbg(dev, "Setup PCI port: port %lx, irq %d, type %d\n",
+ up.port.iobase, up.port.irq, up.port.iotype);
+
+ priv->line[i] = serial8250_register_8250_port(&up);
+ if (priv->line[i] < 0) {
+ dev_err(dev,
+ "Couldn't register serial port %lx, irq %d, type %d, error %d\n",
+ up.port.iobase, up.port.irq,
+ up.port.iotype, priv->line[i]);
+ break;
+ }
+ }
+ dev_set_drvdata(dev, priv);
+
+ return 0;
+}
+
+static void mxpcie8250_remove(struct pci_dev *pdev)
+{
+ struct mxpcie8250 *priv = dev_get_drvdata(&pdev->dev);
+ unsigned int i;
+
+ for (i = 0; i < priv->num_ports; i++)
+ serial8250_unregister_port(priv->line[i]);
+}
+
+static const struct pci_device_id mxpcie8250_pci_ids[] = {
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102E) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102EL) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102N) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL_A) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104N) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP112N) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114EL) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114N) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_A) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_B) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL_A) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118E_A_I) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132EL) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132N) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134EL_A) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134N) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP138E_A) },
+ { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL_A) },
+ { }
+};
+MODULE_DEVICE_TABLE(pci, mxpcie8250_pci_ids);
+
+static struct pci_driver mxpcie8250_pci_driver = {
+ .name = "8250_mxpcie",
+ .id_table = mxpcie8250_pci_ids,
+ .probe = mxpcie8250_probe,
+ .remove = mxpcie8250_remove,
+};
+module_pci_driver(mxpcie8250_pci_driver);
+
+MODULE_AUTHOR("Moxa Inc.");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Moxa PCIe Multiport Serial Device Driver");
+MODULE_IMPORT_NS("SERIAL_8250_PCI");
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 152f914c599d..fa172477409a 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -76,25 +76,6 @@
#define PCI_DEVICE_ID_WCHIC_CH384_4S 0x3470
#define PCI_DEVICE_ID_WCHIC_CH384_8S 0x3853
-#define PCI_DEVICE_ID_MOXA_CP102E 0x1024
-#define PCI_DEVICE_ID_MOXA_CP102EL 0x1025
-#define PCI_DEVICE_ID_MOXA_CP102N 0x1027
-#define PCI_DEVICE_ID_MOXA_CP104EL_A 0x1045
-#define PCI_DEVICE_ID_MOXA_CP104N 0x1046
-#define PCI_DEVICE_ID_MOXA_CP112N 0x1121
-#define PCI_DEVICE_ID_MOXA_CP114EL 0x1144
-#define PCI_DEVICE_ID_MOXA_CP114N 0x1145
-#define PCI_DEVICE_ID_MOXA_CP116E_A_A 0x1160
-#define PCI_DEVICE_ID_MOXA_CP116E_A_B 0x1161
-#define PCI_DEVICE_ID_MOXA_CP118EL_A 0x1182
-#define PCI_DEVICE_ID_MOXA_CP118E_A_I 0x1183
-#define PCI_DEVICE_ID_MOXA_CP132EL 0x1322
-#define PCI_DEVICE_ID_MOXA_CP132N 0x1323
-#define PCI_DEVICE_ID_MOXA_CP134EL_A 0x1342
-#define PCI_DEVICE_ID_MOXA_CP134N 0x1343
-#define PCI_DEVICE_ID_MOXA_CP138E_A 0x1381
-#define PCI_DEVICE_ID_MOXA_CP168EL_A 0x1683
-
/* Unknown vendors/cards - this should not be in linux/pci_ids.h */
#define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584
#define PCI_SUBDEVICE_ID_UNKNOWN_0x1588 0x1588
@@ -1994,138 +1975,6 @@ pci_sunix_setup(struct serial_private *priv,
return setup_port(priv, port, bar, offset, 0);
}
-#define MOXA_PUART_GPIO_EN 0x09
-#define MOXA_PUART_GPIO_OUT 0x0A
-
-#define MOXA_GPIO_PIN2 BIT(2)
-
-#define MOXA_RS232 0x00
-#define MOXA_RS422 0x01
-#define MOXA_RS485_4W 0x0B
-#define MOXA_RS485_2W 0x0F
-#define MOXA_UIR_OFFSET 0x04
-#define MOXA_EVEN_RS_MASK GENMASK(3, 0)
-#define MOXA_ODD_RS_MASK GENMASK(7, 4)
-
-enum {
- MOXA_SUPP_RS232 = BIT(0),
- MOXA_SUPP_RS422 = BIT(1),
- MOXA_SUPP_RS485 = BIT(2),
-};
-
-static unsigned short moxa_get_nports(unsigned short device)
-{
- switch (device) {
- case PCI_DEVICE_ID_MOXA_CP116E_A_A:
- case PCI_DEVICE_ID_MOXA_CP116E_A_B:
- return 8;
- }
-
- return FIELD_GET(0x00F0, device);
-}
-
-static bool pci_moxa_is_mini_pcie(unsigned short device)
-{
- if (device == PCI_DEVICE_ID_MOXA_CP102N ||
- device == PCI_DEVICE_ID_MOXA_CP104N ||
- device == PCI_DEVICE_ID_MOXA_CP112N ||
- device == PCI_DEVICE_ID_MOXA_CP114N ||
- device == PCI_DEVICE_ID_MOXA_CP132N ||
- device == PCI_DEVICE_ID_MOXA_CP134N)
- return true;
-
- return false;
-}
-
-static unsigned int pci_moxa_supported_rs(struct pci_dev *dev)
-{
- switch (dev->device & 0x0F00) {
- case 0x0000:
- case 0x0600:
- return MOXA_SUPP_RS232;
- case 0x0100:
- return MOXA_SUPP_RS232 | MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
- case 0x0300:
- return MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
- }
- return 0;
-}
-
-static int pci_moxa_set_interface(const struct pci_dev *dev,
- unsigned int port_idx,
- u8 mode)
-{
- resource_size_t iobar_addr = pci_resource_start(dev, 2);
- resource_size_t UIR_addr = iobar_addr + MOXA_UIR_OFFSET + port_idx / 2;
- u8 val;
-
- val = inb(UIR_addr);
-
- if (port_idx % 2) {
- val &= ~MOXA_ODD_RS_MASK;
- val |= FIELD_PREP(MOXA_ODD_RS_MASK, mode);
- } else {
- val &= ~MOXA_EVEN_RS_MASK;
- val |= FIELD_PREP(MOXA_EVEN_RS_MASK, mode);
- }
- outb(val, UIR_addr);
-
- return 0;
-}
-
-static int pci_moxa_init(struct pci_dev *dev)
-{
- unsigned short device = dev->device;
- resource_size_t iobar_addr = pci_resource_start(dev, 2);
- unsigned int i, num_ports = moxa_get_nports(device);
- u8 val, init_mode = MOXA_RS232;
-
- if (!IS_ENABLED(CONFIG_HAS_IOPORT))
- return serial_8250_warn_need_ioport(dev);
-
- if (!(pci_moxa_supported_rs(dev) & MOXA_SUPP_RS232)) {
- init_mode = MOXA_RS422;
- }
- for (i = 0; i < num_ports; ++i)
- pci_moxa_set_interface(dev, i, init_mode);
-
- /*
- * Enable hardware buffer to prevent break signal output when system boots up.
- * This hardware buffer is only supported on Mini PCIe series.
- */
- if (pci_moxa_is_mini_pcie(device)) {
- /* Set GPIO direction */
- val = inb(iobar_addr + MOXA_PUART_GPIO_EN);
- val |= MOXA_GPIO_PIN2;
- outb(val, iobar_addr + MOXA_PUART_GPIO_EN);
- /* Enable low GPIO */
- val = inb(iobar_addr + MOXA_PUART_GPIO_OUT);
- val &= ~MOXA_GPIO_PIN2;
- outb(val, iobar_addr + MOXA_PUART_GPIO_OUT);
- }
-
- return num_ports;
-}
-
-static int
-pci_moxa_setup(struct serial_private *priv,
- const struct pciserial_board *board,
- struct uart_8250_port *port, int idx)
-{
- unsigned int bar = FL_GET_BASE(board->flags);
- int offset;
-
- if (!IS_ENABLED(CONFIG_HAS_IOPORT))
- return serial_8250_warn_need_ioport(priv->dev);
-
- if (board->num_ports == 4 && idx == 3)
- offset = 7 * board->uart_offset;
- else
- offset = idx * board->uart_offset;
-
- return setup_port(priv, port, bar, offset, 0);
-}
-
/*
* Master list of serial port init/setup/exit quirks.
* This does not describe the general nature of the port.
@@ -2941,17 +2790,6 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
.setup = pci_fintek_setup,
.init = pci_fintek_init,
},
- /*
- * MOXA
- */
- {
- .vendor = PCI_VENDOR_ID_MOXA,
- .device = PCI_ANY_ID,
- .subvendor = PCI_ANY_ID,
- .subdevice = PCI_ANY_ID,
- .init = pci_moxa_init,
- .setup = pci_moxa_setup,
- },
{
.vendor = 0x1c29,
.device = 0x1204,
@@ -3169,9 +3007,6 @@ enum pci_board_num_t {
pbn_titan_2_4000000,
pbn_titan_4_4000000,
pbn_titan_8_4000000,
- pbn_moxa_2,
- pbn_moxa_4,
- pbn_moxa_8,
};
/*
@@ -3943,24 +3778,6 @@ static struct pciserial_board pci_boards[] = {
.uart_offset = 0x200,
.first_offset = 0x1000,
},
- [pbn_moxa_2] = {
- .flags = FL_BASE1,
- .num_ports = 2,
- .base_baud = 921600,
- .uart_offset = 0x200,
- },
- [pbn_moxa_4] = {
- .flags = FL_BASE1,
- .num_ports = 4,
- .base_baud = 921600,
- .uart_offset = 0x200,
- },
- [pbn_moxa_8] = {
- .flags = FL_BASE1,
- .num_ports = 8,
- .base_baud = 921600,
- .uart_offset = 0x200,
- },
};
#define REPORT_CONFIG(option) \
@@ -4014,6 +3831,9 @@ static const struct pci_device_id blacklist[] = {
{ PCI_VDEVICE(PERICOM, PCI_ANY_ID), REPORT_8250_CONFIG(PERICOM), },
{ PCI_VDEVICE(ACCESSIO, PCI_ANY_ID), REPORT_8250_CONFIG(PERICOM), },
+ /* Moxa devices */
+ { PCI_VDEVICE(MOXA, PCI_ANY_ID), REPORT_8250_CONFIG(MOXA), },
+
/* End of the black list */
{ }
};
@@ -5851,28 +5671,6 @@ static const struct pci_device_id serial_pci_tbl[] = {
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_ni8430_4 },
- /*
- * MOXA
- */
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102E), pbn_moxa_2 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102EL), pbn_moxa_2 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102N), pbn_moxa_2 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL_A), pbn_moxa_4 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104N), pbn_moxa_4 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP112N), pbn_moxa_2 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114EL), pbn_moxa_4 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114N), pbn_moxa_4 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_A), pbn_moxa_8 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_B), pbn_moxa_8 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL_A), pbn_moxa_8 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118E_A_I), pbn_moxa_8 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132EL), pbn_moxa_2 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132N), pbn_moxa_2 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134EL_A), pbn_moxa_4 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134N), pbn_moxa_4 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP138E_A), pbn_moxa_8 },
- { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL_A), pbn_moxa_8 },
-
/*
* ADDI-DATA GmbH communication cards <info@addi-data.com>
*/
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
index f64ef0819cd4..7cf8547d18f6 100644
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
@@ -157,6 +157,17 @@ config SERIAL_8250_EXAR
422x PCIe serial cards that are not covered by the more generic
SERIAL_8250_PCI option.
+config SERIAL_8250_MOXA_PCIE
+ tristate "8250/16550 Moxa PCIe device support"
+ depends on SERIAL_8250 && PCI
+ select SERIAL_8250_PCILIB
+ default SERIAL_8250
+ help
+ Say Y here if you have a Moxa PCIe serial card.
+
+ To compile this driver as a module, choose M here: the
+ module will be called 8250_mxpcie.
+
config SERIAL_8250_HP300
tristate
depends on SERIAL_8250 && HP300
diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile
index 9ec4d5fe64de..be78fd6b337a 100644
--- a/drivers/tty/serial/8250/Makefile
+++ b/drivers/tty/serial/8250/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_SERIAL_8250_LPC18XX) += 8250_lpc18xx.o
obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o
obj-$(CONFIG_SERIAL_8250_MEN_MCB) += 8250_men_mcb.o
obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o
+obj-$(CONFIG_SERIAL_8250_MOXA_PCIE) += 8250_mxpcie.o
obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o
obj-$(CONFIG_SERIAL_8250_NI) += 8250_ni.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o
--
2.43.0
^ permalink raw reply related
* [PATCH 02/15] serial: 8250: add Moxa MUEx50 UART port type
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
Add a new 8250 port type for the Moxa MUEx50 UART and describe its basic
FIFO size and trigger characteristics in the 8250 port configuration
table.
The 8250_mxpcie driver sets UPF_FIXED_TYPE and uses PORT_MUEX50 so that
the generic 8250 core applies the correct defaults.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 3 ++-
drivers/tty/serial/8250/8250_port.c | 8 ++++++++
include/uapi/linux/serial_core.h | 3 +++
3 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index aa0afdbed791..ec91db1a3008 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -220,7 +220,8 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.dev = dev;
up.port.irq = pdev->irq;
up.port.uartclk = MOXA_PUART_BASE_BAUD * 16;
- up.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
+ up.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ | UPF_FIXED_TYPE;
+ up.port.type = PORT_MUEX50;
up.port.iotype = UPIO_MEM;
up.port.iobase = 0;
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index 719faf92aa8a..a17fdb5d68d2 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -310,6 +310,14 @@ static const struct serial8250_config uart_config[] = {
.rxtrig_bytes = {1, 8, 16, 30},
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
+ [PORT_MUEX50] = {
+ .name = "Moxa MUEx50 UART",
+ .fifo_size = 128,
+ .tx_loadsz = 128,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+ .rxtrig_bytes = {15, 31, 63, 111},
+ .flags = UART_CAP_FIFO,
+ },
};
/* Uart divisor latch read */
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 9c007a106330..377884e3856a 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -100,6 +100,9 @@
/* TXX9 type number */
#define PORT_TXX9 64
+/* Moxa MUEx50 UART */
+#define PORT_MUEX50 65
+
/*Digi jsm */
#define PORT_JSM 69
--
2.43.0
^ permalink raw reply related
* [PATCH 03/15] serial: 8250_mxpcie: enable enhanced mode and program FIFO trigger levels
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
The MUEx50 UART provides an enhanced register set and programmable FIFO
trigger levels for RX, TX, and flow control.
Enable enhanced mode during port startup and program the MUEx50 FIFO
trigger registers according to the configured port settings. Clear the
programmed state again during shutdown to restore the default UART
configuration.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 50 +++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index ec91db1a3008..7ba96a954bb1 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -49,6 +49,19 @@
#define MOXA_PUART_BASE_BAUD 921600
#define MOXA_PUART_OFFSET 0x200
+/* Special Function Register (SFR) */
+#define MOXA_PUART_SFR 0x07
+#define MOXA_PUART_SFR_950 BIT(5)
+
+/* Enhanced Function Register (EFR) */
+#define MOXA_PUART_EFR 0x0A
+#define MOXA_PUART_EFR_ENHANCED BIT(4)
+
+#define MOXA_PUART_TTL 0x10 /* Tx Interrupt Trigger Level */
+#define MOXA_PUART_RTL 0x11 /* Rx Interrupt Trigger Level */
+#define MOXA_PUART_FCL 0x12 /* Flow Control Low Trigger Level */
+#define MOXA_PUART_FCH 0x13 /* Flow Control High Trigger Level */
+
#define MOXA_GPIO_DIRECTION 0x09
#define MOXA_GPIO_OUTPUT 0x0A
@@ -133,6 +146,40 @@ static void mxpcie8250_set_interface(struct mxpcie8250 *priv,
iowrite8(cval, uir_addr);
}
+static int mxpcie8250_startup(struct uart_port *port)
+{
+ struct uart_8250_port *up = up_to_u8250p(port);
+ unsigned int i;
+ int ret;
+
+ ret = serial8250_do_startup(port);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < 5; ++i)
+ serial_out(up, UART_FCR, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
+
+ serial_out(up, MOXA_PUART_EFR, MOXA_PUART_EFR_ENHANCED);
+ serial_out(up, MOXA_PUART_SFR, MOXA_PUART_SFR_950);
+
+ serial_out(up, MOXA_PUART_TTL, 0);
+ serial_out(up, MOXA_PUART_RTL, 96);
+ serial_out(up, MOXA_PUART_FCL, 16);
+ serial_out(up, MOXA_PUART_FCH, 110);
+
+ return 0;
+}
+
+static void mxpcie8250_shutdown(struct uart_port *port)
+{
+ struct uart_8250_port *up = up_to_u8250p(port);
+
+ serial_out(up, MOXA_PUART_EFR, 0);
+ serial_out(up, MOXA_PUART_SFR, 0);
+
+ serial8250_do_shutdown(port);
+}
+
static void mxpcie8250_init_board(struct pci_dev *pdev, struct mxpcie8250 *priv)
{
void __iomem *bar2_base = priv->bar2_base;
@@ -227,6 +274,9 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.iobase = 0;
up.port.regshift = 0;
+ up.port.startup = mxpcie8250_startup;
+ up.port.shutdown = mxpcie8250_shutdown;
+
for (i = 0; i < num_ports; i++) {
mxpcie8250_setup_port(pdev, priv, &up, i);
--
2.43.0
^ permalink raw reply related
* [PATCH 04/15] serial: 8250_mxpcie: enable automatic RTS/CTS flow control
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
The MUEx50 UART supports automatic RTS/CTS flow control via the enhanced
feature register.
Implement a mxpcie-specific set_termios() callback that enables MUEx50
auto-RTS/auto-CTS when CRTSCTS is requested and disables it otherwise.
Keep the 8250 port status flags in sync with the hardware configuration.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 28 +++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 7ba96a954bb1..89086aa7b228 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -56,6 +56,10 @@
/* Enhanced Function Register (EFR) */
#define MOXA_PUART_EFR 0x0A
#define MOXA_PUART_EFR_ENHANCED BIT(4)
+#define MOXA_PUART_EFR_AUTO_RTS BIT(6)
+#define MOXA_PUART_EFR_AUTO_CTS BIT(7)
+#define MOXA_PUART_EFR_RX_FLOW_MASK GENMASK(1, 0)
+#define MOXA_PUART_EFR_TX_FLOW_MASK GENMASK(3, 2)
#define MOXA_PUART_TTL 0x10 /* Tx Interrupt Trigger Level */
#define MOXA_PUART_RTL 0x11 /* Rx Interrupt Trigger Level */
@@ -146,6 +150,29 @@ static void mxpcie8250_set_interface(struct mxpcie8250 *priv,
iowrite8(cval, uir_addr);
}
+static void mxpcie8250_set_termios(struct uart_port *port,
+ struct ktermios *new,
+ const struct ktermios *old)
+{
+ struct uart_8250_port *up = up_to_u8250p(port);
+ struct tty_struct *tty = port->state->port.tty;
+ unsigned int cflag = tty->termios.c_cflag;
+ u8 efr;
+
+ serial8250_do_set_termios(port, new, old);
+
+ up->port.status &= ~(UPSTAT_AUTORTS | UPSTAT_AUTOCTS);
+
+ efr = serial_in(up, MOXA_PUART_EFR);
+ efr &= ~(MOXA_PUART_EFR_AUTO_RTS | MOXA_PUART_EFR_AUTO_CTS);
+
+ if (cflag & CRTSCTS) {
+ efr |= (MOXA_PUART_EFR_AUTO_RTS | MOXA_PUART_EFR_AUTO_CTS);
+ up->port.status |= (UPSTAT_AUTORTS | UPSTAT_AUTOCTS);
+ }
+ serial_out(up, MOXA_PUART_EFR, efr);
+}
+
static int mxpcie8250_startup(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
@@ -274,6 +301,7 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.iobase = 0;
up.port.regshift = 0;
+ up.port.set_termios = mxpcie8250_set_termios;
up.port.startup = mxpcie8250_startup;
up.port.shutdown = mxpcie8250_shutdown;
--
2.43.0
^ permalink raw reply related
* [PATCH 05/15] serial: 8250_mxpcie: offload XON/XOFF flow control to MUEx50 hardware
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
The MUEx50 UART can handle in-band software flow control (XON/XOFF)
directly in hardware.
Program the on-chip XON/XOFF characters from termios settings and enable
the corresponding MUEx50 flow control modes when IXON or IXOFF is
requested. Provide throttle and unthrottle callbacks so RX can be
stopped and resumed cleanly.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 62 ++++++++++++++++++++++++++-
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 89086aa7b228..99fd789b7665 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -54,13 +54,31 @@
#define MOXA_PUART_SFR_950 BIT(5)
/* Enhanced Function Register (EFR) */
+/*
+ * EFR[1:0] - In-Band Receive Flow Control Mode (Compare XON/XOFF):
+ * 00b (0x00) = Disabled
+ * 01b (0x01) = Recognize XON2 & XOFF2 as XOFF character
+ * 10b (0x02) = Recognize XON1 & XOFF1 as XOFF character
+ * 11b (0x03) = Depends on EFR[3:2]
+ * EFR[3:2] - In-Band Transmit Flow Control Mode (Insert XON/XOFF):
+ * 00b (0x00) = Disabled
+ * 01b (0x04) = Use XON2 & XOFF2 as XOFF character
+ * 10b (0x08) = Use XON1 & XOFF1 as XOFF character
+ * 11b (0x0C) = Reserved
+ */
#define MOXA_PUART_EFR 0x0A
+#define MOXA_PUART_EFR_RX_FLOW 0x02 /* Recognize XON1 & XOFF1 as XOFF character */
+#define MOXA_PUART_EFR_TX_FLOW 0x08 /* Use XON1 & XOFF1 as XOFF character */
#define MOXA_PUART_EFR_ENHANCED BIT(4)
#define MOXA_PUART_EFR_AUTO_RTS BIT(6)
#define MOXA_PUART_EFR_AUTO_CTS BIT(7)
#define MOXA_PUART_EFR_RX_FLOW_MASK GENMASK(1, 0)
#define MOXA_PUART_EFR_TX_FLOW_MASK GENMASK(3, 2)
+#define MOXA_PUART_XON1 0x0B
+#define MOXA_PUART_XON2 0x0C
+#define MOXA_PUART_XOFF1 0x0D
+#define MOXA_PUART_XOFF2 0x0E
#define MOXA_PUART_TTL 0x10 /* Tx Interrupt Trigger Level */
#define MOXA_PUART_RTL 0x11 /* Rx Interrupt Trigger Level */
#define MOXA_PUART_FCL 0x12 /* Flow Control Low Trigger Level */
@@ -161,7 +179,7 @@ static void mxpcie8250_set_termios(struct uart_port *port,
serial8250_do_set_termios(port, new, old);
- up->port.status &= ~(UPSTAT_AUTORTS | UPSTAT_AUTOCTS);
+ up->port.status &= ~(UPSTAT_AUTORTS | UPSTAT_AUTOCTS | UPSTAT_AUTOXOFF);
efr = serial_in(up, MOXA_PUART_EFR);
efr &= ~(MOXA_PUART_EFR_AUTO_RTS | MOXA_PUART_EFR_AUTO_CTS);
@@ -170,6 +188,21 @@ static void mxpcie8250_set_termios(struct uart_port *port,
efr |= (MOXA_PUART_EFR_AUTO_RTS | MOXA_PUART_EFR_AUTO_CTS);
up->port.status |= (UPSTAT_AUTORTS | UPSTAT_AUTOCTS);
}
+ /* Set on-chip software flow control character */
+ serial_out(up, MOXA_PUART_XON1, START_CHAR(tty));
+ serial_out(up, MOXA_PUART_XON2, START_CHAR(tty));
+ serial_out(up, MOXA_PUART_XOFF1, STOP_CHAR(tty));
+ serial_out(up, MOXA_PUART_XOFF2, STOP_CHAR(tty));
+
+ efr &= ~(MOXA_PUART_EFR_RX_FLOW_MASK | MOXA_PUART_EFR_TX_FLOW_MASK);
+
+ if (I_IXON(tty))
+ efr |= MOXA_PUART_EFR_RX_FLOW;
+
+ if (I_IXOFF(tty)) {
+ efr |= MOXA_PUART_EFR_TX_FLOW;
+ up->port.status |= UPSTAT_AUTOXOFF;
+ }
serial_out(up, MOXA_PUART_EFR, efr);
}
@@ -207,6 +240,31 @@ static void mxpcie8250_shutdown(struct uart_port *port)
serial8250_do_shutdown(port);
}
+static void mxpcie8250_throttle(struct uart_port *port)
+{
+ unsigned long flags;
+
+ uart_port_lock_irqsave(port, &flags);
+
+ port->ops->stop_rx(port);
+
+ uart_port_unlock_irqrestore(port, flags);
+}
+
+static void mxpcie8250_unthrottle(struct uart_port *port)
+{
+ struct uart_8250_port *up = up_to_u8250p(port);
+ unsigned long flags;
+
+ uart_port_lock_irqsave(port, &flags);
+
+ up->ier |= UART_IER_RLSI | UART_IER_RDI;
+ port->read_status_mask |= UART_LSR_DR;
+ serial_out(up, UART_IER, up->ier);
+
+ uart_port_unlock_irqrestore(port, flags);
+}
+
static void mxpcie8250_init_board(struct pci_dev *pdev, struct mxpcie8250 *priv)
{
void __iomem *bar2_base = priv->bar2_base;
@@ -304,6 +362,8 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.set_termios = mxpcie8250_set_termios;
up.port.startup = mxpcie8250_startup;
up.port.shutdown = mxpcie8250_shutdown;
+ up.port.throttle = mxpcie8250_throttle;
+ up.port.unthrottle = mxpcie8250_unthrottle;
for (i = 0; i < num_ports; i++) {
mxpcie8250_setup_port(pdev, priv, &up, i);
--
2.43.0
^ permalink raw reply related
* [PATCH 06/15] serial: 8250_mxpcie: add custom handle_irq callback
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
Add a mxpcie-specific handle_irq() implementation for Moxa PCIe serial
ports.
This keeps the interrupt handling self-contained in the driver and
provides a hook point for MUEx50-specific RX/TX paths added in subsequent
patches. The handler processes RX, updates modem status, and handles TX
when THRE is asserted.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 48 +++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 99fd789b7665..9860f2ac2572 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -265,6 +265,53 @@ static void mxpcie8250_unthrottle(struct uart_port *port)
uart_port_unlock_irqrestore(port, flags);
}
+static u16 mxpcie8250_rx_chars(struct uart_8250_port *up, u16 lsr)
+{
+ struct uart_port *port = &up->port;
+
+ if (!(lsr & (UART_LSR_DR | UART_LSR_BI)))
+ return lsr;
+
+ if (!(port->status & (UPSTAT_AUTOCTS | UPSTAT_AUTORTS)))
+ goto do_rx;
+ if (lsr & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
+ goto do_rx;
+ if (port->read_status_mask & UART_LSR_DR)
+ goto do_rx;
+
+ return lsr;
+
+do_rx:
+ return serial8250_rx_chars(up, lsr);
+}
+
+static int mxpcie8250_handle_irq(struct uart_port *port)
+{
+ struct uart_8250_port *up = up_to_u8250p(port);
+ unsigned long flags;
+ u16 lsr;
+ u8 iir;
+
+ iir = serial_in(up, UART_IIR);
+ if (iir & UART_IIR_NO_INT)
+ return 0;
+
+ uart_port_lock_irqsave(port, &flags);
+
+ lsr = serial_lsr_in(up);
+
+ lsr = mxpcie8250_rx_chars(up, lsr);
+
+ serial8250_modem_status(up);
+
+ if ((lsr & UART_LSR_THRE) && (up->ier & UART_IER_THRI))
+ serial8250_tx_chars(up);
+
+ uart_unlock_and_check_sysrq_irqrestore(port, flags);
+
+ return 1;
+}
+
static void mxpcie8250_init_board(struct pci_dev *pdev, struct mxpcie8250 *priv)
{
void __iomem *bar2_base = priv->bar2_base;
@@ -364,6 +411,7 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.shutdown = mxpcie8250_shutdown;
up.port.throttle = mxpcie8250_throttle;
up.port.unthrottle = mxpcie8250_unthrottle;
+ up.port.handle_irq = mxpcie8250_handle_irq;
for (i = 0; i < num_ports; i++) {
mxpcie8250_setup_port(pdev, priv, &up, i);
--
2.43.0
^ permalink raw reply related
* [PATCH 07/15] serial: 8250_mxpcie: speed up RX using memory-mapped FIFO window
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
The MUEx50 UART provides a memory-mapped RX FIFO data window along with
an RX FIFO byte counter.
When no break or error conditions are present, read received data in
bulk via the MMIO FIFO window and push it to the tty layer in one
operation. Fall back to the generic 8250 RX path for break and error
handling.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 32 +++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 9860f2ac2572..f13fcb090df7 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -17,6 +17,7 @@
#include <linux/serial_8250.h>
#include <linux/serial_core.h>
#include <linux/serial_reg.h>
+#include <linux/tty_flip.h>
#include <linux/8250_pci.h>
#include "8250.h"
@@ -48,6 +49,7 @@
/* UART */
#define MOXA_PUART_BASE_BAUD 921600
#define MOXA_PUART_OFFSET 0x200
+#define MOXA_PUART_FIFO_SIZE 128
/* Special Function Register (SFR) */
#define MOXA_PUART_SFR 0x07
@@ -83,6 +85,9 @@
#define MOXA_PUART_RTL 0x11 /* Rx Interrupt Trigger Level */
#define MOXA_PUART_FCL 0x12 /* Flow Control Low Trigger Level */
#define MOXA_PUART_FCH 0x13 /* Flow Control High Trigger Level */
+#define MOXA_PUART_RX_FIFO_CNT 0x15 /* Rx FIFO Data Counter */
+
+#define MOXA_PUART_RX_FIFO_MEM 0x100 /* Memory Space to Rx FIFO Data Register */
#define MOXA_GPIO_DIRECTION 0x09
#define MOXA_GPIO_OUTPUT 0x0A
@@ -265,6 +270,29 @@ static void mxpcie8250_unthrottle(struct uart_port *port)
uart_port_unlock_irqrestore(port, flags);
}
+static void mxpcie8250_do_rx_chars(struct uart_8250_port *up)
+{
+ struct uart_port *port = &up->port;
+ struct tty_port *tport = &port->state->port;
+ u8 buf[MOXA_PUART_FIFO_SIZE];
+ int recv_room, gdl, i;
+
+ recv_room = tty_buffer_request_room(tport, port->fifosize);
+ if (!recv_room)
+ return;
+
+ gdl = serial_in(up, MOXA_PUART_RX_FIFO_CNT);
+ if (gdl > recv_room)
+ gdl = recv_room;
+
+ for (i = 0; i < gdl; ++i)
+ buf[i] = serial_in(up, MOXA_PUART_RX_FIFO_MEM + i);
+
+ port->icount.rx += gdl;
+ tty_insert_flip_string(tport, buf, gdl);
+ tty_flip_buffer_push(tport);
+}
+
static u16 mxpcie8250_rx_chars(struct uart_8250_port *up, u16 lsr)
{
struct uart_port *port = &up->port;
@@ -282,6 +310,10 @@ static u16 mxpcie8250_rx_chars(struct uart_8250_port *up, u16 lsr)
return lsr;
do_rx:
+ if (!(lsr & UART_LSR_BRK_ERROR_BITS)) {
+ mxpcie8250_do_rx_chars(up);
+ return lsr;
+ }
return serial8250_rx_chars(up, lsr);
}
--
2.43.0
^ permalink raw reply related
* [PATCH 08/15] serial: 8250_mxpcie: speed up TX using memory-mapped FIFO window
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
The MUEx50 UART provides a memory-mapped TX FIFO data window along with
a TX FIFO level counter.
Fill the TX FIFO in bulk via the MMIO FIFO window based on available
FIFO space, and use this path from the mxpcie interrupt handler instead
of the generic serial8250_tx_chars() helper.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 35 ++++++++++++++++++++++++++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index f13fcb090df7..5fe07f6947ef 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -86,8 +86,10 @@
#define MOXA_PUART_FCL 0x12 /* Flow Control Low Trigger Level */
#define MOXA_PUART_FCH 0x13 /* Flow Control High Trigger Level */
#define MOXA_PUART_RX_FIFO_CNT 0x15 /* Rx FIFO Data Counter */
+#define MOXA_PUART_TX_FIFO_CNT 0x16 /* Tx FIFO Data Counter */
#define MOXA_PUART_RX_FIFO_MEM 0x100 /* Memory Space to Rx FIFO Data Register */
+#define MOXA_PUART_TX_FIFO_MEM 0x100 /* Memory Space to Tx FIFO Data Register */
#define MOXA_GPIO_DIRECTION 0x09
#define MOXA_GPIO_OUTPUT 0x0A
@@ -317,6 +319,37 @@ static u16 mxpcie8250_rx_chars(struct uart_8250_port *up, u16 lsr)
return serial8250_rx_chars(up, lsr);
}
+static void mxpcie8250_tx_chars(struct uart_8250_port *up)
+{
+ struct uart_port *port = &up->port;
+ struct tty_port *tport = &port->state->port;
+ unsigned int i, count, txsize;
+ unsigned char c;
+
+ if (port->x_char) {
+ uart_xchar_out(port, UART_TX);
+ return;
+ }
+ if (uart_tx_stopped(port) || kfifo_is_empty(&tport->xmit_fifo)) {
+ port->ops->stop_tx(port);
+ return;
+ }
+ txsize = serial_in(up, MOXA_PUART_TX_FIFO_CNT);
+ count = min(kfifo_len(&tport->xmit_fifo), port->fifosize - txsize);
+
+ for (i = 0; i < count; ++i) {
+ if (!uart_fifo_get(port, &c))
+ break;
+
+ serial_out(up, MOXA_PUART_TX_FIFO_MEM + i, c);
+ }
+ if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
+ uart_write_wakeup(port);
+
+ if (kfifo_is_empty(&tport->xmit_fifo) && !(up->capabilities & UART_CAP_RPM))
+ port->ops->stop_tx(port);
+}
+
static int mxpcie8250_handle_irq(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
@@ -337,7 +370,7 @@ static int mxpcie8250_handle_irq(struct uart_port *port)
serial8250_modem_status(up);
if ((lsr & UART_LSR_THRE) && (up->ier & UART_IER_THRI))
- serial8250_tx_chars(up);
+ mxpcie8250_tx_chars(up);
uart_unlock_and_check_sysrq_irqrestore(port, flags);
--
2.43.0
^ permalink raw reply related
* [PATCH 09/15] serial: 8250_mxpcie: introduce per-port private data structure
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
Introduce a private per-port data structure for the mxpcie driver and
replace the shared flexible array of registered lines with an array of
per-port objects.
This prepares the driver for storing per-port state needed by subsequent
features.
No functional change intended.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 5fe07f6947ef..19233c3c5f1f 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -105,12 +105,16 @@
#define MOXA_EVEN_RS_MASK GENMASK(3, 0)
#define MOXA_ODD_RS_MASK GENMASK(7, 4)
+struct mxpcie8250_port {
+ int line;
+};
+
struct mxpcie8250 {
unsigned int supp_rs;
unsigned int num_ports;
void __iomem *bar1_base; /* UART registers (MMIO) */
void __iomem *bar2_base; /* UIR / GPIO / CPLD (IO) */
- int line[];
+ struct mxpcie8250_port port[];
};
enum {
@@ -444,7 +448,7 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
num_ports = mxpcie8250_get_nports(device);
- priv = devm_kzalloc(dev, struct_size(priv, line, num_ports), GFP_KERNEL);
+ priv = devm_kzalloc(dev, struct_size(priv, port, num_ports), GFP_KERNEL);
if (!priv)
return -ENOMEM;
@@ -484,12 +488,12 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
dev_dbg(dev, "Setup PCI port: port %lx, irq %d, type %d\n",
up.port.iobase, up.port.irq, up.port.iotype);
- priv->line[i] = serial8250_register_8250_port(&up);
- if (priv->line[i] < 0) {
+ priv->port[i].line = serial8250_register_8250_port(&up);
+ if (priv->port[i].line < 0) {
dev_err(dev,
"Couldn't register serial port %lx, irq %d, type %d, error %d\n",
up.port.iobase, up.port.irq,
- up.port.iotype, priv->line[i]);
+ up.port.iotype, priv->port[i].line);
break;
}
}
@@ -504,7 +508,7 @@ static void mxpcie8250_remove(struct pci_dev *pdev)
unsigned int i;
for (i = 0; i < priv->num_ports; i++)
- serial8250_unregister_port(priv->line[i]);
+ serial8250_unregister_port(priv->port[i].line);
}
static const struct pci_device_id mxpcie8250_pci_ids[] = {
--
2.43.0
^ permalink raw reply related
* [PATCH 10/15] serial: 8250_mxpcie: defer uart_write_wakeup() to workqueue
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
Avoid calling uart_write_wakeup() directly from the interrupt-driven TX
path.
Defer the wakeup to a per-port work item and coalesce multiple TX events
using a pending flag, so only one wakeup is scheduled while a previous
one is still outstanding.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 34 +++++++++++++++++++++++----
1 file changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 19233c3c5f1f..8dc1b7b0af04 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -18,6 +18,7 @@
#include <linux/serial_core.h>
#include <linux/serial_reg.h>
#include <linux/tty_flip.h>
+#include <linux/workqueue.h>
#include <linux/8250_pci.h>
#include "8250.h"
@@ -105,8 +106,13 @@
#define MOXA_EVEN_RS_MASK GENMASK(3, 0)
#define MOXA_ODD_RS_MASK GENMASK(7, 4)
+#define MOXA_EVENT_TXLOW BIT(0)
+
struct mxpcie8250_port {
int line;
+ unsigned long event_flags;
+ struct uart_port *port;
+ struct work_struct work;
};
struct mxpcie8250 {
@@ -327,6 +333,8 @@ static void mxpcie8250_tx_chars(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
struct tty_port *tport = &port->state->port;
+ struct device *dev = port->dev;
+ struct mxpcie8250 *priv = dev_get_drvdata(dev);
unsigned int i, count, txsize;
unsigned char c;
@@ -347,9 +355,10 @@ static void mxpcie8250_tx_chars(struct uart_8250_port *up)
serial_out(up, MOXA_PUART_TX_FIFO_MEM + i, c);
}
- if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
- uart_write_wakeup(port);
-
+ if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) {
+ if (!test_and_set_bit(MOXA_EVENT_TXLOW, &priv->port[port->port_id].event_flags))
+ schedule_work(&priv->port[port->port_id].work);
+ }
if (kfifo_is_empty(&tport->xmit_fifo) && !(up->capabilities & UART_CAP_RPM))
port->ops->stop_tx(port);
}
@@ -381,6 +390,14 @@ static int mxpcie8250_handle_irq(struct uart_port *port)
return 1;
}
+static void mxpcie8250_work_handler(struct work_struct *work)
+{
+ struct mxpcie8250_port *priv_port = container_of(work, struct mxpcie8250_port, work);
+
+ if (test_and_clear_bit(MOXA_EVENT_TXLOW, &priv_port->event_flags))
+ uart_write_wakeup(priv_port->port);
+}
+
static void mxpcie8250_init_board(struct pci_dev *pdev, struct mxpcie8250 *priv)
{
void __iomem *bar2_base = priv->bar2_base;
@@ -436,7 +453,7 @@ static void mxpcie8250_setup_port(struct pci_dev *pdev,
static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct device *dev = &pdev->dev;
- struct uart_8250_port up = {};
+ struct uart_8250_port up = {}, *new_port;
struct mxpcie8250 *priv;
unsigned short device = pdev->device;
unsigned int i, num_ports;
@@ -496,6 +513,11 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.iotype, priv->port[i].line);
break;
}
+ new_port = serial8250_get_port(priv->port[i].line);
+
+ priv->port[i].port = &new_port->port;
+
+ INIT_WORK(&priv->port[i].work, mxpcie8250_work_handler);
}
dev_set_drvdata(dev, priv);
@@ -507,8 +529,10 @@ static void mxpcie8250_remove(struct pci_dev *pdev)
struct mxpcie8250 *priv = dev_get_drvdata(&pdev->dev);
unsigned int i;
- for (i = 0; i < priv->num_ports; i++)
+ for (i = 0; i < priv->num_ports; i++) {
+ cancel_work_sync(&priv->port[i].work);
serial8250_unregister_port(priv->port[i].line);
+ }
}
static const struct pci_device_id mxpcie8250_pci_ids[] = {
--
2.43.0
^ permalink raw reply related
* [PATCH 11/15] serial: 8250_mxpcie: support serial interface mode switching
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
Moxa PCIe multiport serial boards support switching the serial interface
mode between RS232, RS422, RS485-2W, and RS485-4W via on-board control
registers.
Implement an rs485_config() callback and map TIOCSRS485 requests to the
corresponding hardware modes using serial_rs485 flags:
- RS232 = (no flags set)
- RS422 = SER_RS485_ENABLED | SER_RS485_MODE_RS422
- RS485_2W (half-duplex) = SER_RS485_ENABLED
- RS485_4W (full-duplex) = SER_RS485_ENABLED | SER_RS485_RX_DURING_TX
This allows users to reconfigure the serial mode at runtime via ioctl().
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 45 +++++++++++++++++++++++++--
1 file changed, 43 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 8dc1b7b0af04..94c3552b9798 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -129,6 +129,10 @@ enum {
MOXA_SUPP_RS485 = BIT(2),
};
+static const struct serial_rs485 mxpcie8250_rs485_supported = {
+ .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RX_DURING_TX | SER_RS485_MODE_RS422,
+};
+
static bool mxpcie8250_is_mini_pcie(unsigned short device)
{
if (device == PCI_DEVICE_ID_MOXA_CP102N ||
@@ -185,6 +189,38 @@ static void mxpcie8250_set_interface(struct mxpcie8250 *priv,
iowrite8(cval, uir_addr);
}
+/*
+ * Moxa PCIe multiport serial boards support switching serial interfaces
+ * via the ioctl() command "TIOCSRS485". Supported modes and corresponding
+ * flags in "serial_rs485":
+ *
+ * RS232 = (no flags set)
+ * RS422 = SER_RS485_ENABLED | SER_RS485_MODE_RS422
+ * RS485_2W (half-duplex) = SER_RS485_ENABLED
+ * RS485_4W (full-duplex) = SER_RS485_ENABLED | SER_RS485_RX_DURING_TX
+ */
+static int mxpcie8250_rs485_config(struct uart_port *port,
+ struct ktermios *termios,
+ struct serial_rs485 *rs485)
+{
+ struct mxpcie8250 *priv = dev_get_drvdata(port->dev);
+ u8 mode = MOXA_UIR_RS232;
+
+ if (rs485->flags & SER_RS485_ENABLED) {
+ if (rs485->flags & SER_RS485_MODE_RS422)
+ mode = MOXA_UIR_RS422;
+ else if (rs485->flags & SER_RS485_RX_DURING_TX)
+ mode = MOXA_UIR_RS485_4W;
+ else
+ mode = MOXA_UIR_RS485_2W;
+ } else if (!(priv->supp_rs & MOXA_SUPP_RS232)) {
+ return -ENODEV;
+ }
+ mxpcie8250_set_interface(priv, port->port_id, mode);
+
+ return 0;
+}
+
static void mxpcie8250_set_termios(struct uart_port *port,
struct ktermios *new,
const struct ktermios *old)
@@ -435,9 +471,14 @@ static void mxpcie8250_setup_port(struct pci_dev *pdev,
int offset = idx * MOXA_PUART_OFFSET;
u8 init_mode = MOXA_UIR_RS232;
- if (!(priv->supp_rs & MOXA_SUPP_RS232))
+ if (priv->supp_rs & MOXA_SUPP_RS485) {
+ up->port.rs485_config = mxpcie8250_rs485_config;
+ up->port.rs485_supported = mxpcie8250_rs485_supported;
+ }
+ if (!(priv->supp_rs & MOXA_SUPP_RS232)) {
init_mode = MOXA_UIR_RS422;
-
+ up->port.rs485.flags = SER_RS485_ENABLED | SER_RS485_MODE_RS422;
+ }
mxpcie8250_set_interface(priv, idx, init_mode);
if (idx == 3 &&
--
2.43.0
^ permalink raw reply related
* [PATCH 12/15] serial: 8250: allow low-level drivers to override break control
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
Some UARTs require driver-specific handling for break signaling, which
cannot be expressed by the generic 8250 break implementation alone.
Add an optional uart_port break_ctl callback and route
serial8250_break_ctl() through it when provided. Rename the existing
8250 implementation to serial8250_do_break_ctl() and export it under the
SERIAL_8250_PCI namespace so low-level drivers can reuse the default
8250 behavior when appropriate.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_core.c | 2 ++
drivers/tty/serial/8250/8250_port.c | 11 ++++++++++-
include/linux/serial_8250.h | 1 +
include/linux/serial_core.h | 1 +
4 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index bfa421ab3253..0a3355eb4bc3 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -796,6 +796,8 @@ int serial8250_register_8250_port(const struct uart_8250_port *up)
uart->port.startup = up->port.startup;
if (up->port.shutdown)
uart->port.shutdown = up->port.shutdown;
+ if (up->port.break_ctl)
+ uart->port.break_ctl = up->port.break_ctl;
if (up->port.pm)
uart->port.pm = up->port.pm;
if (up->port.handle_break)
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index a17fdb5d68d2..72ecc0112b8a 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -1937,7 +1937,7 @@ static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
serial8250_do_set_mctrl(port, mctrl);
}
-static void serial8250_break_ctl(struct uart_port *port, int break_state)
+void serial8250_do_break_ctl(struct uart_port *port, int break_state)
{
struct uart_8250_port *up = up_to_u8250p(port);
@@ -1950,6 +1950,15 @@ static void serial8250_break_ctl(struct uart_port *port, int break_state)
up->lcr &= ~UART_LCR_SBC;
serial_port_out(port, UART_LCR, up->lcr);
}
+EXPORT_SYMBOL_NS_GPL(serial8250_do_break_ctl, "SERIAL_8250_PCI");
+
+static void serial8250_break_ctl(struct uart_port *port, int break_state)
+{
+ if (port->break_ctl)
+ port->break_ctl(port, break_state);
+ else
+ serial8250_do_break_ctl(port, break_state);
+}
/* Returns true if @bits were set, false on timeout */
static bool wait_for_lsr(struct uart_8250_port *up, int bits)
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index 01efdce0fda0..5ae00dede026 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -192,6 +192,7 @@ void serial8250_do_shutdown(struct uart_port *port);
void serial8250_do_pm(struct uart_port *port, unsigned int state,
unsigned int oldstate);
void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl);
+void serial8250_do_break_ctl(struct uart_port *port, int break_state);
void serial8250_do_set_divisor(struct uart_port *port, unsigned int baud,
unsigned int quot);
int fsl8250_handle_irq(struct uart_port *port);
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 666430b47899..d9e5e3d02003 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -463,6 +463,7 @@ struct uart_port {
void (*shutdown)(struct uart_port *port);
void (*throttle)(struct uart_port *port);
void (*unthrottle)(struct uart_port *port);
+ void (*break_ctl)(struct uart_port *port, int break_state);
int (*handle_irq)(struct uart_port *);
void (*pm)(struct uart_port *, unsigned int state,
unsigned int old);
--
2.43.0
^ permalink raw reply related
* [PATCH 13/15] serial: 8250_mxpcie: add break support for RS485 using MUEx50 features
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
On MUEx50, break signaling under RS485 requires a driver-specific
sequence and cannot be handled correctly by the generic 8250 break
implementation alone.
Implement a mxpcie break_ctl callback that performs MUEx50-specific
break handling when RS485 is enabled and fall back to the default 8250
break handling for other modes.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 52 +++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 94c3552b9798..5bf15ca78228 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -54,6 +54,7 @@
/* Special Function Register (SFR) */
#define MOXA_PUART_SFR 0x07
+#define MOXA_PUART_SFR_FORCE_TX BIT(0)
#define MOXA_PUART_SFR_950 BIT(5)
/* Enhanced Function Register (EFR) */
@@ -426,6 +427,56 @@ static int mxpcie8250_handle_irq(struct uart_port *port)
return 1;
}
+static void mxpcie8250_software_break_ctl(struct uart_port *port, int break_state)
+{
+ struct uart_8250_port *up = up_to_u8250p(port);
+ struct tty_struct *tty = port->state->port.tty;
+ unsigned char tx_byte = 0x01;
+ unsigned int baud, quot;
+ unsigned long flags;
+ u8 sfr;
+
+ uart_port_lock_irqsave(port, &flags);
+
+ if (break_state == -1) {
+ serial_out(up, UART_LCR, up->lcr | UART_LCR_DLAB);
+ serial_out(up, UART_DLL, 0);
+ serial_out(up, UART_DLM, 0);
+ serial_out(up, UART_LCR, up->lcr);
+
+ serial_out(up, MOXA_PUART_TX_FIFO_MEM, tx_byte);
+
+ sfr = serial_in(up, MOXA_PUART_SFR);
+ serial_out(up, MOXA_PUART_SFR, sfr | MOXA_PUART_SFR_FORCE_TX);
+
+ up->lcr |= UART_LCR_SBC;
+ serial_out(up, UART_LCR, up->lcr);
+ } else {
+ up->lcr &= ~UART_LCR_SBC;
+ serial_out(up, UART_LCR, up->lcr);
+
+ sfr = serial_in(up, MOXA_PUART_SFR);
+ serial_out(up, MOXA_PUART_SFR, sfr &= ~MOXA_PUART_SFR_FORCE_TX);
+
+ serial_out(up, UART_FCR, UART_FCR_CLEAR_XMIT);
+
+ baud = tty_get_baud_rate(tty);
+ quot = uart_get_divisor(port, baud);
+ serial8250_do_set_divisor(port, baud, quot);
+ serial_out(up, UART_LCR, up->lcr);
+ }
+ uart_port_unlock_irqrestore(port, flags);
+}
+
+static void mxpcie8250_break_ctl(struct uart_port *port, int break_state)
+{
+ if (port->rs485.flags & SER_RS485_ENABLED &&
+ !(port->rs485.flags & SER_RS485_MODE_RS422))
+ mxpcie8250_software_break_ctl(port, break_state);
+ else
+ serial8250_do_break_ctl(port, break_state);
+}
+
static void mxpcie8250_work_handler(struct work_struct *work)
{
struct mxpcie8250_port *priv_port = container_of(work, struct mxpcie8250_port, work);
@@ -539,6 +590,7 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.throttle = mxpcie8250_throttle;
up.port.unthrottle = mxpcie8250_unthrottle;
up.port.handle_irq = mxpcie8250_handle_irq;
+ up.port.break_ctl = mxpcie8250_break_ctl;
for (i = 0; i < num_ports; i++) {
mxpcie8250_setup_port(pdev, priv, &up, i);
--
2.43.0
^ permalink raw reply related
* [PATCH 14/15] serial: 8250: allow UART drivers to override rx_trig_bytes handling
From: Crescent Hsieh @ 2026-05-04 8:48 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
The rx_trig_bytes sysfs attribute currently relies on 8250-internal
helper functions and assumes a fixed mapping between trigger levels and
FIFO behavior.
Some UARTs provide hardware-specific RX trigger mechanisms that do not
fit this model. Add optional uart_port callbacks for setting and getting
the RX trigger level, and use them when provided, while preserving the
existing 8250 helpers as the default fallback.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_core.c | 4 ++++
drivers/tty/serial/8250/8250_port.c | 14 ++++++++++++--
include/linux/serial_core.h | 2 ++
3 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 0a3355eb4bc3..a0a53b642d6c 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -802,6 +802,10 @@ int serial8250_register_8250_port(const struct uart_8250_port *up)
uart->port.pm = up->port.pm;
if (up->port.handle_break)
uart->port.handle_break = up->port.handle_break;
+ if (up->port.set_rxtrig)
+ uart->port.set_rxtrig = up->port.set_rxtrig;
+ if (up->port.get_rxtrig)
+ uart->port.get_rxtrig = up->port.get_rxtrig;
if (up->dl_read)
uart->dl_read = up->dl_read;
if (up->dl_write)
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index 72ecc0112b8a..2ece8af5d149 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -2999,9 +2999,14 @@ static ssize_t rx_trig_bytes_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct tty_port *port = dev_get_drvdata(dev);
+ struct uart_state *state = container_of(port, struct uart_state, port);
+ struct uart_port *uport = state->uart_port;
int rxtrig_bytes;
- rxtrig_bytes = do_serial8250_get_rxtrig(port);
+ if (uport->get_rxtrig)
+ rxtrig_bytes = uport->get_rxtrig(uport);
+ else
+ rxtrig_bytes = do_serial8250_get_rxtrig(port);
if (rxtrig_bytes < 0)
return rxtrig_bytes;
@@ -3044,6 +3049,8 @@ static ssize_t rx_trig_bytes_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct tty_port *port = dev_get_drvdata(dev);
+ struct uart_state *state = container_of(port, struct uart_state, port);
+ struct uart_port *uport = state->uart_port;
unsigned char bytes;
int ret;
@@ -3054,7 +3061,10 @@ static ssize_t rx_trig_bytes_store(struct device *dev,
if (ret < 0)
return ret;
- ret = do_serial8250_set_rxtrig(port, bytes);
+ if (uport->set_rxtrig)
+ ret = uport->set_rxtrig(uport, bytes);
+ else
+ ret = do_serial8250_set_rxtrig(port, bytes);
if (ret < 0)
return ret;
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index d9e5e3d02003..bba6223d7b12 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -468,6 +468,8 @@ struct uart_port {
void (*pm)(struct uart_port *, unsigned int state,
unsigned int old);
void (*handle_break)(struct uart_port *);
+ int (*set_rxtrig)(struct uart_port *port, unsigned char bytes);
+ int (*get_rxtrig)(struct uart_port *port);
int (*rs485_config)(struct uart_port *,
struct ktermios *termios,
struct serial_rs485 *rs485);
--
2.43.0
^ permalink raw reply related
* [PATCH 15/15] serial: 8250_mxpcie: implement rx_trig_bytes callbacks via MUEx50 RTL
From: Crescent Hsieh @ 2026-05-04 8:49 UTC (permalink / raw)
To: gregkh, jirislaby, ilpo.jarvinen, andy.shevchenko
Cc: crescentcy.hsieh, fangpingfp.cheng, linux-kernel, linux-serial
In-Reply-To: <20260504084900.22380-1-crescentcy.hsieh@moxa.com>
The MUEx50 UART exposes a programmable RX trigger level via the RTL
register.
Implement uart_port RX trigger set/get callbacks for the mxpcie driver
and wire them up to the generic rx_trig_bytes sysfs interface. Store the
configured trigger level in the per-port private data.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 28 ++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 5bf15ca78228..cc317202b658 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -111,6 +111,7 @@
struct mxpcie8250_port {
int line;
+ u8 rx_trig_level;
unsigned long event_flags;
struct uart_port *port;
struct work_struct work;
@@ -262,6 +263,7 @@ static void mxpcie8250_set_termios(struct uart_port *port,
static int mxpcie8250_startup(struct uart_port *port)
{
+ struct mxpcie8250 *priv = dev_get_drvdata(port->dev);
struct uart_8250_port *up = up_to_u8250p(port);
unsigned int i;
int ret;
@@ -277,7 +279,7 @@ static int mxpcie8250_startup(struct uart_port *port)
serial_out(up, MOXA_PUART_SFR, MOXA_PUART_SFR_950);
serial_out(up, MOXA_PUART_TTL, 0);
- serial_out(up, MOXA_PUART_RTL, 96);
+ serial_out(up, MOXA_PUART_RTL, priv->port[port->port_id].rx_trig_level);
serial_out(up, MOXA_PUART_FCL, 16);
serial_out(up, MOXA_PUART_FCH, 110);
@@ -477,6 +479,27 @@ static void mxpcie8250_break_ctl(struct uart_port *port, int break_state)
serial8250_do_break_ctl(port, break_state);
}
+static int mxpcie8250_set_rxtrig(struct uart_port *port, unsigned char bytes)
+{
+ struct mxpcie8250 *priv = dev_get_drvdata(port->dev);
+ struct uart_8250_port *up = up_to_u8250p(port);
+
+ if (bytes > 128)
+ return -EINVAL;
+
+ serial_out(up, MOXA_PUART_RTL, bytes);
+ priv->port[port->port_id].rx_trig_level = bytes;
+
+ return 0;
+}
+
+static int mxpcie8250_get_rxtrig(struct uart_port *port)
+{
+ struct uart_8250_port *up = up_to_u8250p(port);
+
+ return serial_in(up, MOXA_PUART_RTL);
+}
+
static void mxpcie8250_work_handler(struct work_struct *work)
{
struct mxpcie8250_port *priv_port = container_of(work, struct mxpcie8250_port, work);
@@ -591,6 +614,8 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.unthrottle = mxpcie8250_unthrottle;
up.port.handle_irq = mxpcie8250_handle_irq;
up.port.break_ctl = mxpcie8250_break_ctl;
+ up.port.set_rxtrig = mxpcie8250_set_rxtrig;
+ up.port.get_rxtrig = mxpcie8250_get_rxtrig;
for (i = 0; i < num_ports; i++) {
mxpcie8250_setup_port(pdev, priv, &up, i);
@@ -608,6 +633,7 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
}
new_port = serial8250_get_port(priv->port[i].line);
+ priv->port[i].rx_trig_level = 96;
priv->port[i].port = &new_port->port;
INIT_WORK(&priv->port[i].work, mxpcie8250_work_handler);
--
2.43.0
^ permalink raw reply related
* [PATCH V2] serial: qcom-geni: Avoid probing debug console UART without console support
From: Aniket Randive @ 2026-05-04 10:10 UTC (permalink / raw)
To: gregkh, jirislaby, linux-arm-msm, linux-kernel, linux-serial,
praveen.talari, anup.kulkarni, dmitry.baryshkov, viken.dadhaniya
Cc: Aniket Randive
When CONFIG_SERIAL_QCOM_GENI_CONSOLE is disabled, the driver still
advertises the debug UART compatible strings ("qcom,geni-debug-uart"
and "qcom,sa8255p-geni-debug-uart") in its of_match table. This lets the
driver match and probe console UART DT nodes even though console
support is not built. As a result, the console port is never registered
with the UART core and uart_add_one_port() fails with -EINVAL.
Fix this by only including the debug UART compatible entries in the
match table when CONFIG_SERIAL_QCOM_GENI_CONSOLE is enabled, preventing
the driver from probing console UART nodes when console support is
absent.
Reviewed-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Signed-off-by: Aniket Randive <aniket.randive@oss.qualcomm.com>
---
Changes in v2:
- Fixed kernel test robot warning (no functional change).
drivers/tty/serial/qcom_geni_serial.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
index 9854bb2406e3..d2287a8b1d54 100644
--- a/drivers/tty/serial/qcom_geni_serial.c
+++ b/drivers/tty/serial/qcom_geni_serial.c
@@ -1992,6 +1992,7 @@ static int qcom_geni_serial_resume(struct device *dev)
return ret;
}
+#if IS_ENABLED(CONFIG_SERIAL_QCOM_GENI_CONSOLE)
static const struct qcom_geni_device_data qcom_geni_console_data = {
.console = true,
.mode = GENI_SE_FIFO,
@@ -2000,14 +2001,6 @@ static const struct qcom_geni_device_data qcom_geni_console_data = {
.power_state = geni_serial_resource_state,
};
-static const struct qcom_geni_device_data qcom_geni_uart_data = {
- .console = false,
- .mode = GENI_SE_DMA,
- .resources_init = geni_serial_resource_init,
- .set_rate = geni_serial_set_rate,
- .power_state = geni_serial_resource_state,
-};
-
static const struct qcom_geni_device_data sa8255p_qcom_geni_console_data = {
.console = true,
.mode = GENI_SE_FIFO,
@@ -2019,6 +2012,15 @@ static const struct qcom_geni_device_data sa8255p_qcom_geni_console_data = {
.resources_init = geni_serial_pwr_init,
.set_rate = geni_serial_set_level,
};
+#endif
+
+static const struct qcom_geni_device_data qcom_geni_uart_data = {
+ .console = false,
+ .mode = GENI_SE_DMA,
+ .resources_init = geni_serial_resource_init,
+ .set_rate = geni_serial_set_rate,
+ .power_state = geni_serial_resource_state,
+};
static const struct qcom_geni_device_data sa8255p_qcom_geni_uart_data = {
.console = false,
@@ -2039,6 +2041,7 @@ static const struct dev_pm_ops qcom_geni_serial_pm_ops = {
};
static const struct of_device_id qcom_geni_serial_match_table[] = {
+#if IS_ENABLED(CONFIG_SERIAL_QCOM_GENI_CONSOLE)
{
.compatible = "qcom,geni-debug-uart",
.data = &qcom_geni_console_data,
@@ -2047,6 +2050,7 @@ static const struct of_device_id qcom_geni_serial_match_table[] = {
.compatible = "qcom,sa8255p-geni-debug-uart",
.data = &sa8255p_qcom_geni_console_data,
},
+#endif
{
.compatible = "qcom,geni-uart",
.data = &qcom_geni_uart_data,
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v2 02/15] serial: core: add uart_iotype_mmio/legacy_io helper functions
From: Maciej W. Rozycki @ 2026-05-04 11:44 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Hugo Villeneuve, Greg Kroah-Hartman, Jiri Slaby,
Ilpo Järvinen, linux-kernel, linux-serial, Hugo Villeneuve
In-Reply-To: <afhdTI_jAQrIsPSZ@ashevche-desk.local>
On Mon, 4 May 2026, Andy Shevchenko wrote:
> > > Why do we use 'legacy'? Still in use in modern CPUs...
> >
> > Deprecated in PCIe and not available in numerous systems. Also actually
> > called "legacy" in some serial port datasheets aged ~20 years now. While
> > some contemporary CPUs indeed retain the port I/O address space, it's for
> > legacy use anyway, you don't want to rely on it in new designs.
>
> For the holder of the new (modern) CPU which supports the IO ports, this is
> definitely not a legacy interface despite on whatever PCIe or other datasheets
> call it.
I appreciate your point of view, however I disagree that the presence of
an interface in a contemporary chip makes the interface modern.
I see the port I/O space so much legacy as say the PC/AT DMA controller
(8237 pair), which is similarly present in current x86 chipsets. If this
stuff was not present, such as say the PC/AT interrupt controller (8259A
pair), which I believe has been removed from some x86 system designs, then
it would be obsolete/removed rather than legacy.
It is analogous to PCI/e systems that lack a southbridge and are called
"legacy-free", as the whole southbridge stuff, the main consumer of the
port I/O space still remaining in use, is legacy nowadays (the other one I
know of being the 8255-based PC parallel port, which has been considered a
legacy interface as well, even though you can still buy and plug one into
a modern PCIe system).
NB I have a couple of modern x86 CPUs around too that support the port
I/O space, but it doesn't change my view as to the nomenclature.
FWIW,
Maciej
^ permalink raw reply
* Re: [PATCH 01/15] serial: 8250: split Moxa PCIe serial board support out of 8250_pci
From: Andy Shevchenko @ 2026-05-04 13:27 UTC (permalink / raw)
To: Crescent Hsieh
Cc: gregkh, jirislaby, ilpo.jarvinen, fangpingfp.cheng, linux-kernel,
linux-serial
In-Reply-To: <20260504084900.22380-2-crescentcy.hsieh@moxa.com>
On Mon, May 4, 2026 at 11:49 AM Crescent Hsieh
<crescentcy.hsieh@moxa.com> wrote:
>
> The Moxa PCIe multiport serial boards are currently handled as part of
> 8250_pci.c. In preparation for adding Moxa-specific UART features and
> optimizations, move the Moxa PCIe implementation into a dedicated
> driver.
>
> This introduces drivers/tty/serial/8250/8250_mxpcie.c and wires it up
> via Kconfig and Makefile, while preserving the existing probe flow and
> device IDs.
Thanks for doing this!
> This change was suggested during earlier review by Andy Shevchenko.
an earlier
Perhaps you wanted to add a link references here, something like this
This change was suggested during earlier reviews by Andy Shevchenko [1][2].
> No functional change intended.
> Link: https://lore.kernel.org/all/ZmQovC6TbDpTb3c8@surfacebook.localdomain/
> Link: https://lore.kernel.org/all/CAHp75VeDsVt0GQYUFxLM+obfmqXBPa3hM3YMsFbc26uzWZG-SQ@mail.gmail.com/
...and hence
Link: https://lore.kernel.org/all/ZmQovC6TbDpTb3c8@surfacebook.localdomain/
[1]
Link: https://lore.kernel.org/all/CAHp75VeDsVt0GQYUFxLM+obfmqXBPa3hM3YMsFbc26uzWZG-SQ@mail.gmail.com/
[2]
(note [*] references)
> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
...
> +#include <linux/module.h>
> +#include <linux/pci.h>
> +#include <linux/device.h>
> +#include <linux/dev_printk.h>
> +#include <linux/types.h>
> +#include <linux/io.h>
> +#include <linux/ioport.h>
> +#include <linux/bits.h>
> +#include <linux/bitfield.h>
Keep above sorted alphabetically, it makes it easier to read and
follow and see if anything is missing or a leftover.
+ blank line (i.o.w. keep the below headers in a separate group as
this driver is 8250 driver)
> +#include <linux/serial_8250.h>
> +#include <linux/serial_core.h>
> +#include <linux/serial_reg.h>
Only the first one is needed.
> +#include <linux/8250_pci.h>
...
> +static unsigned int mxpcie8250_get_supp_rs(unsigned short device)
> +{
> + switch (device & MOXA_DEV_ID_IFACE_MASK) {
> + case 0x0000:
> + case 0x0600:
> + return MOXA_SUPP_RS232;
> + case 0x0100:
> + return MOXA_SUPP_RS232 | MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
> + case 0x0300:
> + return MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
> + }
> +
> + return 0;
Simply make it a default case.
> +}
> +
> +static unsigned short mxpcie8250_get_nports(unsigned short device)
> +{
> + switch (device) {
> + case PCI_DEVICE_ID_MOXA_CP116E_A_A:
> + case PCI_DEVICE_ID_MOXA_CP116E_A_B:
> + return 8;
> + }
> +
> + return FIELD_GET(MOXA_DEV_ID_NPORTS_MASK, device);
Ditto.
> +}
> +
> +static void mxpcie8250_set_interface(struct mxpcie8250 *priv,
> + unsigned int port_idx,
> + u8 mode)
> +{
> + void __iomem *uir_addr = priv->bar2_base + MOXA_UIR_OFFSET + port_idx / 2;
> + u8 cval;
> +
> + cval = ioread8(uir_addr);
> +
> + if (port_idx & 1)
% 2
With them (/2, %2) going closer to each other some compilers gain a
few bytes, see this for example
9b3cd5c7099f ("regmap: place foo / 8 and foo % 8 closer to each other").
> + cval = FIELD_MODIFY(MOXA_ODD_RS_MASK, &cval, mode);
> + else
> + cval = FIELD_MODIFY(MOXA_EVEN_RS_MASK, &cval, mode);
> +
> + iowrite8(cval, uir_addr);
> +}
...
> + priv = devm_kzalloc(dev, struct_size(priv, line, num_ports), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + priv->supp_rs = mxpcie8250_get_supp_rs(device);
> + priv->num_ports = num_ports;
Swap these two lines (by the order) and add __counted_by() to the data
structure.
...
> + for (i = 0; i < num_ports; i++) {
Seems i is not used outside the loop, hence just
for (int i = 0; i < num_ports; i++) {
> + }
...
> +static void mxpcie8250_remove(struct pci_dev *pdev)
> +{
> + struct mxpcie8250 *priv = dev_get_drvdata(&pdev->dev);
platform_get_drvdata() IIRC
> + unsigned int i;
> +
> + for (i = 0; i < priv->num_ports; i++)
As per above.
> + serial8250_unregister_port(priv->line[i]);
> +}
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
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