From: sashiko-bot@kernel.org
To: "Kohei Otsuka" <kohei@spacemachines.com>
Cc: linux-serial@vger.kernel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: serial: 8250: add Microchip Core16550
Date: Mon, 09 Nov 2026 02:59:48 +0000 [thread overview]
Message-ID: <sashiko-outbox-204359@kernel.org> (raw)
In-Reply-To: <20261109-core16550-rs485-v2-1-a15933c7b907@spacemachines.com>
> From: Kohei Otsuka <kohei@spacemachines.com>
>
> Core16550 is a 16550-compatible UART soft IP core for Microchip FPGAs,
> including the fabric of PolarFire SoC. Its registers, interrupts and
> baud rate divisor follow the 16550A, so a driver that knows only
> ns16550a operates it fully: transmit, receive, FIFOs and modem control
> all work. What the generic driver cannot know is that the core raises
> no interrupt on TEMT, which it needs to drop RTS after a frame in
> software RS-485 mode (em485). ns16550a therefore stays a valid
> fallback, with RS-485 RTS control the one feature that needs the
> specific compatible.
>
> Add microchip,core16550-rtl-v3 with ns16550a as the fallback. As for
> Microchip's other FPGA fabric cores, the -rtl-v3 suffix is the major
> RTL version of the IP, Core16550 3.x.
>
> Link: https://github.com/linux4microchip/meta-mchp/issues/5
> Signed-off-by: Kohei Otsuka <kohei@spacemachines.com>
Sashiko has reviewed this patch and found no issues.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261109-core16550-rs485-v2-0-a15933c7b907@spacemachines.com?part=1
next prev parent reply other threads:[~2026-11-09 2:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-09 2:55 [PATCH v2 0/2] serial: 8250_of: RS-485 on Microchip Core16550 Kohei Otsuka via B4 Relay
2026-11-09 2:55 ` [PATCH v2 1/2] dt-bindings: serial: 8250: add " Kohei Otsuka via B4 Relay
2026-11-09 2:59 ` sashiko-bot [this message]
2026-11-09 2:55 ` [PATCH v2 2/2] serial: 8250_of: drop RS-485 RTS on " Kohei Otsuka via B4 Relay
2026-11-09 3:03 ` sashiko-bot
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