From: sashiko-bot@kernel.org
To: "Kohei Otsuka" <kohei@spacemachines.com>
Cc: linux-serial@vger.kernel.org
Subject: Re: [PATCH v3 1/2] dt-bindings: serial: 8250: add Microchip Core16550
Date: Mon, 09 Nov 2026 22:10:42 +0000 [thread overview]
Message-ID: <sashiko-outbox-205703@kernel.org> (raw)
In-Reply-To: <20261110-core16550-rs485-v3-1-4294334243fa@spacemachines.com>
> From: Kohei Otsuka <kohei@spacemachines.com>
>
> Core16550 is a 16550-compatible UART soft IP core for Microchip FPGAs,
> including the fabric of PolarFire SoC. Its registers follow the 16550A,
> but it raises no interrupt on TEMT. A driver that knows only ns16550a
> waits for one in software RS-485 mode (em485), so RTS stays asserted
> after the first frame and the port stops receiving. ns16550a is
> therefore not a valid fallback.
>
> Add microchip,core16550-rtl-v3 as a compatible of its own. As for
> Microchip's other FPGA fabric cores, the -rtl-v3 suffix is the major
> RTL version of the IP, Core16550 3.x.
>
> Link: https://github.com/linux4microchip/meta-mchp/issues/5
> Signed-off-by: Kohei Otsuka <kohei@spacemachines.com>
Sashiko has reviewed this patch and found no issues.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110-core16550-rs485-v3-0-4294334243fa@spacemachines.com?part=1
next prev parent reply other threads:[~2026-11-09 22:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-09 22:06 [PATCH v3 0/2] serial: 8250_of: RS-485 on Microchip Core16550 Kohei Otsuka via B4 Relay
2026-11-09 22:06 ` [PATCH v3 1/2] dt-bindings: serial: 8250: add " Kohei Otsuka via B4 Relay
2026-11-09 22:10 ` sashiko-bot [this message]
2026-11-10 18:16 ` Conor Dooley
2026-11-09 22:06 ` [PATCH v3 2/2] serial: 8250_of: " Kohei Otsuka via B4 Relay
2026-11-09 22:13 ` sashiko-bot
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